Beispiel #1
0
static void u16_cs_chg_reader(struct driver_data *drv_data)
{
	struct chip_data *chip = drv_data->cur_chip;

	/* poll for SPI completion before start */
	while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
		cpu_relax();

	/* clear TDBR buffer before read(else it will be shifted out) */
	write_TDBR(drv_data, 0xFFFF);

	cs_active(drv_data, chip);
	dummy_read(drv_data);

	while (drv_data->rx < drv_data->rx_end - 2) {
		cs_deactive(drv_data, chip);

		while (!(read_STAT(drv_data) & BIT_STAT_RXS))
			cpu_relax();
		cs_active(drv_data, chip);
		*(u16 *) (drv_data->rx) = read_RDBR(drv_data);
		drv_data->rx += 2;
	}
	cs_deactive(drv_data, chip);

	while (!(read_STAT(drv_data) & BIT_STAT_RXS))
		cpu_relax();
	*(u16 *) (drv_data->rx) = read_SHAW(drv_data);
	drv_data->rx += 2;
}
Beispiel #2
0
static void u16_reader(struct driver_data *drv_data)
{
	dev_dbg(&drv_data->pdev->dev,
		"cr-16 is 0x%x\n", read_STAT(drv_data));

	/* poll for SPI completion before start */
	while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
		cpu_relax();

	/* clear TDBR buffer before read(else it will be shifted out) */
	write_TDBR(drv_data, 0xFFFF);

	dummy_read(drv_data);

	while (drv_data->rx < (drv_data->rx_end - 2)) {
		while (!(read_STAT(drv_data) & BIT_STAT_RXS))
			cpu_relax();
		*(u16 *) (drv_data->rx) = read_RDBR(drv_data);
		drv_data->rx += 2;
	}

	while (!(read_STAT(drv_data) & BIT_STAT_RXS))
		cpu_relax();
	*(u16 *) (drv_data->rx) = read_SHAW(drv_data);
	drv_data->rx += 2;
}
Beispiel #3
0
static void null_writer(struct driver_data *drv_data)
{
	u8 n_bytes = drv_data->n_bytes;

	while (drv_data->tx < drv_data->tx_end) {
		write_TDBR(drv_data, 0);
		while ((read_STAT(drv_data) & BIT_STAT_TXS))
			cpu_relax();
		drv_data->tx += n_bytes;
	}
}
static void bfin_spi_u8_duplex(struct driver_data *drv_data)
{
	/* discard old RX data and clear RXS */
	bfin_spi_dummy_read(drv_data);

	while (drv_data->rx < drv_data->rx_end) {
		write_TDBR(drv_data, (*(u8 *) (drv_data->tx++)));
		while (!(read_STAT(drv_data) & BIT_STAT_RXS))
			cpu_relax();
		*(u8 *) (drv_data->rx++) = read_RDBR(drv_data);
	}
}
static void bfin_spi_u8_reader(struct driver_data *drv_data)
{
	u16 tx_val = drv_data->cur_chip->idle_tx_val;

	/* discard old RX data and clear RXS */
	bfin_spi_dummy_read(drv_data);

	while (drv_data->rx < drv_data->rx_end) {
		write_TDBR(drv_data, tx_val);
		while (!(read_STAT(drv_data) & BIT_STAT_RXS))
			cpu_relax();
		*(u8 *) (drv_data->rx++) = read_RDBR(drv_data);
	}
}
Beispiel #6
0
static void u16_duplex(struct driver_data *drv_data)
{
	/* in duplex mode, clk is triggered by writing of TDBR */
	while (drv_data->tx < drv_data->tx_end) {
		write_TDBR(drv_data, (*(u16 *) (drv_data->tx)));
		while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
			cpu_relax();
		while (!(read_STAT(drv_data) & BIT_STAT_RXS))
			cpu_relax();
		*(u16 *) (drv_data->rx) = read_RDBR(drv_data);
		drv_data->rx += 2;
		drv_data->tx += 2;
	}
}
static void bfin_spi_u8_writer(struct driver_data *drv_data)
{
	/* clear RXS (we check for RXS inside the loop) */
	bfin_spi_dummy_read(drv_data);

	while (drv_data->tx < drv_data->tx_end) {
		write_TDBR(drv_data, (*(u8 *) (drv_data->tx++)));
		/* wait until transfer finished.
		   checking SPIF or TXS may not guarantee transfer completion */
		while (!(read_STAT(drv_data) & BIT_STAT_RXS))
			cpu_relax();
		/* discard RX data and clear RXS */
		bfin_spi_dummy_read(drv_data);
	}
}
static void bfin_spi_u8_cs_chg_duplex(struct driver_data *drv_data)
{
	struct chip_data *chip = drv_data->cur_chip;

	/* discard old RX data and clear RXS */
	bfin_spi_dummy_read(drv_data);

	while (drv_data->rx < drv_data->rx_end) {
		bfin_spi_cs_active(drv_data, chip);
		write_TDBR(drv_data, (*(u8 *) (drv_data->tx++)));
		while (!(read_STAT(drv_data) & BIT_STAT_RXS))
			cpu_relax();
		*(u8 *) (drv_data->rx++) = read_RDBR(drv_data);
		bfin_spi_cs_deactive(drv_data, chip);
	}
}
static void bfin_spi_null_reader(struct driver_data *drv_data)
{
	u8 n_bytes = drv_data->n_bytes;
	u16 tx_val = drv_data->cur_chip->idle_tx_val;

	/* discard old RX data and clear RXS */
	bfin_spi_dummy_read(drv_data);

	while (drv_data->rx < drv_data->rx_end) {
		write_TDBR(drv_data, tx_val);
		drv_data->rx += n_bytes;
		while (!(read_STAT(drv_data) & BIT_STAT_RXS))
			cpu_relax();
		bfin_spi_dummy_read(drv_data);
	}
}
Beispiel #10
0
static void u16_writer(struct driver_data *drv_data)
{
	dev_dbg(&drv_data->pdev->dev,
		"cr16 is 0x%x\n", read_STAT(drv_data));

	while (drv_data->tx < drv_data->tx_end) {
		write_TDBR(drv_data, (*(u16 *) (drv_data->tx)));
		while ((read_STAT(drv_data) & BIT_STAT_TXS))
			cpu_relax();
		drv_data->tx += 2;
	}

	/* poll for SPI completion before return */
	while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
		cpu_relax();
}
static void bfin_spi_u8_cs_chg_writer(struct driver_data *drv_data)
{
	struct chip_data *chip = drv_data->cur_chip;

	/* clear RXS (we check for RXS inside the loop) */
	bfin_spi_dummy_read(drv_data);

	while (drv_data->tx < drv_data->tx_end) {
		bfin_spi_cs_active(drv_data, chip);
		write_TDBR(drv_data, (*(u8 *) (drv_data->tx++)));
		/* make sure transfer finished before deactiving CS */
		while (!(read_STAT(drv_data) & BIT_STAT_RXS))
			cpu_relax();
		bfin_spi_dummy_read(drv_data);
		bfin_spi_cs_deactive(drv_data, chip);
	}
}
static void bfin_spi_u16_cs_chg_reader(struct driver_data *drv_data)
{
	struct chip_data *chip = drv_data->cur_chip;
	u16 tx_val = chip->idle_tx_val;

	/* discard old RX data and clear RXS */
	bfin_spi_dummy_read(drv_data);

	while (drv_data->rx < drv_data->rx_end) {
		bfin_spi_cs_active(drv_data, chip);
		write_TDBR(drv_data, tx_val);
		while (!(read_STAT(drv_data) & BIT_STAT_RXS))
			cpu_relax();
		*(u16 *) (drv_data->rx) = read_RDBR(drv_data);
		drv_data->rx += 2;
		bfin_spi_cs_deactive(drv_data, chip);
	}
}
Beispiel #13
0
static void u16_cs_chg_writer(struct driver_data *drv_data)
{
	struct chip_data *chip = drv_data->cur_chip;

	while (drv_data->tx < drv_data->tx_end) {
		cs_active(drv_data, chip);

		write_TDBR(drv_data, (*(u16 *) (drv_data->tx)));
		while ((read_STAT(drv_data) & BIT_STAT_TXS))
			cpu_relax();
		while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
			cpu_relax();

		cs_deactive(drv_data, chip);

		drv_data->tx += 2;
	}
}
static void bfin_spi_null_writer(struct driver_data *drv_data)
{
	u8 n_bytes = drv_data->n_bytes;
	u16 tx_val = drv_data->cur_chip->idle_tx_val;

	/* clear RXS (we check for RXS inside the loop) */
	bfin_spi_dummy_read(drv_data);

	while (drv_data->tx < drv_data->tx_end) {
		write_TDBR(drv_data, tx_val);
		drv_data->tx += n_bytes;
		/* wait until transfer finished.
		   checking SPIF or TXS may not guarantee transfer completion */
		while (!(read_STAT(drv_data) & BIT_STAT_RXS))
			cpu_relax();
		/* discard RX data and clear RXS */
		bfin_spi_dummy_read(drv_data);
	}
}
Beispiel #15
0
static void u8_cs_chg_duplex(struct driver_data *drv_data)
{
	struct chip_data *chip = drv_data->cur_chip;

	while (drv_data->rx < drv_data->rx_end) {
		cs_active(drv_data, chip);

		write_TDBR(drv_data, (*(u8 *) (drv_data->tx)));

		while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
			cpu_relax();
		while (!(read_STAT(drv_data) & BIT_STAT_RXS))
			cpu_relax();
		*(u8 *) (drv_data->rx) = read_RDBR(drv_data);

		cs_deactive(drv_data, chip);

		++drv_data->rx;
		++drv_data->tx;
	}
}