/*
* Check a 2D array access operation for exception conditions.
*/
static void Check2DArrayAccess(MDUnroll *unroll, int reg, int reg2, int reg3,
unsigned char *pc, unsigned char *label)
{
#ifndef IL_USE_INTERRUPT_BASED_NULL_POINTER_CHECKS
unsigned char *patch1;
#endif
unsigned char *patch2;
unsigned char *patch3;
#ifndef IL_USE_INTERRUPT_BASED_NULL_POINTER_CHECKS
/* Check the array reference against NULL */
x86_alu_reg_reg(unroll->out, X86_OR, reg, reg);
patch1 = unroll->out;
x86_branch8(unroll->out, X86_CC_EQ, 0, 0);
#endif
/* Check the array bounds */
x86_alu_reg_membase(unroll->out, X86_SUB, reg2, reg, 12);
x86_alu_reg_membase(unroll->out, X86_CMP, reg2, reg, 16);
patch2 = unroll->out;
x86_branch32(unroll->out, X86_CC_LT, 0, 0);
x86_alu_reg_membase(unroll->out, X86_ADD, reg2, reg, 12);
patch3 = unroll->out;
x86_jump8(unroll->out, 0);
x86_patch(patch2, unroll->out);
x86_alu_reg_membase(unroll->out, X86_SUB, reg3, reg, 24);
x86_alu_reg_membase(unroll->out, X86_CMP, reg3, reg, 28);
patch2 = unroll->out;
x86_branch32(unroll->out, X86_CC_LT, 0, 0);
x86_alu_reg_membase(unroll->out, X86_ADD, reg2, reg, 12);
x86_alu_reg_membase(unroll->out, X86_ADD, reg3, reg, 28);
/* Re-execute the current instruction in the interpreter */
#ifndef IL_USE_INTERRUPT_BASED_NULL_POINTER_CHECKS
x86_patch(patch1, unroll->out);
#endif
x86_patch(patch3, unroll->out);
ReExecute(unroll, pc, label);
/* Compute the address of the array element */
x86_patch(patch2, unroll->out);
x86_imul_reg_membase(unroll->out, reg2, reg, 20);
x86_imul_reg_membase(unroll->out, reg3, reg, 32);
x86_alu_reg_reg(unroll->out, X86_ADD, reg2, reg3);
x86_imul_reg_membase(unroll->out, reg2, reg, 4);
x86_mov_reg_membase(unroll->out, reg, reg, 8, 4);
x86_alu_reg_reg(unroll->out, X86_ADD, reg, reg2);
}
gpointer
mono_arch_get_gsharedvt_trampoline (MonoTrampInfo **info, gboolean aot)
{
guint8 *code, *buf;
int buf_len, cfa_offset;
GSList *unwind_ops = NULL;
MonoJumpInfo *ji = NULL;
guint8 *br_out, *br [16];
int info_offset, mrgctx_offset;
buf_len = 320;
buf = code = mono_global_codeman_reserve (buf_len);
/*
* This trampoline is responsible for marshalling calls between normal code and gsharedvt code. The
* caller is a normal or gshared method which uses the signature of the inflated method to make the call, while
* the callee is a gsharedvt method which has a signature which uses valuetypes in place of type parameters, i.e.
* caller:
* foo<bool> (bool b)
* callee:
* T=<type used to represent vtype type arguments, currently TypedByRef>
* foo<T> (T b)
* The trampoline is responsible for marshalling the arguments and marshalling the result back. To simplify
* things, we create our own stack frame, and do most of the work in a C function, which receives a
* GSharedVtCallInfo structure as an argument. The structure should contain information to execute the C function to
* be as fast as possible. The argument is received in EAX from a gsharedvt trampoline. So the real
* call sequence looks like this:
* caller -> gsharedvt trampoline -> gsharevt in trampoline -> start_gsharedvt_call
* FIXME: Optimize this.
*/
cfa_offset = sizeof (gpointer);
mono_add_unwind_op_def_cfa (unwind_ops, code, buf, X86_ESP, cfa_offset);
mono_add_unwind_op_offset (unwind_ops, code, buf, X86_NREG, -cfa_offset);
x86_push_reg (code, X86_EBP);
cfa_offset += sizeof (gpointer);
mono_add_unwind_op_def_cfa_offset (unwind_ops, code, buf, cfa_offset);
mono_add_unwind_op_offset (unwind_ops, code, buf, X86_EBP, - cfa_offset);
x86_mov_reg_reg (code, X86_EBP, X86_ESP, sizeof (gpointer));
mono_add_unwind_op_def_cfa_reg (unwind_ops, code, buf, X86_EBP);
/* Alloc stack frame/align stack */
x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
info_offset = -4;
mrgctx_offset = - 8;
/* The info struct is put into EAX by the gsharedvt trampoline */
/* Save info struct addr */
x86_mov_membase_reg (code, X86_EBP, info_offset, X86_EAX, 4);
/* Save rgctx */
x86_mov_membase_reg (code, X86_EBP, mrgctx_offset, MONO_ARCH_RGCTX_REG, 4);
/* Allocate stack area used to pass arguments to the method */
x86_mov_reg_membase (code, X86_EAX, X86_EAX, MONO_STRUCT_OFFSET (GSharedVtCallInfo, stack_usage), sizeof (gpointer));
x86_alu_reg_reg (code, X86_SUB, X86_ESP, X86_EAX);
#if 0
/* Stack alignment check */
x86_mov_reg_reg (code, X86_ECX, X86_ESP, 4);
x86_alu_reg_imm (code, X86_AND, X86_ECX, MONO_ARCH_FRAME_ALIGNMENT - 1);
x86_alu_reg_imm (code, X86_CMP, X86_ECX, 0);
x86_branch_disp (code, X86_CC_EQ, 3, FALSE);
x86_breakpoint (code);
#endif
/* ecx = caller argument area */
x86_mov_reg_reg (code, X86_ECX, X86_EBP, 4);
x86_alu_reg_imm (code, X86_ADD, X86_ECX, 8);
/* eax = callee argument area */
x86_mov_reg_reg (code, X86_EAX, X86_ESP, 4);
/* Call start_gsharedvt_call */
/* Arg 4 */
x86_push_membase (code, X86_EBP, mrgctx_offset);
/* Arg3 */
x86_push_reg (code, X86_EAX);
/* Arg2 */
x86_push_reg (code, X86_ECX);
/* Arg1 */
x86_push_membase (code, X86_EBP, info_offset);
if (aot) {
code = mono_arch_emit_load_aotconst (buf, code, &ji, MONO_PATCH_INFO_JIT_ICALL_ADDR, "mono_x86_start_gsharedvt_call");
x86_call_reg (code, X86_EAX);
} else {
x86_call_code (code, mono_x86_start_gsharedvt_call);
}
x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4 * 4);
/* The address to call is in eax */
/* The stack is now setup for the real call */
/* Load info struct */
x86_mov_reg_membase (code, X86_ECX, X86_EBP, info_offset, 4);
/* Load rgctx */
x86_mov_reg_membase (code, MONO_ARCH_RGCTX_REG, X86_EBP, mrgctx_offset, sizeof (gpointer));
/* Make the call */
x86_call_reg (code, X86_EAX);
/* The return value is either in registers, or stored to an area beginning at sp [info->vret_slot] */
/* EAX/EDX might contain the return value, only ECX is free */
/* Load info struct */
x86_mov_reg_membase (code, X86_ECX, X86_EBP, info_offset, 4);
/* Branch to the in/out handling code */
x86_alu_membase_imm (code, X86_CMP, X86_ECX, MONO_STRUCT_OFFSET (GSharedVtCallInfo, gsharedvt_in), 1);
br_out = code;
x86_branch32 (code, X86_CC_NE, 0, TRUE);
/*
* IN CASE
*/
/* Load ret marshal type */
x86_mov_reg_membase (code, X86_ECX, X86_ECX, MONO_STRUCT_OFFSET (GSharedVtCallInfo, ret_marshal), 4);
x86_alu_reg_imm (code, X86_CMP, X86_ECX, GSHAREDVT_RET_NONE);
br [0] = code;
x86_branch8 (code, X86_CC_NE, 0, TRUE);
/* Normal return, no marshalling required */
x86_leave (code);
x86_ret (code);
/* Return value marshalling */
x86_patch (br [0], code);
/* Load info struct */
x86_mov_reg_membase (code, X86_EAX, X86_EBP, info_offset, 4);
/* Load 'vret_slot' */
x86_mov_reg_membase (code, X86_EAX, X86_EAX, MONO_STRUCT_OFFSET (GSharedVtCallInfo, vret_slot), 4);
/* Compute ret area address */
x86_shift_reg_imm (code, X86_SHL, X86_EAX, 2);
x86_alu_reg_reg (code, X86_ADD, X86_EAX, X86_ESP);
/* The callee does a ret $4, so sp is off by 4 */
x86_alu_reg_imm (code, X86_SUB, X86_EAX, sizeof (gpointer));
/* Branch to specific marshalling code */
// FIXME: Move the I4 case to the top */
x86_alu_reg_imm (code, X86_CMP, X86_ECX, GSHAREDVT_RET_DOUBLE_FPSTACK);
br [1] = code;
x86_branch8 (code, X86_CC_E, 0, TRUE);
x86_alu_reg_imm (code, X86_CMP, X86_ECX, GSHAREDVT_RET_FLOAT_FPSTACK);
br [2] = code;
x86_branch8 (code, X86_CC_E, 0, TRUE);
x86_alu_reg_imm (code, X86_CMP, X86_ECX, GSHAREDVT_RET_STACK_POP);
br [3] = code;
x86_branch8 (code, X86_CC_E, 0, TRUE);
x86_alu_reg_imm (code, X86_CMP, X86_ECX, GSHAREDVT_RET_I1);
br [4] = code;
x86_branch8 (code, X86_CC_E, 0, TRUE);
x86_alu_reg_imm (code, X86_CMP, X86_ECX, GSHAREDVT_RET_U1);
br [5] = code;
x86_branch8 (code, X86_CC_E, 0, TRUE);
x86_alu_reg_imm (code, X86_CMP, X86_ECX, GSHAREDVT_RET_I2);
br [6] = code;
x86_branch8 (code, X86_CC_E, 0, TRUE);
x86_alu_reg_imm (code, X86_CMP, X86_ECX, GSHAREDVT_RET_U2);
br [7] = code;
x86_branch8 (code, X86_CC_E, 0, TRUE);
/* IREGS case */
/* Load both eax and edx for simplicity */
x86_mov_reg_membase (code, X86_EDX, X86_EAX, sizeof (gpointer), sizeof (gpointer));
x86_mov_reg_membase (code, X86_EAX, X86_EAX, 0, sizeof (gpointer));
x86_leave (code);
x86_ret (code);
/* DOUBLE_FPSTACK case */
x86_patch (br [1], code);
x86_fld_membase (code, X86_EAX, 0, TRUE);
x86_jump8 (code, 0);
x86_leave (code);
x86_ret (code);
/* FLOAT_FPSTACK case */
x86_patch (br [2], code);
x86_fld_membase (code, X86_EAX, 0, FALSE);
x86_leave (code);
x86_ret (code);
/* STACK_POP case */
x86_patch (br [3], code);
x86_leave (code);
x86_ret_imm (code, 4);
/* I1 case */
x86_patch (br [4], code);
x86_widen_membase (code, X86_EAX, X86_EAX, 0, TRUE, FALSE);
x86_leave (code);
x86_ret (code);
/* U1 case */
x86_patch (br [5], code);
x86_widen_membase (code, X86_EAX, X86_EAX, 0, FALSE, FALSE);
x86_leave (code);
x86_ret (code);
/* I2 case */
x86_patch (br [6], code);
x86_widen_membase (code, X86_EAX, X86_EAX, 0, TRUE, TRUE);
x86_leave (code);
x86_ret (code);
/* U2 case */
x86_patch (br [7], code);
x86_widen_membase (code, X86_EAX, X86_EAX, 0, FALSE, TRUE);
x86_leave (code);
x86_ret (code);
/*
* OUT CASE
*/
x86_patch (br_out, code);
/* Load ret marshal type into ECX */
x86_mov_reg_membase (code, X86_ECX, X86_ECX, MONO_STRUCT_OFFSET (GSharedVtCallInfo, ret_marshal), 4);
x86_alu_reg_imm (code, X86_CMP, X86_ECX, GSHAREDVT_RET_NONE);
br [0] = code;
x86_branch8 (code, X86_CC_NE, 0, TRUE);
/* Normal return, no marshalling required */
x86_leave (code);
x86_ret (code);
/* Return value marshalling */
x86_patch (br [0], code);
/* EAX might contain the return value */
// FIXME: Use moves
x86_push_reg (code, X86_EAX);
/* Load info struct */
x86_mov_reg_membase (code, X86_EAX, X86_EBP, info_offset, 4);
/* Load 'vret_arg_slot' */
x86_mov_reg_membase (code, X86_EAX, X86_EAX, MONO_STRUCT_OFFSET (GSharedVtCallInfo, vret_arg_slot), 4);
/* Compute ret area address in the caller frame in EAX */
x86_shift_reg_imm (code, X86_SHL, X86_EAX, 2);
x86_alu_reg_reg (code, X86_ADD, X86_EAX, X86_EBP);
x86_alu_reg_imm (code, X86_ADD, X86_EAX, 8);
x86_mov_reg_membase (code, X86_EAX, X86_EAX, 0, sizeof (gpointer));
/* Branch to specific marshalling code */
x86_alu_reg_imm (code, X86_CMP, X86_ECX, GSHAREDVT_RET_DOUBLE_FPSTACK);
br [1] = code;
x86_branch8 (code, X86_CC_E, 0, TRUE);
x86_alu_reg_imm (code, X86_CMP, X86_ECX, GSHAREDVT_RET_FLOAT_FPSTACK);
br [2] = code;
x86_branch8 (code, X86_CC_E, 0, TRUE);
x86_alu_reg_imm (code, X86_CMP, X86_ECX, GSHAREDVT_RET_STACK_POP);
br [3] = code;
x86_branch8 (code, X86_CC_E, 0, TRUE);
x86_alu_reg_imm (code, X86_CMP, X86_ECX, GSHAREDVT_RET_IREGS);
br [4] = code;
x86_branch8 (code, X86_CC_E, 0, TRUE);
/* IREG case */
x86_mov_reg_reg (code, X86_ECX, X86_EAX, sizeof (gpointer));
x86_pop_reg (code, X86_EAX);
x86_mov_membase_reg (code, X86_ECX, 0, X86_EAX, sizeof (gpointer));
x86_leave (code);
x86_ret_imm (code, 4);
/* IREGS case */
x86_patch (br [4], code);
x86_mov_reg_reg (code, X86_ECX, X86_EAX, sizeof (gpointer));
x86_pop_reg (code, X86_EAX);
x86_mov_membase_reg (code, X86_ECX, sizeof (gpointer), X86_EDX, sizeof (gpointer));
x86_mov_membase_reg (code, X86_ECX, 0, X86_EAX, sizeof (gpointer));
x86_leave (code);
x86_ret_imm (code, 4);
/* DOUBLE_FPSTACK case */
x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
x86_patch (br [1], code);
x86_fst_membase (code, X86_EAX, 0, TRUE, TRUE);
x86_jump8 (code, 0);
x86_leave (code);
x86_ret_imm (code, 4);
/* FLOAT_FPSTACK case */
x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
x86_patch (br [2], code);
x86_fst_membase (code, X86_EAX, 0, FALSE, TRUE);
x86_leave (code);
x86_ret_imm (code, 4);
/* STACK_POP case */
x86_patch (br [3], code);
x86_leave (code);
x86_ret_imm (code, 4);
g_assert ((code - buf) < buf_len);
if (info)
*info = mono_tramp_info_create ("gsharedvt_trampoline", buf, code - buf, ji, unwind_ops);
mono_arch_flush_icache (buf, code - buf);
return buf;
}
/*
* Perform an integer division or remainder.
*/
static void Divide(MDUnroll *unroll, int isSigned, int wantRemainder,
unsigned char *pc, unsigned char *label)
{
#if !defined(IL_USE_INTERRUPT_BASED_INT_DIVIDE_BY_ZERO_CHECKS)
#define IL_NEED_DIVIDE_REEXECUTE 1
unsigned char *patch1;
#endif
#if !defined(IL_USE_INTERRUPT_BASED_INT_OVERFLOW_CHECKS)
#define IL_NEED_DIVIDE_REEXECUTE 1
unsigned char *patch2, *patch3;
#endif
/* Get the arguments into EAX and ECX so we know where they are */
if(unroll->pseudoStackSize != 2 ||
unroll->pseudoStack[0] != X86_EAX ||
unroll->pseudoStack[1] != X86_ECX)
{
FlushRegisterStack(unroll);
unroll->stackHeight -= 8;
x86_mov_reg_membase(unroll->out, X86_EAX, MD_REG_STACK,
unroll->stackHeight, 4);
x86_mov_reg_membase(unroll->out, X86_ECX, MD_REG_STACK,
unroll->stackHeight + 4, 4);
unroll->pseudoStack[0] = X86_EAX;
unroll->pseudoStack[1] = X86_ECX;
unroll->pseudoStackSize = 2;
unroll->regsUsed |= ((1 << X86_EAX) | (1 << X86_ECX));
}
/* Check for conditions that may cause an exception */
#if !defined(IL_USE_INTERRUPT_BASED_INT_DIVIDE_BY_ZERO_CHECKS)
x86_alu_reg_imm(unroll->out, X86_CMP, X86_ECX, 0);
patch1 = unroll->out;
x86_branch8(unroll->out, X86_CC_EQ, 0, 0);
#endif
#if !defined(IL_USE_INTERRUPT_BASED_INT_OVERFLOW_CHECKS)
x86_alu_reg_imm(unroll->out, X86_CMP, X86_ECX, -1);
patch2 = unroll->out;
x86_branch32(unroll->out, X86_CC_NE, 0, 0);
x86_alu_reg_imm(unroll->out, X86_CMP, X86_EAX, (int)0x80000000);
patch3 = unroll->out;
x86_branch32(unroll->out, X86_CC_NE, 0, 0);
#endif
#if !defined(IL_USE_INTERRUPT_BASED_INT_DIVIDE_BY_ZERO_CHECKS)
x86_patch(patch1, unroll->out);
#endif
#if defined(IL_NEED_DIVIDE_REEXECUTE)
/* Re-execute the division instruction to throw the exception */
ReExecute(unroll, pc, label);
#endif
#if !defined(IL_USE_INTERRUPT_BASED_INT_OVERFLOW_CHECKS)
x86_patch(patch2, unroll->out);
x86_patch(patch3, unroll->out);
#endif
/* Perform the division */
if(isSigned)
{
x86_cdq(unroll->out);
}
else
{
x86_clear_reg(unroll->out, X86_EDX);
}
x86_div_reg(unroll->out, X86_ECX, isSigned);
/* Pop ECX from the pseudo stack */
FreeTopRegister(unroll, -1);
/* If we want the remainder, then replace EAX with EDX on the stack */
if(wantRemainder)
{
unroll->pseudoStack[0] = X86_EDX;
unroll->regsUsed = (1 << X86_EDX);
}
}
gpointer
mono_arch_create_rgctx_lazy_fetch_trampoline (guint32 slot, MonoTrampInfo **info, gboolean aot)
{
guint8 *tramp;
guint8 *code, *buf;
guint8 **rgctx_null_jumps;
int tramp_size;
int depth, index;
int i;
gboolean mrgctx;
MonoJumpInfo *ji = NULL;
GSList *unwind_ops = NULL;
unwind_ops = mono_arch_get_cie_program ();
mrgctx = MONO_RGCTX_SLOT_IS_MRGCTX (slot);
index = MONO_RGCTX_SLOT_INDEX (slot);
if (mrgctx)
index += MONO_SIZEOF_METHOD_RUNTIME_GENERIC_CONTEXT / sizeof (target_mgreg_t);
for (depth = 0; ; ++depth) {
int size = mono_class_rgctx_get_array_size (depth, mrgctx);
if (index < size - 1)
break;
index -= size - 1;
}
tramp_size = (aot ? 64 : 36) + 6 * depth;
code = buf = mono_global_codeman_reserve (tramp_size);
rgctx_null_jumps = g_malloc (sizeof (guint8*) * (depth + 2));
/* load vtable/mrgctx ptr */
x86_mov_reg_membase (code, X86_EAX, X86_ESP, 4, 4);
if (!mrgctx) {
/* load rgctx ptr from vtable */
x86_mov_reg_membase (code, X86_EAX, X86_EAX, MONO_STRUCT_OFFSET (MonoVTable, runtime_generic_context), 4);
/* is the rgctx ptr null? */
x86_test_reg_reg (code, X86_EAX, X86_EAX);
/* if yes, jump to actual trampoline */
rgctx_null_jumps [0] = code;
x86_branch8 (code, X86_CC_Z, -1, 1);
}
for (i = 0; i < depth; ++i) {
/* load ptr to next array */
if (mrgctx && i == 0)
x86_mov_reg_membase (code, X86_EAX, X86_EAX, MONO_SIZEOF_METHOD_RUNTIME_GENERIC_CONTEXT, 4);
else
x86_mov_reg_membase (code, X86_EAX, X86_EAX, 0, 4);
/* is the ptr null? */
x86_test_reg_reg (code, X86_EAX, X86_EAX);
/* if yes, jump to actual trampoline */
rgctx_null_jumps [i + 1] = code;
x86_branch8 (code, X86_CC_Z, -1, 1);
}
/* fetch slot */
x86_mov_reg_membase (code, X86_EAX, X86_EAX, sizeof (target_mgreg_t) * (index + 1), 4);
/* is the slot null? */
x86_test_reg_reg (code, X86_EAX, X86_EAX);
/* if yes, jump to actual trampoline */
rgctx_null_jumps [depth + 1] = code;
x86_branch8 (code, X86_CC_Z, -1, 1);
/* otherwise return */
x86_ret (code);
for (i = mrgctx ? 1 : 0; i <= depth + 1; ++i)
x86_patch (rgctx_null_jumps [i], code);
g_free (rgctx_null_jumps);
x86_mov_reg_membase (code, MONO_ARCH_VTABLE_REG, X86_ESP, 4, 4);
if (aot) {
code = mono_arch_emit_load_aotconst (buf, code, &ji, MONO_PATCH_INFO_SPECIFIC_TRAMPOLINE_LAZY_FETCH_ADDR, GUINT_TO_POINTER (slot));
x86_jump_reg (code, X86_EAX);
} else {
tramp = (guint8*)mono_arch_create_specific_trampoline (GUINT_TO_POINTER (slot), MONO_TRAMPOLINE_RGCTX_LAZY_FETCH, mono_get_root_domain (), NULL);
/* jump to the actual trampoline */
x86_jump_code (code, tramp);
}
mono_arch_flush_icache (buf, code - buf);
MONO_PROFILER_RAISE (jit_code_buffer, (buf, code - buf, MONO_PROFILER_CODE_BUFFER_GENERICS_TRAMPOLINE, NULL));
g_assert (code - buf <= tramp_size);
char *name = mono_get_rgctx_fetch_trampoline_name (slot);
*info = mono_tramp_info_create (name, buf, code - buf, ji, unwind_ops);
g_free (name);
return buf;
}
void
mono_x86_patch (unsigned char* code, gpointer target)
{
x86_patch (code, (unsigned char*)target);
}
