HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine) { int i; HotpluggableCPUList *head = NULL; MachineClass *mc = MACHINE_GET_CLASS(machine); /* force board to initialize possible_cpus if it hasn't been done yet */ mc->possible_cpu_arch_ids(machine); for (i = 0; i < machine->possible_cpus->len; i++) { Object *cpu; HotpluggableCPUList *list_item = g_new0(typeof(*list_item), 1); HotpluggableCPU *cpu_item = g_new0(typeof(*cpu_item), 1); cpu_item->type = g_strdup(machine->possible_cpus->cpus[i].type); cpu_item->vcpus_count = machine->possible_cpus->cpus[i].vcpus_count; cpu_item->props = g_memdup(&machine->possible_cpus->cpus[i].props, sizeof(*cpu_item->props)); cpu = machine->possible_cpus->cpus[i].cpu; if (cpu) { cpu_item->has_qom_path = true; cpu_item->qom_path = object_get_canonical_path(cpu); } list_item->value = cpu_item; list_item->next = head; head = list_item; } return head; }
void qmp_cpu_add(int64_t id, Error **errp) { MachineClass *mc; mc = MACHINE_GET_CLASS(current_machine); if (mc->hot_add_cpu) { mc->hot_add_cpu(id, errp); } else { error_setg(errp, "Not supported"); } }
static void machine_numa_finish_init(MachineState *machine) { int i; bool default_mapping; GString *s = g_string_new(NULL); MachineClass *mc = MACHINE_GET_CLASS(machine); const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(machine); assert(nb_numa_nodes); for (i = 0; i < possible_cpus->len; i++) { if (possible_cpus->cpus[i].props.has_node_id) { break; } } default_mapping = (i == possible_cpus->len); for (i = 0; i < possible_cpus->len; i++) { const CPUArchId *cpu_slot = &possible_cpus->cpus[i]; if (!cpu_slot->props.has_node_id) { /* fetch default mapping from board and enable it */ CpuInstanceProperties props = cpu_slot->props; props.node_id = mc->get_default_cpu_node_id(machine, i); if (!default_mapping) { /* record slots with not set mapping, * TODO: make it hard error in future */ char *cpu_str = cpu_slot_to_string(cpu_slot); g_string_append_printf(s, "%sCPU %d [%s]", s->len ? ", " : "", i, cpu_str); g_free(cpu_str); /* non mapped cpus used to fallback to node 0 */ props.node_id = 0; } props.has_node_id = true; machine_set_cpu_numa_node(machine, &props, &error_fatal); } } if (s->len && !qtest_enabled()) { warn_report("CPU(s) not present in any NUMA nodes: %s", s->str); warn_report("All CPU(s) up to maxcpus should be described " "in NUMA config, ability to start up with partial NUMA " "mappings is obsoleted and will be removed in future"); } g_string_free(s, true); }
void cpu_hotplug_hw_init(MemoryRegion *as, Object *owner, CPUHotplugState *state, hwaddr base_addr) { MachineState *machine = MACHINE(qdev_get_machine()); MachineClass *mc = MACHINE_GET_CLASS(machine); const CPUArchIdList *id_list; int i; assert(mc->possible_cpu_arch_ids); id_list = mc->possible_cpu_arch_ids(machine); state->dev_count = id_list->len; state->devs = g_new0(typeof(*state->devs), state->dev_count); for (i = 0; i < id_list->len; i++) { state->devs[i].cpu = CPU(id_list->cpus[i].cpu); state->devs[i].arch_id = id_list->cpus[i].arch_id; } memory_region_init_io(&state->ctrl_reg, owner, &cpu_hotplug_ops, state, "acpi-mem-hotplug", ACPI_CPU_HOTPLUG_REG_LEN); memory_region_add_subregion(as, base_addr, &state->ctrl_reg); }
/** * machine_set_cpu_numa_node: * @machine: machine object to modify * @props: specifies which cpu objects to assign to * numa node specified by @props.node_id * @errp: if an error occurs, a pointer to an area to store the error * * Associate NUMA node specified by @props.node_id with cpu slots that * match socket/core/thread-ids specified by @props. It's recommended to use * query-hotpluggable-cpus.props values to specify affected cpu slots, * which would lead to exact 1:1 mapping of cpu slots to NUMA node. * * However for CLI convenience it's possible to pass in subset of properties, * which would affect all cpu slots that match it. * Ex for pc machine: * -smp 4,cores=2,sockets=2 -numa node,nodeid=0 -numa node,nodeid=1 \ * -numa cpu,node-id=0,socket_id=0 \ * -numa cpu,node-id=1,socket_id=1 * will assign all child cores of socket 0 to node 0 and * of socket 1 to node 1. * * On attempt of reassigning (already assigned) cpu slot to another NUMA node, * return error. * Empty subset is disallowed and function will return with error in this case. */ void machine_set_cpu_numa_node(MachineState *machine, const CpuInstanceProperties *props, Error **errp) { MachineClass *mc = MACHINE_GET_CLASS(machine); bool match = false; int i; if (!mc->possible_cpu_arch_ids) { error_setg(errp, "mapping of CPUs to NUMA node is not supported"); return; } /* disabling node mapping is not supported, forbid it */ assert(props->has_node_id); /* force board to initialize possible_cpus if it hasn't been done yet */ mc->possible_cpu_arch_ids(machine); for (i = 0; i < machine->possible_cpus->len; i++) { CPUArchId *slot = &machine->possible_cpus->cpus[i]; /* reject unsupported by board properties */ if (props->has_thread_id && !slot->props.has_thread_id) { error_setg(errp, "thread-id is not supported"); return; } if (props->has_core_id && !slot->props.has_core_id) { error_setg(errp, "core-id is not supported"); return; } if (props->has_socket_id && !slot->props.has_socket_id) { error_setg(errp, "socket-id is not supported"); return; } /* skip slots with explicit mismatch */ if (props->has_thread_id && props->thread_id != slot->props.thread_id) { continue; } if (props->has_core_id && props->core_id != slot->props.core_id) { continue; } if (props->has_socket_id && props->socket_id != slot->props.socket_id) { continue; } /* reject assignment if slot is already assigned, for compatibility * of legacy cpu_index mapping with SPAPR core based mapping do not * error out if cpu thread and matched core have the same node-id */ if (slot->props.has_node_id && slot->props.node_id != props->node_id) { error_setg(errp, "CPU is already assigned to node-id: %" PRId64, slot->props.node_id); return; } /* assign slot to node as it's matched '-numa cpu' key */ match = true; slot->props.node_id = props->node_id; slot->props.has_node_id = props->has_node_id; } if (!match) { error_setg(errp, "no match found"); } }
void build_cpus_aml(Aml *table, MachineState *machine, CPUHotplugFeatures opts, hwaddr io_base, const char *res_root, const char *event_handler_method) { Aml *ifctx; Aml *field; Aml *method; Aml *cpu_ctrl_dev; Aml *cpus_dev; Aml *zero = aml_int(0); Aml *one = aml_int(1); Aml *sb_scope = aml_scope("_SB"); MachineClass *mc = MACHINE_GET_CLASS(machine); const CPUArchIdList *arch_ids = mc->possible_cpu_arch_ids(machine); char *cphp_res_path = g_strdup_printf("%s." CPUHP_RES_DEVICE, res_root); Object *obj = object_resolve_path_type("", TYPE_ACPI_DEVICE_IF, NULL); AcpiDeviceIfClass *adevc = ACPI_DEVICE_IF_GET_CLASS(obj); AcpiDeviceIf *adev = ACPI_DEVICE_IF(obj); cpu_ctrl_dev = aml_device("%s", cphp_res_path); { Aml *crs; aml_append(cpu_ctrl_dev, aml_name_decl("_HID", aml_eisaid("PNP0A06"))); aml_append(cpu_ctrl_dev, aml_name_decl("_UID", aml_string("CPU Hotplug resources"))); aml_append(cpu_ctrl_dev, aml_mutex(CPU_LOCK, 0)); crs = aml_resource_template(); aml_append(crs, aml_io(AML_DECODE16, io_base, io_base, 1, ACPI_CPU_HOTPLUG_REG_LEN)); aml_append(cpu_ctrl_dev, aml_name_decl("_CRS", crs)); /* declare CPU hotplug MMIO region with related access fields */ aml_append(cpu_ctrl_dev, aml_operation_region("PRST", AML_SYSTEM_IO, aml_int(io_base), ACPI_CPU_HOTPLUG_REG_LEN)); field = aml_field("PRST", AML_BYTE_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS); aml_append(field, aml_reserved_field(ACPI_CPU_FLAGS_OFFSET_RW * 8)); /* 1 if enabled, read only */ aml_append(field, aml_named_field(CPU_ENABLED, 1)); /* (read) 1 if has a insert event. (write) 1 to clear event */ aml_append(field, aml_named_field(CPU_INSERT_EVENT, 1)); /* (read) 1 if has a remove event. (write) 1 to clear event */ aml_append(field, aml_named_field(CPU_REMOVE_EVENT, 1)); /* initiates device eject, write only */ aml_append(field, aml_named_field(CPU_EJECT_EVENT, 1)); aml_append(field, aml_reserved_field(4)); aml_append(field, aml_named_field(CPU_COMMAND, 8)); aml_append(cpu_ctrl_dev, field); field = aml_field("PRST", AML_DWORD_ACC, AML_NOLOCK, AML_PRESERVE); /* CPU selector, write only */ aml_append(field, aml_named_field(CPU_SELECTOR, 32)); /* flags + cmd + 2byte align */ aml_append(field, aml_reserved_field(4 * 8)); aml_append(field, aml_named_field(CPU_DATA, 32)); aml_append(cpu_ctrl_dev, field); if (opts.has_legacy_cphp) { method = aml_method("_INI", 0, AML_SERIALIZED); /* switch off legacy CPU hotplug HW and use new one, * on reboot system is in new mode and writing 0 * in CPU_SELECTOR selects BSP, which is NOP at * the time _INI is called */ aml_append(method, aml_store(zero, aml_name(CPU_SELECTOR))); aml_append(cpu_ctrl_dev, method); } } aml_append(sb_scope, cpu_ctrl_dev); cpus_dev = aml_device("\\_SB.CPUS"); { int i; Aml *ctrl_lock = aml_name("%s.%s", cphp_res_path, CPU_LOCK); Aml *cpu_selector = aml_name("%s.%s", cphp_res_path, CPU_SELECTOR); Aml *is_enabled = aml_name("%s.%s", cphp_res_path, CPU_ENABLED); Aml *cpu_cmd = aml_name("%s.%s", cphp_res_path, CPU_COMMAND); Aml *cpu_data = aml_name("%s.%s", cphp_res_path, CPU_DATA); Aml *ins_evt = aml_name("%s.%s", cphp_res_path, CPU_INSERT_EVENT); Aml *rm_evt = aml_name("%s.%s", cphp_res_path, CPU_REMOVE_EVENT); Aml *ej_evt = aml_name("%s.%s", cphp_res_path, CPU_EJECT_EVENT); aml_append(cpus_dev, aml_name_decl("_HID", aml_string("ACPI0010"))); aml_append(cpus_dev, aml_name_decl("_CID", aml_eisaid("PNP0A05"))); method = aml_method(CPU_NOTIFY_METHOD, 2, AML_NOTSERIALIZED); for (i = 0; i < arch_ids->len; i++) { Aml *cpu = aml_name(CPU_NAME_FMT, i); Aml *uid = aml_arg(0); Aml *event = aml_arg(1); ifctx = aml_if(aml_equal(uid, aml_int(i))); { aml_append(ifctx, aml_notify(cpu, event)); } aml_append(method, ifctx); } aml_append(cpus_dev, method); method = aml_method(CPU_STS_METHOD, 1, AML_SERIALIZED); { Aml *idx = aml_arg(0); Aml *sta = aml_local(0); aml_append(method, aml_acquire(ctrl_lock, 0xFFFF)); aml_append(method, aml_store(idx, cpu_selector)); aml_append(method, aml_store(zero, sta)); ifctx = aml_if(aml_equal(is_enabled, one)); { aml_append(ifctx, aml_store(aml_int(0xF), sta)); } aml_append(method, ifctx); aml_append(method, aml_release(ctrl_lock)); aml_append(method, aml_return(sta)); } aml_append(cpus_dev, method); method = aml_method(CPU_EJECT_METHOD, 1, AML_SERIALIZED); { Aml *idx = aml_arg(0); aml_append(method, aml_acquire(ctrl_lock, 0xFFFF)); aml_append(method, aml_store(idx, cpu_selector)); aml_append(method, aml_store(one, ej_evt)); aml_append(method, aml_release(ctrl_lock)); } aml_append(cpus_dev, method); method = aml_method(CPU_SCAN_METHOD, 0, AML_SERIALIZED); { Aml *else_ctx; Aml *while_ctx; Aml *has_event = aml_local(0); Aml *dev_chk = aml_int(1); Aml *eject_req = aml_int(3); Aml *next_cpu_cmd = aml_int(CPHP_GET_NEXT_CPU_WITH_EVENT_CMD); aml_append(method, aml_acquire(ctrl_lock, 0xFFFF)); aml_append(method, aml_store(one, has_event)); while_ctx = aml_while(aml_equal(has_event, one)); { /* clear loop exit condition, ins_evt/rm_evt checks * will set it to 1 while next_cpu_cmd returns a CPU * with events */ aml_append(while_ctx, aml_store(zero, has_event)); aml_append(while_ctx, aml_store(next_cpu_cmd, cpu_cmd)); ifctx = aml_if(aml_equal(ins_evt, one)); { aml_append(ifctx, aml_call2(CPU_NOTIFY_METHOD, cpu_data, dev_chk)); aml_append(ifctx, aml_store(one, ins_evt)); aml_append(ifctx, aml_store(one, has_event)); } aml_append(while_ctx, ifctx); else_ctx = aml_else(); ifctx = aml_if(aml_equal(rm_evt, one)); { aml_append(ifctx, aml_call2(CPU_NOTIFY_METHOD, cpu_data, eject_req)); aml_append(ifctx, aml_store(one, rm_evt)); aml_append(ifctx, aml_store(one, has_event)); } aml_append(else_ctx, ifctx); aml_append(while_ctx, else_ctx); } aml_append(method, while_ctx); aml_append(method, aml_release(ctrl_lock)); } aml_append(cpus_dev, method); method = aml_method(CPU_OST_METHOD, 4, AML_SERIALIZED); { Aml *uid = aml_arg(0); Aml *ev_cmd = aml_int(CPHP_OST_EVENT_CMD); Aml *st_cmd = aml_int(CPHP_OST_STATUS_CMD); aml_append(method, aml_acquire(ctrl_lock, 0xFFFF)); aml_append(method, aml_store(uid, cpu_selector)); aml_append(method, aml_store(ev_cmd, cpu_cmd)); aml_append(method, aml_store(aml_arg(1), cpu_data)); aml_append(method, aml_store(st_cmd, cpu_cmd)); aml_append(method, aml_store(aml_arg(2), cpu_data)); aml_append(method, aml_release(ctrl_lock)); } aml_append(cpus_dev, method); /* build Processor object for each processor */ for (i = 0; i < arch_ids->len; i++) { Aml *dev; Aml *uid = aml_int(i); GArray *madt_buf = g_array_new(0, 1, 1); int arch_id = arch_ids->cpus[i].arch_id; if (opts.acpi_1_compatible && arch_id < 255) { dev = aml_processor(i, 0, 0, CPU_NAME_FMT, i); } else { dev = aml_device(CPU_NAME_FMT, i); aml_append(dev, aml_name_decl("_HID", aml_string("ACPI0007"))); aml_append(dev, aml_name_decl("_UID", uid)); } method = aml_method("_STA", 0, AML_SERIALIZED); aml_append(method, aml_return(aml_call1(CPU_STS_METHOD, uid))); aml_append(dev, method); /* build _MAT object */ assert(adevc && adevc->madt_cpu); adevc->madt_cpu(adev, i, arch_ids, madt_buf); switch (madt_buf->data[0]) { case ACPI_APIC_PROCESSOR: { AcpiMadtProcessorApic *apic = (void *)madt_buf->data; apic->flags = cpu_to_le32(1); break; } case ACPI_APIC_LOCAL_X2APIC: { AcpiMadtProcessorX2Apic *apic = (void *)madt_buf->data; apic->flags = cpu_to_le32(1); break; } default: assert(0); } aml_append(dev, aml_name_decl("_MAT", aml_buffer(madt_buf->len, (uint8_t *)madt_buf->data))); g_array_free(madt_buf, true); if (CPU(arch_ids->cpus[i].cpu) != first_cpu) { method = aml_method("_EJ0", 1, AML_NOTSERIALIZED); aml_append(method, aml_call1(CPU_EJECT_METHOD, uid)); aml_append(dev, method); } method = aml_method("_OST", 3, AML_SERIALIZED); aml_append(method, aml_call4(CPU_OST_METHOD, uid, aml_arg(0), aml_arg(1), aml_arg(2)) ); aml_append(dev, method); /* Linux guests discard SRAT info for non-present CPUs * as a result _PXM is required for all CPUs which might * be hot-plugged. For simplicity, add it for all CPUs. */ if (arch_ids->cpus[i].props.has_node_id) { aml_append(dev, aml_name_decl("_PXM", aml_int(arch_ids->cpus[i].props.node_id))); } aml_append(cpus_dev, dev); } } aml_append(sb_scope, cpus_dev); aml_append(table, sb_scope); method = aml_method(event_handler_method, 0, AML_NOTSERIALIZED); aml_append(method, aml_call0("\\_SB.CPUS." CPU_SCAN_METHOD)); aml_append(table, method); g_free(cphp_res_path); }
XfrClass::XfrClass( Ref * & pc, MachineClass & m, int preflight ) : origin( NULL ), cage( m.heap().preflight( pc, preflight ) ) { this->tmptop = this->cage->top; }