double uhd_device::set_rates(double rate)
{
double actual_rt, actual_clk_rt;
#if !defined(MULTICHAN) & !defined(RESAMPLE)
// Make sure we can set the master clock rate on this device
actual_clk_rt = usrp_dev->get_master_clock_rate();
if (actual_clk_rt > U1_DEFAULT_CLK_RT) {
LOG(ALERT) << "Cannot set clock rate on this device";
LOG(ALERT) << "Please compile with host resampling support";
return -1.0;
}
// Set master clock rate
usrp_dev->set_master_clock_rate(master_clk_rt);
actual_clk_rt = usrp_dev->get_master_clock_rate();
if (actual_clk_rt != master_clk_rt) {
LOG(ALERT) << "Failed to set master clock rate";
LOG(ALERT) << "Actual clock rate " << actual_clk_rt;
return -1.0;
}
#endif
// Set sample rates
usrp_dev->set_tx_rate(rate);
usrp_dev->set_rx_rate(rate);
actual_rt = usrp_dev->get_tx_rate();
if (actual_rt != rate) {
LOG(ALERT) << "Actual sample rate differs from desired rate";
LOG(ALERT) << actual_rt << "Hz";
return -1.0;
}
if (usrp_dev->get_rx_rate() != actual_rt) {
LOG(ALERT) << "Transmit and receive sample rates do not match";
return -1.0;
}
return actual_rt;
}
int uhd_device::set_master_clk(double clk_rate)
{
double actual, offset, limit = 1.0;
try {
usrp_dev->set_master_clock_rate(clk_rate);
} catch (const std::exception &ex) {
LOG(ALERT) << "UHD clock rate setting failed: " << clk_rate;
LOG(ALERT) << ex.what();
return -1;
}
actual = usrp_dev->get_master_clock_rate();
offset = fabs(clk_rate - actual);
if (offset > limit) {
LOG(ALERT) << "Failed to set master clock rate";
LOG(ALERT) << "Requested clock rate " << clk_rate;
LOG(ALERT) << "Actual clock rate " << actual;
return -1;
}
return 0;
}
