Ejemplo n.º 1
0
/**
 * Start the assigned ASRC pair
 *
 * It enables the assigned pair and makes it stopped at the stall level.
 */
static void fsl_asrc_start_pair(struct fsl_asrc_pair *pair)
{
	struct fsl_asrc *asrc_priv = pair->asrc_priv;
	enum asrc_pair_index index = pair->index;
	int reg, retry = 10, i;

	/* Enable the current pair */
	regmap_update_bits(asrc_priv->regmap, REG_ASRCTR,
			   ASRCTR_ASRCEi_MASK(index), ASRCTR_ASRCE(index));

	/* Wait for status of initialization */
	do {
		udelay(5);
		regmap_read(asrc_priv->regmap, REG_ASRCFG, &reg);
		reg &= ASRCFG_INIRQi_MASK(index);
	} while (!reg && --retry);

	/* Make the input fifo to ASRC STALL level */
	regmap_read(asrc_priv->regmap, REG_ASRCNCR, &reg);
	for (i = 0; i < pair->channels * 4; i++)
		regmap_write(asrc_priv->regmap, REG_ASRDI(index), 0);

	/* Enable overload interrupt */
	regmap_write(asrc_priv->regmap, REG_ASRIER, ASRIER_AOLIE);
}
Ejemplo n.º 2
0
void asrc_start_conv(enum asrc_pair_index index)
{
	int reg, retry, channels, i;

	regmap_update_bits(asrc->regmap, REG_ASRCTR,
			ASRCTR_ASRCEx_MASK(index), ASRCTR_ASRCE(index));

	/* Wait for status of initialization */
	for (retry = 10, reg = 0; !reg && retry; --retry) {
		udelay(5);
		regmap_read(asrc->regmap, REG_ASRCFG, &reg);
		reg &= ASRCFG_INIRQx_MASK(index);
	}

	/* Set the input fifo to ASRC STALL level */
	regmap_read(asrc->regmap, REG_ASRCNCR, &reg);
	channels = ASRCNCR_ANCx_get(index, reg, asrc->channel_bits);
	for (i = 0; i < channels * 4; i++)
		regmap_write(asrc->regmap, REG_ASRDI(index), 0);

	/* Overload Interrupt Enable */
	regmap_write(asrc->regmap, REG_ASRIER, ASRIER_AOLIE);
}