/**Function*************************************************************
Synopsis [Performs computation of AIGs with choices.]
Description [Takes several AIGs and performs choicing.]
SideEffects []
SeeAlso []
***********************************************************************/
Aig_Man_t * Dch_ComputeChoices( Aig_Man_t * pAig, Dch_Pars_t * pPars )
{
Dch_Man_t * p;
Aig_Man_t * pResult;
abctime clk, clkTotal = Abc_Clock();
// reset random numbers
Aig_ManRandom(1);
// start the choicing manager
p = Dch_ManCreate( pAig, pPars );
// compute candidate equivalence classes
clk = Abc_Clock();
p->ppClasses = Dch_CreateCandEquivClasses( pAig, pPars->nWords, pPars->fVerbose );
p->timeSimInit = Abc_Clock() - clk;
// Dch_ClassesPrint( p->ppClasses, 0 );
p->nLits = Dch_ClassesLitNum( p->ppClasses );
// perform SAT sweeping
Dch_ManSweep( p );
// free memory ahead of time
p->timeTotal = Abc_Clock() - clkTotal;
Dch_ManStop( p );
// create choices
ABC_FREE( pAig->pTable );
pResult = Dch_DeriveChoiceAig( pAig, pPars->fSkipRedSupp );
// count the number of representatives
if ( pPars->fVerbose )
Abc_Print( 1, "STATS: Ands:%8d ->%8d. Reprs:%7d ->%7d. Choices =%7d.\n",
Aig_ManNodeNum(pAig),
Aig_ManNodeNum(pResult),
Dch_DeriveChoiceCountReprs( pAig ),
Dch_DeriveChoiceCountEquivs( pResult ),
Aig_ManChoiceNum( pResult ) );
return pResult;
}
void Mpm_ManPrintStats( Mpm_Man_t * p )
{
printf( "Memory usage: Mig = %.2f MB Map = %.2f MB Cut = %.2f MB Total = %.2f MB. ",
1.0 * Mig_ManObjNum(p->pMig) * sizeof(Mig_Obj_t) / (1 << 20),
1.0 * Mig_ManObjNum(p->pMig) * 48 / (1 << 20),
1.0 * Mmr_StepMemory(p->pManCuts) / (1 << 17),
1.0 * Mig_ManObjNum(p->pMig) * sizeof(Mig_Obj_t) / (1 << 20) +
1.0 * Mig_ManObjNum(p->pMig) * 48 / (1 << 20) +
1.0 * Mmr_StepMemory(p->pManCuts) / (1 << 17) );
if ( p->timeDerive )
{
printf( "\n" );
p->timeTotal = Abc_Clock() - p->timeTotal;
p->timeOther = p->timeTotal - p->timeDerive;
Abc_Print( 1, "Runtime breakdown:\n" );
ABC_PRTP( "Complete cut computation ", p->timeDerive , p->timeTotal );
ABC_PRTP( "- Merging cuts ", p->timeMerge , p->timeTotal );
ABC_PRTP( "- Evaluting cut parameters ", p->timeEval , p->timeTotal );
ABC_PRTP( "- Checking cut containment ", p->timeCompare, p->timeTotal );
ABC_PRTP( "- Adding cuts to storage ", p->timeStore , p->timeTotal );
ABC_PRTP( "Other ", p->timeOther , p->timeTotal );
ABC_PRTP( "TOTAL ", p->timeTotal , p->timeTotal );
}
else
Abc_PrintTime( 1, "Time", Abc_Clock() - p->timeTotal );
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Sfm_NtkPerform( Sfm_Ntk_t * p, Sfm_Par_t * pPars )
{
int i, k, Counter = 0;
p->timeTotal = Abc_Clock();
if ( pPars->fVerbose && Vec_StrSum(p->vFixed) > 0 )
printf( "Performing MFS with %d fixed objects.\n", Vec_StrSum(p->vFixed) );
p->pPars = pPars;
Sfm_NtkPrepare( p );
// Sfm_ComputeInterpolantCheck( p );
// return 0;
p->nTotalNodesBeg = Vec_WecSizeUsedLimits( &p->vFanins, Sfm_NtkPiNum(p), Vec_WecSize(&p->vFanins) - Sfm_NtkPoNum(p) );
p->nTotalEdgesBeg = Vec_WecSizeSize(&p->vFanins) - Sfm_NtkPoNum(p);
Sfm_NtkForEachNode( p, i )
{
if ( Sfm_ObjIsFixed( p, i ) )
continue;
if ( p->pPars->nDepthMax && Sfm_ObjLevel(p, i) > p->pPars->nDepthMax )
continue;
if ( Sfm_ObjFaninNum(p, i) < 2 || Sfm_ObjFaninNum(p, i) > 6 )
continue;
for ( k = 0; Sfm_NodeResub(p, i); k++ )
{
// Counter++;
// break;
}
Counter += (k > 0);
}
p->nTotalNodesEnd = Vec_WecSizeUsedLimits( &p->vFanins, Sfm_NtkPiNum(p), Vec_WecSize(&p->vFanins) - Sfm_NtkPoNum(p) );
p->nTotalEdgesEnd = Vec_WecSizeSize(&p->vFanins) - Sfm_NtkPoNum(p);
p->timeTotal = Abc_Clock() - p->timeTotal;
if ( pPars->fVerbose )
Sfm_NtkPrintStats( p );
return Counter;
}
/**Function*************************************************************
Synopsis [Computes initial values of the new latches.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Vec_Int_t * Abc_NtkRetimeInitialValues( Abc_Ntk_t * pNtkCone, Vec_Int_t * vValues, int fVerbose )
{
Vec_Int_t * vSolution;
Abc_Ntk_t * pNtkMiter, * pNtkLogic;
int RetValue;
abctime clk;
if ( pNtkCone == NULL )
return Vec_IntDup( vValues );
// convert the target network to AIG
pNtkLogic = Abc_NtkDup( pNtkCone );
Abc_NtkToAig( pNtkLogic );
// get the miter
pNtkMiter = Abc_NtkCreateTarget( pNtkLogic, pNtkLogic->vCos, vValues );
if ( fVerbose )
printf( "The miter for initial state computation has %d AIG nodes. ", Abc_NtkNodeNum(pNtkMiter) );
// solve the miter
clk = Abc_Clock();
RetValue = Abc_NtkMiterSat( pNtkMiter, (ABC_INT64_T)500000, (ABC_INT64_T)50000000, 0, NULL, NULL );
if ( fVerbose )
{ ABC_PRT( "SAT solving time", Abc_Clock() - clk ); }
// analyze the result
if ( RetValue == 1 )
printf( "Abc_NtkRetimeInitialValues(): The problem is unsatisfiable. DC latch values are used.\n" );
else if ( RetValue == -1 )
printf( "Abc_NtkRetimeInitialValues(): The SAT problem timed out. DC latch values are used.\n" );
else if ( !Abc_NtkRetimeVerifyModel( pNtkCone, vValues, pNtkMiter->pModel ) )
printf( "Abc_NtkRetimeInitialValues(): The computed counter-example is incorrect.\n" );
// set the values of the latches
vSolution = RetValue? NULL : Vec_IntAllocArray( pNtkMiter->pModel, Abc_NtkPiNum(pNtkLogic) );
pNtkMiter->pModel = NULL;
Abc_NtkDelete( pNtkMiter );
Abc_NtkDelete( pNtkLogic );
return vSolution;
}
/**Function*************************************************************
Synopsis [Interface to the old CEC engine]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Cec_ManVerifyOld( Gia_Man_t * pMiter, int fVerbose, int * piOutFail, abctime clkTotal, int fSilent )
{
// extern int Fra_FraigCec( Aig_Man_t ** ppAig, int nConfLimit, int fVerbose );
extern int Ssw_SecCexResimulate( Aig_Man_t * p, int * pModel, int * pnOutputs );
Gia_Man_t * pTemp = Gia_ManTransformMiter( pMiter );
Aig_Man_t * pMiterCec = Gia_ManToAig( pTemp, 0 );
int RetValue, iOut, nOuts;
if ( piOutFail )
*piOutFail = -1;
Gia_ManStop( pTemp );
// run CEC on this miter
RetValue = Fra_FraigCec( &pMiterCec, 10000000, fVerbose );
// report the miter
if ( RetValue == 1 )
{
if ( !fSilent )
{
Abc_Print( 1, "Networks are equivalent. " );
Abc_PrintTime( 1, "Time", Abc_Clock() - clkTotal );
}
}
else if ( RetValue == 0 )
{
if ( !fSilent )
{
Abc_Print( 1, "Networks are NOT EQUIVALENT. " );
Abc_PrintTime( 1, "Time", Abc_Clock() - clkTotal );
}
if ( pMiterCec->pData == NULL )
Abc_Print( 1, "Counter-example is not available.\n" );
else
{
iOut = Ssw_SecCexResimulate( pMiterCec, (int *)pMiterCec->pData, &nOuts );
if ( iOut == -1 )
Abc_Print( 1, "Counter-example verification has failed.\n" );
else
{
if ( !fSilent )
{
Abc_Print( 1, "Primary output %d has failed", iOut );
if ( nOuts-1 >= 0 )
Abc_Print( 1, ", along with other %d incorrect outputs", nOuts-1 );
Abc_Print( 1, ".\n" );
}
if ( piOutFail )
*piOutFail = iOut;
}
Cec_ManTransformPattern( pMiter, iOut, (int *)pMiterCec->pData );
}
}
else if ( !fSilent )
{
Abc_Print( 1, "Networks are UNDECIDED. " );
Abc_PrintTime( 1, "Time", Abc_Clock() - clkTotal );
}
fflush( stdout );
Aig_ManStop( pMiterCec );
return RetValue;
}
/**Function*************************************************************
Synopsis [Reproduces script "compress2".]
Description [Consumes the input AIG to reduce memory usage.]
SideEffects []
SeeAlso []
***********************************************************************/
Aig_Man_t * Dar_ManChoiceNewAig( Aig_Man_t * pAig, Dch_Pars_t * pPars )
{
// extern Aig_Man_t * Dch_DeriveTotalAig( Vec_Ptr_t * vAigs );
extern Aig_Man_t * Dch_ComputeChoices( Aig_Man_t * pAig, Dch_Pars_t * pPars );
int fVerbose = pPars->fVerbose;
Aig_Man_t * pMan, * pTemp;
Vec_Ptr_t * vAigs;
Vec_Ptr_t * vPios;
void * pManTime;
char * pName, * pSpec;
int i;
abctime clk;
clk = Abc_Clock();
vAigs = Dar_ManChoiceSynthesis( pAig, 1, 1, pPars->fPower, fVerbose );
pPars->timeSynth = Abc_Clock() - clk;
// swap the first and last network
// this should lead to the primary choice being "better" because of synthesis
// (it is also important when constructing choices)
pMan = (Aig_Man_t *)Vec_PtrPop( vAigs );
Vec_PtrPush( vAigs, Vec_PtrEntry(vAigs,0) );
Vec_PtrWriteEntry( vAigs, 0, pMan );
// derive the total AIG
pMan = Dch_DeriveTotalAig( vAigs );
// cleanup
Vec_PtrForEachEntry( Aig_Man_t *, vAigs, pTemp, i )
Aig_ManStop( pTemp );
Vec_PtrFree( vAigs );
// compute choices
pMan = Dch_ComputeChoices( pTemp = pMan, pPars );
Aig_ManStop( pTemp );
// save useful things
pManTime = pAig->pManTime; pAig->pManTime = NULL;
pName = Abc_UtilStrsav( pAig->pName );
pSpec = Abc_UtilStrsav( pAig->pSpec );
// create guidence
vPios = Aig_ManOrderPios( pMan, pAig );
Aig_ManStop( pAig );
// reconstruct the network
pMan = Aig_ManDupDfsGuided( pTemp = pMan, vPios );
Aig_ManStop( pTemp );
Vec_PtrFree( vPios );
// reset levels
pMan->pManTime = pManTime;
Aig_ManChoiceLevel( pMan );
// copy names
ABC_FREE( pMan->pName );
ABC_FREE( pMan->pSpec );
pMan->pName = pName;
pMan->pSpec = pSpec;
return pMan;
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Abc_NtkMfsResub( Mfs_Man_t * p, Abc_Obj_t * pNode )
{
abctime clk;
p->nNodesTried++;
// prepare data structure for this node
Mfs_ManClean( p );
// compute window roots, window support, and window nodes
clk = Abc_Clock();
p->vRoots = Abc_MfsComputeRoots( pNode, p->pPars->nWinTfoLevs, p->pPars->nFanoutsMax );
p->vSupp = Abc_NtkNodeSupport( p->pNtk, (Abc_Obj_t **)Vec_PtrArray(p->vRoots), Vec_PtrSize(p->vRoots) );
p->vNodes = Abc_NtkDfsNodes( p->pNtk, (Abc_Obj_t **)Vec_PtrArray(p->vRoots), Vec_PtrSize(p->vRoots) );
p->timeWin += Abc_Clock() - clk;
if ( p->pPars->nWinMax && Vec_PtrSize(p->vNodes) > p->pPars->nWinMax )
{
p->nMaxDivs++;
return 1;
}
// compute the divisors of the window
clk = Abc_Clock();
p->vDivs = Abc_MfsComputeDivisors( p, pNode, Abc_ObjRequiredLevel(pNode) - 1 );
p->nTotalDivs += Vec_PtrSize(p->vDivs) - Abc_ObjFaninNum(pNode);
p->timeDiv += Abc_Clock() - clk;
// construct AIG for the window
clk = Abc_Clock();
p->pAigWin = Abc_NtkConstructAig( p, pNode );
p->timeAig += Abc_Clock() - clk;
// translate it into CNF
clk = Abc_Clock();
p->pCnf = Cnf_DeriveSimple( p->pAigWin, 1 + Vec_PtrSize(p->vDivs) );
p->timeCnf += Abc_Clock() - clk;
// create the SAT problem
clk = Abc_Clock();
p->pSat = Abc_MfsCreateSolverResub( p, NULL, 0, 0 );
if ( p->pSat == NULL )
{
p->nNodesBad++;
return 1;
}
//clk = Abc_Clock();
// if ( p->pPars->fGiaSat )
// Abc_NtkMfsConstructGia( p );
//p->timeGia += Abc_Clock() - clk;
// solve the SAT problem
if ( p->pPars->fPower )
Abc_NtkMfsEdgePower( p, pNode );
else if ( p->pPars->fSwapEdge )
Abc_NtkMfsEdgeSwapEval( p, pNode );
else
{
Abc_NtkMfsResubNode( p, pNode );
if ( p->pPars->fMoreEffort )
Abc_NtkMfsResubNode2( p, pNode );
}
p->timeSat += Abc_Clock() - clk;
// if ( p->pPars->fGiaSat )
// Abc_NtkMfsDeconstructGia( p );
return 1;
}
/**Function*************************************************************
Synopsis [Reproduces script "compress2".]
Description [Consumes the input AIG to reduce memory usage.]
SideEffects []
SeeAlso []
***********************************************************************/
Aig_Man_t * Dar_ManChoiceNew( Aig_Man_t * pAig, Dch_Pars_t * pPars )
{
extern Aig_Man_t * Cec_ComputeChoices( Gia_Man_t * pGia, Dch_Pars_t * pPars );
// extern Aig_Man_t * Dch_DeriveTotalAig( Vec_Ptr_t * vAigs );
extern Aig_Man_t * Dch_ComputeChoices( Aig_Man_t * pAig, Dch_Pars_t * pPars );
// int fVerbose = pPars->fVerbose;
Aig_Man_t * pMan, * pTemp;
Gia_Man_t * pGia;
Vec_Ptr_t * vPios;
void * pManTime;
char * pName, * pSpec;
abctime clk;
// save useful things
pManTime = pAig->pManTime; pAig->pManTime = NULL;
pName = Abc_UtilStrsav( pAig->pName );
pSpec = Abc_UtilStrsav( pAig->pSpec );
// perform synthesis
clk = Abc_Clock();
pGia = Dar_NewChoiceSynthesis( Aig_ManDupDfs(pAig), 1, 1, pPars->fPower, pPars->fLightSynth, pPars->fVerbose );
pPars->timeSynth = Abc_Clock() - clk;
// perform choice computation
if ( pPars->fUseGia )
pMan = Cec_ComputeChoices( pGia, pPars );
else
{
pMan = Gia_ManToAigSkip( pGia, 3 );
Gia_ManStop( pGia );
pMan = Dch_ComputeChoices( pTemp = pMan, pPars );
Aig_ManStop( pTemp );
}
// create guidence
vPios = Aig_ManOrderPios( pMan, pAig );
Aig_ManStop( pAig );
// reconstruct the network
pMan = Aig_ManDupDfsGuided( pTemp = pMan, vPios );
Aig_ManStop( pTemp );
Vec_PtrFree( vPios );
// reset levels
pMan->pManTime = pManTime;
Aig_ManChoiceLevel( pMan );
// copy names
ABC_FREE( pMan->pName );
ABC_FREE( pMan->pSpec );
pMan->pName = pName;
pMan->pSpec = pSpec;
return pMan;
}
int Agi_ManSuppSizeTest( Agi_Man_t * p )
{
abctime clk = Abc_Clock();
int i, Counter = 0;
Agi_ManForEachNode( p, i )
Counter += (Agi_ManSuppSizeOne(p, i) <= 16);
printf( "Nodes with small support %d (out of %d)\n", Counter, Agi_ManNodeNum(p) );
Abc_PrintTime( 1, "Time", Abc_Clock() - clk );
return Counter;
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Cec_ManHandleSpecialCases( Gia_Man_t * p, Cec_ParCec_t * pPars )
{
Gia_Obj_t * pObj1, * pObj2;
Gia_Obj_t * pDri1, * pDri2;
int i;
abctime clk = Abc_Clock();
Gia_ManSetPhase( p );
Gia_ManForEachPo( p, pObj1, i )
{
pObj2 = Gia_ManPo( p, ++i );
// check if they different on all-0 pattern
// (for example, when they have the same driver but complemented)
if ( Gia_ObjPhase(pObj1) != Gia_ObjPhase(pObj2) )
{
Abc_Print( 1, "Networks are NOT EQUIVALENT. Output %d trivially differs (different phase). ", i/2 );
Abc_PrintTime( 1, "Time", Abc_Clock() - clk );
pPars->iOutFail = i/2;
Cec_ManTransformPattern( p, i/2, NULL );
return 0;
}
// get the drivers
pDri1 = Gia_ObjFanin0(pObj1);
pDri2 = Gia_ObjFanin0(pObj2);
// drivers are different PIs
if ( Gia_ObjIsPi(p, pDri1) && Gia_ObjIsPi(p, pDri2) && pDri1 != pDri2 )
{
Abc_Print( 1, "Networks are NOT EQUIVALENT. Output %d trivially differs (different PIs). ", i/2 );
Abc_PrintTime( 1, "Time", Abc_Clock() - clk );
pPars->iOutFail = i/2;
Cec_ManTransformPattern( p, i/2, NULL );
// if their compl attributes are the same - one should be complemented
assert( Gia_ObjFaninC0(pObj1) == Gia_ObjFaninC0(pObj2) );
Abc_InfoSetBit( p->pCexComb->pData, Gia_ObjCioId(pDri1) );
return 0;
}
// one of the drivers is a PI; another is a constant 0
if ( (Gia_ObjIsPi(p, pDri1) && Gia_ObjIsConst0(pDri2)) ||
(Gia_ObjIsPi(p, pDri2) && Gia_ObjIsConst0(pDri1)) )
{
Abc_Print( 1, "Networks are NOT EQUIVALENT. Output %d trivially differs (PI vs. constant). ", i/2 );
Abc_PrintTime( 1, "Time", Abc_Clock() - clk );
pPars->iOutFail = i/2;
Cec_ManTransformPattern( p, i/2, NULL );
// the compl attributes are the same - the PI should be complemented
assert( Gia_ObjFaninC0(pObj1) == Gia_ObjFaninC0(pObj2) );
if ( Gia_ObjIsPi(p, pDri1) )
Abc_InfoSetBit( p->pCexComb->pData, Gia_ObjCioId(pDri1) );
else
Abc_InfoSetBit( p->pCexComb->pData, Gia_ObjCioId(pDri2) );
return 0;
}
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Abc_NtkMfsNode( Mfs_Man_t * p, Abc_Obj_t * pNode )
{
Hop_Obj_t * pObj;
int RetValue;
float dProb;
extern Hop_Obj_t * Abc_NodeIfNodeResyn( Bdc_Man_t * p, Hop_Man_t * pHop, Hop_Obj_t * pRoot, int nVars, Vec_Int_t * vTruth, unsigned * puCare, float dProb );
int nGain;
abctime clk;
p->nNodesTried++;
// prepare data structure for this node
Mfs_ManClean( p );
// compute window roots, window support, and window nodes
clk = Abc_Clock();
p->vRoots = Abc_MfsComputeRoots( pNode, p->pPars->nWinTfoLevs, p->pPars->nFanoutsMax );
p->vSupp = Abc_NtkNodeSupport( p->pNtk, (Abc_Obj_t **)Vec_PtrArray(p->vRoots), Vec_PtrSize(p->vRoots) );
p->vNodes = Abc_NtkDfsNodes( p->pNtk, (Abc_Obj_t **)Vec_PtrArray(p->vRoots), Vec_PtrSize(p->vRoots) );
p->timeWin += Abc_Clock() - clk;
// count the number of patterns
// p->dTotalRatios += Abc_NtkConstraintRatio( p, pNode );
// construct AIG for the window
clk = Abc_Clock();
p->pAigWin = Abc_NtkConstructAig( p, pNode );
p->timeAig += Abc_Clock() - clk;
// translate it into CNF
clk = Abc_Clock();
p->pCnf = Cnf_DeriveSimple( p->pAigWin, Abc_ObjFaninNum(pNode) );
p->timeCnf += Abc_Clock() - clk;
// create the SAT problem
clk = Abc_Clock();
p->pSat = (sat_solver *)Cnf_DataWriteIntoSolver( p->pCnf, 1, 0 );
if ( p->pSat && p->pPars->fOneHotness )
Abc_NtkAddOneHotness( p );
if ( p->pSat == NULL )
return 0;
// solve the SAT problem
RetValue = Abc_NtkMfsSolveSat( p, pNode );
p->nTotConfLevel += p->pSat->stats.conflicts;
p->timeSat += Abc_Clock() - clk;
if ( RetValue == 0 )
{
p->nTimeOutsLevel++;
p->nTimeOuts++;
return 0;
}
// minimize the local function of the node using bi-decomposition
assert( p->nFanins == Abc_ObjFaninNum(pNode) );
dProb = p->pPars->fPower? ((float *)p->vProbs->pArray)[pNode->Id] : -1.0;
pObj = Abc_NodeIfNodeResyn( p->pManDec, (Hop_Man_t *)pNode->pNtk->pManFunc, (Hop_Obj_t *)pNode->pData, p->nFanins, p->vTruth, p->uCare, dProb );
nGain = Hop_DagSize((Hop_Obj_t *)pNode->pData) - Hop_DagSize(pObj);
if ( nGain >= 0 )
{
p->nNodesDec++;
p->nNodesGained += nGain;
p->nNodesGainedLevel += nGain;
pNode->pData = pObj;
}
return 1;
}
/**Function*************************************************************
Synopsis [Core procedure for simulation.]
Description [Returns 1 if refinement has happened.]
SideEffects []
SeeAlso []
***********************************************************************/
int Cec_ManSimulationOne( Gia_Man_t * pAig, Cec_ParSim_t * pPars )
{
Cec_ManSim_t * pSim;
int RetValue = 0;
abctime clkTotal = Abc_Clock();
pSim = Cec_ManSimStart( pAig, pPars );
if ( (pAig->pReprs == NULL && (RetValue = Cec_ManSimClassesPrepare( pSim, -1 ))) ||
(RetValue == 0 && (RetValue = Cec_ManSimClassesRefine( pSim ))) )
Abc_Print( 1, "The number of failed outputs of the miter = %6d. (Words = %4d. Frames = %4d.)\n",
pSim->nOuts, pPars->nWords, pPars->nFrames );
if ( pPars->fVerbose )
Abc_PrintTime( 1, "Time", Abc_Clock() - clkTotal );
Cec_ManSimStop( pSim );
return RetValue;
}
/**Function*************************************************************
Synopsis [Returns the probability of POs being 1 under rand seq sim.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Ssw_ManProfileConstraints( Aig_Man_t * p, int nWords, int nFrames, int fVerbose )
{
Vec_Ptr_t * vInfo;
Vec_Int_t * vProbs, * vProbs2;
Aig_Obj_t * pObj, * pObjLi;
unsigned * pInfo, * pInfo0, * pInfo1, * pInfoMask, * pInfoMask2;
int i, w, f, RetValue = 1;
abctime clk = Abc_Clock();
if ( fVerbose )
printf( "Simulating %d nodes and %d flops for %d frames with %d words... ",
Aig_ManNodeNum(p), Aig_ManRegNum(p), nFrames, nWords );
Aig_ManRandom( 1 );
vInfo = Vec_PtrAllocSimInfo( Aig_ManObjNumMax(p)+2, nWords );
Vec_PtrCleanSimInfo( vInfo, 0, nWords );
vProbs = Vec_IntStart( Saig_ManPoNum(p) );
vProbs2 = Vec_IntStart( Saig_ManPoNum(p) );
// start the constant
pInfo = (unsigned *)Vec_PtrEntry( vInfo, Aig_ObjId(Aig_ManConst1(p)) );
for ( w = 0; w < nWords; w++ )
pInfo[w] = ~0;
// start the flop inputs
Saig_ManForEachLi( p, pObj, i )
{
pInfo = (unsigned *)Vec_PtrEntry( vInfo, Aig_ObjId(pObj) );
for ( w = 0; w < nWords; w++ )
pInfo[w] = 0;
}
void Gia_SweeperPrintStats( Gia_Man_t * pGia )
{
Swp_Man_t * p = (Swp_Man_t *)pGia->pData;
double nMemSwp = Gia_SweeperMemUsage(pGia);
double nMemGia = (double)Gia_ManObjNum(pGia)*(sizeof(Gia_Obj_t) + sizeof(int));
double nMemSat = sat_solver_memory(p->pSat);
double nMemTot = nMemSwp + nMemGia + nMemSat;
printf( "SAT sweeper statistics:\n" );
printf( "Memory usage:\n" );
ABC_PRMP( "Sweeper ", nMemSwp, nMemTot );
ABC_PRMP( "AIG manager ", nMemGia, nMemTot );
ABC_PRMP( "SAT solver ", nMemSat, nMemTot );
ABC_PRMP( "TOTAL ", nMemTot, nMemTot );
printf( "Runtime usage:\n" );
p->timeTotal = Abc_Clock() - p->timeStart;
ABC_PRTP( "CNF construction", p->timeCnf, p->timeTotal );
ABC_PRTP( "SAT solving ", p->timeSat, p->timeTotal );
ABC_PRTP( " Sat ", p->timeSatSat, p->timeTotal );
ABC_PRTP( " Unsat ", p->timeSatUnsat, p->timeTotal );
ABC_PRTP( " Undecided ", p->timeSatUndec, p->timeTotal );
ABC_PRTP( "TOTAL RUNTIME ", p->timeTotal, p->timeTotal );
printf( "GIA: " );
Gia_ManPrintStats( pGia, 0, 0, 0 );
printf( "SAT calls = %d. Sat = %d. Unsat = %d. Undecided = %d. Proofs = %d.\n",
p->nSatCalls, p->nSatCallsSat, p->nSatCallsUnsat, p->nSatCallsUndec, p->nSatProofs );
Sat_SolverPrintStats( stdout, p->pSat );
}
/**Function*************************************************************
Synopsis [Creating/deleting the manager.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
static inline Swp_Man_t * Swp_ManStart( Gia_Man_t * pGia )
{
Swp_Man_t * p;
int Lit;
assert( pGia->pHTable != NULL );
pGia->pData = p = ABC_CALLOC( Swp_Man_t, 1 );
p->pGia = pGia;
p->nConfMax = 1000;
p->vProbes = Vec_IntAlloc( 100 );
p->vProbRefs = Vec_IntAlloc( 100 );
p->vLit2Prob = Vec_IntStartFull( 10000 );
p->vCondProbes = Vec_IntAlloc( 100 );
p->vCondAssump = Vec_IntAlloc( 100 );
p->vId2Lit = Vec_IntAlloc( 10000 );
p->vFront = Vec_IntAlloc( 100 );
p->vFanins = Vec_IntAlloc( 100 );
p->vCexSwp = Vec_IntAlloc( 100 );
p->pSat = sat_solver_new();
p->nSatVars = 1;
sat_solver_setnvars( p->pSat, 1000 );
Swp_ManSetObj2Lit( p, 0, (Lit = Abc_Var2Lit(p->nSatVars++, 0)) );
Lit = Abc_LitNot(Lit);
sat_solver_addclause( p->pSat, &Lit, &Lit + 1 );
p->timeStart = Abc_Clock();
return p;
}
/**Function*************************************************************
Synopsis [Resizes the table.]
Description [Typically this procedure should not be called.]
SideEffects []
SeeAlso []
***********************************************************************/
void Ivy_TableResize( Ivy_Man_t * p )
{
int * pTableOld, * pPlace;
int nTableSizeOld, Counter, nEntries, e;
abctime clk;
clk = Abc_Clock();
// save the old table
pTableOld = p->pTable;
nTableSizeOld = p->nTableSize;
// get the new table
p->nTableSize = Abc_PrimeCudd( 5 * Ivy_ManHashObjNum(p) );
p->pTable = ABC_ALLOC( int, p->nTableSize );
memset( p->pTable, 0, sizeof(int) * p->nTableSize );
// rehash the entries from the old table
Counter = 0;
for ( e = 0; e < nTableSizeOld; e++ )
{
if ( pTableOld[e] == 0 )
continue;
Counter++;
// get the place where this entry goes in the table table
pPlace = Ivy_TableFind( p, Ivy_ManObj(p, pTableOld[e]) );
assert( *pPlace == 0 ); // should not be in the table
*pPlace = pTableOld[e];
}
nEntries = Ivy_ManHashObjNum(p);
// assert( Counter == nEntries );
// printf( "Increasing the structural table size from %6d to %6d. ", nTableSizeOld, p->nTableSize );
// ABC_PRT( "Time", Abc_Clock() - clk );
// replace the table and the parameters
ABC_FREE( pTableOld );
}
/**Function*************************************************************
Synopsis [Resizes the table.]
Description [Typically this procedure should not be called.]
SideEffects []
SeeAlso []
***********************************************************************/
void Hop_TableResize( Hop_Man_t * p )
{
Hop_Obj_t * pEntry, * pNext;
Hop_Obj_t ** pTableOld, ** ppPlace;
int nTableSizeOld, Counter, nEntries, i;
abctime clk;
clk = Abc_Clock();
// save the old table
pTableOld = p->pTable;
nTableSizeOld = p->nTableSize;
// get the new table
p->nTableSize = Abc_PrimeCudd( 2 * Hop_ManNodeNum(p) );
p->pTable = ABC_ALLOC( Hop_Obj_t *, p->nTableSize );
memset( p->pTable, 0, sizeof(Hop_Obj_t *) * p->nTableSize );
// rehash the entries from the old table
Counter = 0;
for ( i = 0; i < nTableSizeOld; i++ )
for ( pEntry = pTableOld[i], pNext = pEntry? pEntry->pNext : NULL; pEntry; pEntry = pNext, pNext = pEntry? pEntry->pNext : NULL )
{
// get the place where this entry goes in the table
ppPlace = Hop_TableFind( p, pEntry );
assert( *ppPlace == NULL ); // should not be there
// add the entry to the list
*ppPlace = pEntry;
pEntry->pNext = NULL;
Counter++;
}
nEntries = Hop_ManNodeNum(p);
assert( Counter == nEntries );
// printf( "Increasing the structural table size from %6d to %6d. ", nTableSizeOld, p->nTableSize );
// ABC_PRT( "Time", Abc_Clock() - clk );
// replace the table and the parameters
ABC_FREE( pTableOld );
}
/**Function*************************************************************
Synopsis [Performs incremental rewriting of the AIG.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Ivy_ManRewriteSeq( Ivy_Man_t * p, int fUseZeroCost, int fVerbose )
{
Rwt_Man_t * pManRwt;
Ivy_Obj_t * pNode;
int i, nNodes, nGain;
abctime clk, clkStart = Abc_Clock();
// set the DC latch values
Ivy_ManForEachLatch( p, pNode, i )
pNode->Init = IVY_INIT_DC;
// start the rewriting manager
pManRwt = Rwt_ManStart( 0 );
p->pData = pManRwt;
if ( pManRwt == NULL )
return 0;
// create fanouts
if ( p->fFanout == 0 )
Ivy_ManStartFanout( p );
// resynthesize each node once
nNodes = Ivy_ManObjIdMax(p);
Ivy_ManForEachNode( p, pNode, i )
{
assert( !Ivy_ObjIsBuf(pNode) );
assert( !Ivy_ObjIsBuf(Ivy_ObjFanin0(pNode)) );
assert( !Ivy_ObjIsBuf(Ivy_ObjFanin1(pNode)) );
// fix the fanin buffer problem
// Ivy_NodeFixBufferFanins( p, pNode );
// if ( Ivy_ObjIsBuf(pNode) )
// continue;
// stop if all nodes have been tried once
if ( i > nNodes )
break;
// for each cut, try to resynthesize it
nGain = Ivy_NodeRewriteSeq( p, pManRwt, pNode, fUseZeroCost );
if ( nGain > 0 || (nGain == 0 && fUseZeroCost) )
{
Dec_Graph_t * pGraph = (Dec_Graph_t *)Rwt_ManReadDecs(pManRwt);
int fCompl = Rwt_ManReadCompl(pManRwt);
// complement the FF if needed
clk = Abc_Clock();
if ( fCompl ) Dec_GraphComplement( pGraph );
Ivy_GraphUpdateNetworkSeq( p, pNode, pGraph, nGain );
if ( fCompl ) Dec_GraphComplement( pGraph );
Rwt_ManAddTimeUpdate( pManRwt, Abc_Clock() - clk );
}
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Bmc_LoadTest( Gia_Man_t * pGia, int fLoadCnf, int fVerbose )
{
int nConfLimit = 0;
Bmc_Load_t * p;
Gia_Obj_t * pObj;
int i, status, Lit;
abctime clk = Abc_Clock();
// create the loading manager
p = Bmc_LoadStart( pGia );
// add callback for CNF loading
if ( fLoadCnf )
{
p->pSat->pCnfMan = p;
p->pSat->pCnfFunc = Bmc_LoadAddCnf;
}
// solve SAT problem for each PO
Gia_ManForEachPo( pGia, pObj, i )
{
if ( fLoadCnf )
Lit = Abc_Var2Lit( Bmc_LoadGetSatVar(p, Gia_ObjFaninId0p(pGia, pObj)), Gia_ObjFaninC0(pObj) );
else
Lit = Abc_Var2Lit( Bmc_LoadAddCnf_rec(p, Gia_ObjFaninId0p(pGia, pObj)), Gia_ObjFaninC0(pObj) );
if ( fVerbose )
{
printf( "Frame%4d : ", i );
printf( "Vars = %6d ", Vec_IntSize(p->vSat2Id) );
printf( "Clas = %6d ", sat_solver_nclauses(p->pSat) );
}
status = sat_solver_solve( p->pSat, &Lit, &Lit + 1, (ABC_INT64_T)nConfLimit, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
if ( fVerbose )
{
printf( "Conf = %6d ", sat_solver_nconflicts(p->pSat) );
if ( status == l_False )
printf( "UNSAT " );
else if ( status == l_True )
printf( "SAT " );
else // if ( status == l_Undec )
printf( "UNDEC " );
Abc_PrintTime( 1, "Time", Abc_Clock() - clk );
}
}
printf( "Callbacks = %d. Loadings = %d.\n", p->nCallBacks1, p->nCallBacks2 );
Bmc_LoadStop( p );
}
/**Function*************************************************************
Synopsis [Gives the current ABC network to AIG manager for processing.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Ntk_t * Abc_NtkIvyHaig( Abc_Ntk_t * pNtk, int nIters, int fUseZeroCost, int fVerbose )
{
Abc_Ntk_t * pNtkAig;
Ivy_Man_t * pMan;
abctime clk;
// int i;
/*
extern int nMoves;
extern int nMovesS;
extern int nClauses;
extern int timeInv;
nMoves = 0;
nMovesS = 0;
nClauses = 0;
timeInv = 0;
*/
pMan = Abc_NtkIvyBefore( pNtk, 1, 1 );
if ( pMan == NULL )
return NULL;
//timeRetime = Abc_Clock();
clk = Abc_Clock();
Ivy_ManHaigStart( pMan, fVerbose );
// Ivy_ManRewriteSeq( pMan, 0, 0 );
// for ( i = 0; i < nIters; i++ )
// Ivy_ManRewriteSeq( pMan, fUseZeroCost, 0 );
//printf( "%d ", Ivy_ManNodeNum(pMan) );
Ivy_ManRewriteSeq( pMan, 0, 0 );
Ivy_ManRewriteSeq( pMan, 0, 0 );
Ivy_ManRewriteSeq( pMan, 1, 0 );
//printf( "%d ", Ivy_ManNodeNum(pMan) );
//printf( "%d ", Ivy_ManNodeNum(pMan->pHaig) );
//ABC_PRT( " ", Abc_Clock() - clk );
//printf( "\n" );
/*
printf( "Moves = %d. ", nMoves );
printf( "MovesS = %d. ", nMovesS );
printf( "Clauses = %d. ", nClauses );
ABC_PRT( "Time", timeInv );
*/
// Ivy_ManRewriteSeq( pMan, 1, 0 );
//printf( "Haig size = %d.\n", Ivy_ManNodeNum(pMan->pHaig) );
// Ivy_ManHaigPostprocess( pMan, fVerbose );
//timeRetime = Abc_Clock() - timeRetime;
// write working AIG into the current network
// pNtkAig = Abc_NtkIvyAfter( pNtk, pMan, 1, 0 );
// write HAIG into the current network
pNtkAig = Abc_NtkIvyAfter( pNtk, pMan->pHaig, 1, 1 );
Ivy_ManHaigStop( pMan );
Ivy_ManStop( pMan );
return pNtkAig;
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Cnf_Dat_t * Cnf_Derive_old( Aig_Man_t * pAig )
{
/*
// iteratively improve area flow
for ( i = 0; i < nIters; i++ )
{
clk = Abc_Clock();
Cnf_ManScanMapping( p, 0 );
Cnf_ManMapForCnf( p );
ABC_PRT( "iter ", Abc_Clock() - clk );
}
*/
// write the file
vMapped = Aig_ManScanMapping( p, 1 );
Vec_PtrFree( vMapped );
clk = Abc_Clock();
Cnf_ManTransferCuts( p );
Cnf_ManPostprocess( p );
Cnf_ManScanMapping( p, 0 );
/*
Cnf_ManPostprocess( p );
Cnf_ManScanMapping( p, 0 );
Cnf_ManPostprocess( p );
Cnf_ManScanMapping( p, 0 );
*/
ABC_PRT( "Ext ", Abc_Clock() - clk );
/*
vMapped = Cnf_ManScanMapping( p, 1 );
pCnf = Cnf_ManWriteCnf( p, vMapped );
Vec_PtrFree( vMapped );
// clean up
Cnf_ManFreeCuts( p );
Dar_ManCutsFree( pAig );
return pCnf;
*/
Aig_MmFixedStop( pMemCuts, 0 );
return NULL;
}
/**Function*************************************************************
Synopsis [Performs computation of AIGs with choices.]
Description [Takes several AIGs and performs choicing.]
SideEffects []
SeeAlso []
***********************************************************************/
void Dch_ComputeEquivalences( Aig_Man_t * pAig, Dch_Pars_t * pPars )
{
Dch_Man_t * p;
abctime clk, clkTotal = Abc_Clock();
// reset random numbers
Aig_ManRandom(1);
// start the choicing manager
p = Dch_ManCreate( pAig, pPars );
// compute candidate equivalence classes
clk = Abc_Clock();
p->ppClasses = Dch_CreateCandEquivClasses( pAig, pPars->nWords, pPars->fVerbose );
p->timeSimInit = Abc_Clock() - clk;
// Dch_ClassesPrint( p->ppClasses, 0 );
p->nLits = Dch_ClassesLitNum( p->ppClasses );
// perform SAT sweeping
Dch_ManSweep( p );
// free memory ahead of time
p->timeTotal = Abc_Clock() - clkTotal;
Dch_ManStop( p );
}
/**Function*************************************************************
Synopsis [Reproduces script "compress2".]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Aig_Man_t * Dar_ManChoice( Aig_Man_t * pAig, int fBalance, int fUpdateLevel, int fConstruct, int nConfMax, int nLevelMax, int fVerbose )
{
Aig_Man_t * pMan, * pTemp;
Vec_Ptr_t * vAigs;
int i;
abctime clk;
clk = Abc_Clock();
// vAigs = Dar_ManChoiceSynthesisExt();
vAigs = Dar_ManChoiceSynthesis( pAig, fBalance, fUpdateLevel, 0, fVerbose );
// swap the first and last network
// this should lead to the primary choice being "better" because of synthesis
// (it is also important when constructing choices)
if ( !fConstruct )
{
pMan = (Aig_Man_t *)Vec_PtrPop( vAigs );
Vec_PtrPush( vAigs, Vec_PtrEntry(vAigs,0) );
Vec_PtrWriteEntry( vAigs, 0, pMan );
}
if ( fVerbose )
{
ABC_PRT( "Synthesis time", Abc_Clock() - clk );
}
clk = Abc_Clock();
if ( fConstruct )
pMan = Aig_ManChoiceConstructive( vAigs, fVerbose );
else
pMan = Aig_ManChoicePartitioned( vAigs, 300, nConfMax, nLevelMax, fVerbose );
Vec_PtrForEachEntry( Aig_Man_t *, vAigs, pTemp, i )
Aig_ManStop( pTemp );
Vec_PtrFree( vAigs );
if ( fVerbose )
{
ABC_PRT( "Choicing time ", Abc_Clock() - clk );
}
return pMan;
// return NULL;
}
/**Function*************************************************************
Synopsis [Implementation of max-flow/min-cut computation.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Vec_Ptr_t * Abc_NtkMaxFlow( Abc_Ntk_t * pNtk, int fForward, int fVerbose )
{
Vec_Ptr_t * vMinCut;
Abc_Obj_t * pLatch;
int Flow, FlowCur, RetValue, i;
abctime clk = Abc_Clock();
int fUseDirectedFlow = 1;
// find the max-flow
Abc_NtkCleanCopy( pNtk );
Flow = 0;
Abc_NtkIncrementTravId(pNtk);
Abc_NtkForEachLatch( pNtk, pLatch, i )
{
if ( fForward )
{
// assert( !Abc_ObjFanout0(pLatch)->fMarkA );
FlowCur = Abc_NtkMaxFlowFwdPath2_rec( Abc_ObjFanout0(pLatch) );
// FlowCur = Abc_NtkMaxFlowFwdPath3_rec( Abc_ObjFanout0(pLatch), pLatch, 1 );
Flow += FlowCur;
}
else
{
assert( !Abc_ObjFanin0(pLatch)->fMarkA );
FlowCur = Abc_NtkMaxFlowBwdPath2_rec( Abc_ObjFanin0(pLatch) );
Flow += FlowCur;
}
if ( FlowCur )
Abc_NtkIncrementTravId(pNtk);
}
if ( !fUseDirectedFlow )
{
Abc_NtkIncrementTravId(pNtk);
Abc_NtkForEachLatch( pNtk, pLatch, i )
{
if ( fForward )
{
// assert( !Abc_ObjFanout0(pLatch)->fMarkA );
FlowCur = Abc_NtkMaxFlowFwdPath_rec( Abc_ObjFanout0(pLatch) );
Flow += FlowCur;
}
else
{
assert( !Abc_ObjFanin0(pLatch)->fMarkA );
FlowCur = Abc_NtkMaxFlowBwdPath_rec( Abc_ObjFanin0(pLatch) );
Flow += FlowCur;
}
if ( FlowCur )
Abc_NtkIncrementTravId(pNtk);
}
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Gia_Iso3Test( Gia_Man_t * p )
{
int nIterMax = 500;
int i, Prev = -1, This;
abctime clk = Abc_Clock();
Vec_Int_t * vSign = NULL;
Gia_Iso3Init( p );
for ( i = 0; i < nIterMax; i++ )
{
vSign = Gia_Iso3Save( p );
// This = Gia_Iso3Unique( vSign );
This = Vec_IntUniqueCount( vSign, 1, NULL );
printf( "Iter %3d : %6d out of %6d ", i, This, Vec_IntSize(vSign) );
Abc_PrintTime( 1, "Time", Abc_Clock() - clk );
if ( This == Prev )
break;
Prev = This;
Gia_Iso3Compute( p, vSign );
Vec_IntFreeP( &vSign );
}
Vec_IntFreeP( &vSign );
}
/**Function*************************************************************
Synopsis [Precomputes the library of AND2 gates.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Super2_Precompute( int nInputs, int nLevels, int fVerbose )
{
Super2_Man_t * pMan;
Super2_Lib_t * pLibCur, * pLibNext;
int Level;
abctime clk;
assert( nInputs < 6 );
// start the manager
pMan = Super2_ManStart();
// get the starting supergates
pLibCur = Super2_LibFirst( pMan, nInputs );
// perform the computation of supergates
printf( "Computing supergates for %d inputs and %d levels:\n", nInputs, nLevels );
for ( Level = 1; Level <= nLevels; Level++ )
{
clk = Abc_Clock();
pLibNext = Super2_LibCompute( pMan, pLibCur );
pLibNext->nLevels = Level;
Super2_LibStop( pLibCur );
pLibCur = pLibNext;
printf( "Level %d: Tried = %7d. Computed = %7d. ", Level, pMan->nTried, pLibCur->nGates );
ABC_PRT( "Runtime", Abc_Clock() - clk );
fflush( stdout );
}
printf( "Writing the output file...\n" );
fflush( stdout );
// write them into a file
Super2_LibWrite( pLibCur );
Super2_LibStop( pLibCur );
// stop the manager
Super2_ManStop( pMan );
}
/**Function*************************************************************
Synopsis [Improves current mapping using expand/Expand of one cut.]
Description [Assumes current mapping assigned and required times computed.]
SideEffects []
SeeAlso []
***********************************************************************/
void If_ManImproveMapping( If_Man_t * p )
{
abctime clk;
clk = Abc_Clock();
If_ManImproveExpand( p, p->pPars->nLutSize );
If_ManComputeRequired( p );
if ( p->pPars->fVerbose )
{
Abc_Print( 1, "E: Del = %7.2f. Ar = %9.1f. Edge = %8d. Switch = %7.2f. Cut = %8d. ",
p->RequiredGlo, p->AreaGlo, p->nNets, p->dPower, p->nCutsMerged );
Abc_PrintTime( 1, "T", Abc_Clock() - clk );
}
/*
clk = Abc_Clock();
If_ManImproveReduce( p, p->pPars->nLutSize );
If_ManComputeRequired( p, 0 );
if ( p->pPars->fVerbose )
{
Abc_Print( 1, "R: Del = %6.2f. Area = %8.2f. Nets = %6d. Cuts = %8d. Lim = %2d. Ave = %5.2f. ",
p->RequiredGlo, p->AreaGlo, p->nNets, p->nCutsMerged, p->nCutsUsed, 1.0 * p->nCutsMerged / If_ManAndNum(p) );
Abc_PrintTime( 1, "T", Abc_Clock() - clk );
}
*/
/*
clk = Abc_Clock();
If_ManImproveExpand( p, p->pPars->nLutSize );
If_ManComputeRequired( p, 0 );
if ( p->pPars->fVerbose )
{
Abc_Print( 1, "E: Del = %6.2f. Area = %8.2f. Nets = %6d. Cuts = %8d. Lim = %2d. Ave = %5.2f. ",
p->RequiredGlo, p->AreaGlo, p->nNets, p->nCutsMerged, p->nCutsUsed, 1.0 * p->nCutsMerged / If_ManAndNum(p) );
Abc_PrintTime( 1, "T", Abc_Clock() - clk );
}
*/
}
int Sfm_NtkCreateWindow( Sfm_Ntk_t * p, int iNode, int fVerbose )
{
int i, k, iTemp;
abctime clkDiv, clkWin = Abc_Clock();
assert( Sfm_ObjIsNode( p, iNode ) );
p->iPivotNode = iNode;
Vec_IntClear( p->vNodes ); // internal
Vec_IntClear( p->vDivs ); // divisors
Vec_IntClear( p->vRoots ); // roots
Vec_IntClear( p->vTfo ); // roots
Vec_IntClear( p->vOrder ); // variable order
// collect transitive fanin
Sfm_NtkIncrementTravId( p );
if ( Sfm_NtkCollectTfi_rec( p, iNode, p->vNodes ) )
{
p->nMaxDivs++;
p->timeWin += Abc_Clock() - clkWin;
return 0;
}
// create divisors
clkDiv = Abc_Clock();
Vec_IntClear( p->vDivs );
Vec_IntAppend( p->vDivs, p->vNodes );
Vec_IntPop( p->vDivs );
// add non-topological divisors
if ( Vec_IntSize(p->vDivs) < p->pPars->nWinSizeMax + 0 )
{
Sfm_NtkIncrementTravId2( p );
Vec_IntForEachEntry( p->vDivs, iTemp, i )
if ( Vec_IntSize(p->vDivs) < p->pPars->nWinSizeMax + 0 )
// Sfm_NtkAddDivisors( p, iTemp, Sfm_ObjLevel(p, iNode) - 1 );
Sfm_NtkAddDivisors( p, iTemp, p->nLevelMax - Sfm_ObjLevelR(p, iNode) );
}
/**Function*************************************************************
Synopsis [Counts the number of EXOR type nodes.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Fraig_ManPrintRefs( Fraig_Man_t * pMan )
{
Fraig_NodeVec_t * vPivots;
Fraig_Node_t * pNode, * pNode2;
int i, k, Counter, nProved;
abctime clk;
vPivots = Fraig_NodeVecAlloc( 1000 );
for ( i = 0; i < pMan->vNodes->nSize; i++ )
{
pNode = pMan->vNodes->pArray[i];
if ( pNode->nOnes == 0 || pNode->nOnes == (unsigned)pMan->nWordsRand * 32 )
continue;
if ( pNode->nRefs > 5 )
{
Fraig_NodeVecPush( vPivots, pNode );
// printf( "Node %6d : nRefs = %2d Level = %3d.\n", pNode->Num, pNode->nRefs, pNode->Level );
}
}
printf( "Total nodes = %d. Referenced nodes = %d.\n", pMan->vNodes->nSize, vPivots->nSize );
clk = Abc_Clock();
// count implications
Counter = nProved = 0;
for ( i = 0; i < vPivots->nSize; i++ )
for ( k = i+1; k < vPivots->nSize; k++ )
{
pNode = vPivots->pArray[i];
pNode2 = vPivots->pArray[k];
if ( Fraig_NodeSimsContained( pMan, pNode, pNode2 ) )
{
if ( Fraig_NodeIsImplication( pMan, pNode, pNode2, -1 ) )
nProved++;
Counter++;
}
else if ( Fraig_NodeSimsContained( pMan, pNode2, pNode ) )
{
if ( Fraig_NodeIsImplication( pMan, pNode2, pNode, -1 ) )
nProved++;
Counter++;
}
}
printf( "Number of candidate pairs = %d. Proved = %d.\n", Counter, nProved );
//ABC_PRT( "Time", Abc_Clock() - clk );
return 0;
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Bal_Man_t * Bal_ManAlloc( Gia_Man_t * pGia, Gia_Man_t * pNew, int nLutSize, int nCutNum, int fVerbose )
{
Bal_Man_t * p;
p = ABC_CALLOC( Bal_Man_t, 1 );
p->clkStart = Abc_Clock();
p->pGia = pGia;
p->pNew = pNew;
p->nLutSize = nLutSize;
p->nCutNum = nCutNum;
p->fVerbose = fVerbose;
p->vCosts = Vec_IntAlloc( 3 * Gia_ManObjNum(pGia) / 2 );
p->vCutSets = Vec_PtrAlloc( 3 * Gia_ManObjNum(pGia) / 2 );
Vec_IntFill( p->vCosts, Gia_ManObjNum(pNew), 0 );
Vec_PtrFill( p->vCutSets, Gia_ManObjNum(pNew), NULL );
pNew->pData = p;
return p;
}
