VOID
InitMmu (
VOID
)
{
ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable;
VOID *TranslationTableBase;
UINTN TranslationTableSize;
// Get Virtual Memory Map from the Platform Library
ArmPlatformGetVirtualMemoryMap (&MemoryTable);
//Note: Because we called PeiServicesInstallPeiMemory() before to call InitMmu() the MMU Page Table resides in
// DRAM (even at the top of DRAM as it is the first permanent memory allocation)
ArmConfigureMmu (MemoryTable, &TranslationTableBase, &TranslationTableSize);
}
VOID
InitCache (
IN UINT32 MemoryBase,
IN UINT32 MemoryLength
)
{
UINT32 CacheAttributes;
ARM_MEMORY_REGION_DESCRIPTOR MemoryTable[5];
VOID *TranslationTableBase;
UINTN TranslationTableSize;
if (FeaturePcdGet(PcdCacheEnable) == TRUE) {
CacheAttributes = DDR_ATTRIBUTES_CACHED;
} else {
CacheAttributes = DDR_ATTRIBUTES_UNCACHED;
}
// DDR
MemoryTable[0].PhysicalBase = MemoryBase;
MemoryTable[0].VirtualBase = MemoryBase;
MemoryTable[0].Length = MemoryLength;
MemoryTable[0].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)CacheAttributes;
// SOC Registers. L3 interconnects
MemoryTable[1].PhysicalBase = SOC_REGISTERS_L3_PHYSICAL_BASE;
MemoryTable[1].VirtualBase = SOC_REGISTERS_L3_PHYSICAL_BASE;
MemoryTable[1].Length = SOC_REGISTERS_L3_PHYSICAL_LENGTH;
MemoryTable[1].Attributes = SOC_REGISTERS_L3_ATTRIBUTES;
// SOC Registers. L4 interconnects
MemoryTable[2].PhysicalBase = SOC_REGISTERS_L4_PHYSICAL_BASE;
MemoryTable[2].VirtualBase = SOC_REGISTERS_L4_PHYSICAL_BASE;
MemoryTable[2].Length = SOC_REGISTERS_L4_PHYSICAL_LENGTH;
MemoryTable[2].Attributes = SOC_REGISTERS_L4_ATTRIBUTES;
// End of Table
MemoryTable[3].PhysicalBase = 0;
MemoryTable[3].VirtualBase = 0;
MemoryTable[3].Length = 0;
MemoryTable[3].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)0;
ArmConfigureMmu (MemoryTable, &TranslationTableBase, &TranslationTableSize);
BuildMemoryAllocationHob((EFI_PHYSICAL_ADDRESS)(UINTN)TranslationTableBase, TranslationTableSize, EfiBootServicesData);
}
STATIC
VOID
InitMmu (
IN ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable
)
{
VOID *TranslationTableBase;
UINTN TranslationTableSize;
RETURN_STATUS Status;
//Note: Because we called PeiServicesInstallPeiMemory() before to call InitMmu() the MMU Page Table resides in
// DRAM (even at the top of DRAM as it is the first permanent memory allocation)
Status = ArmConfigureMmu (MemoryTable, &TranslationTableBase, &TranslationTableSize);
if (EFI_ERROR (Status)) {
DEBUG ((EFI_D_ERROR, "Error: Failed to enable MMU\n"));
}
}
