/// /// send a byte to the VS1001 MPEG stream /// void vs1001::send_data(unsigned char b) { char i; #ifdef VS1000_NEW CBI( xDCS_PORT, xDCS_PIN ); // XDCS lo #else SBI( BSYNC_PORT, BSYNC_PIN ); // byte sync hi #endif // outp(b, SPDR); // send data SPDR = b; // send data // release BSYNC before end of byte #ifndef VS1000_NEW asm volatile("nop"); asm volatile("nop"); asm volatile("nop"); CBI( BSYNC_PORT, BSYNC_PIN ); // byte sync lo #endif // wait for data to be sent loop_until_bit_is_set(SPSR, SPIF); //release xDCS after byte has been sent #ifdef VS1000_NEW SBI( xDCS_PORT, xDCS_PIN ); // byte XDCS hi #endif i = SPDR; // clear SPIF }
/** * Prepare a bilinear-leveled linear move on Cartesian, * splitting the move where it crosses grid borders. */ void bilinear_line_to_destination(const float fr_mm_s, uint16_t x_splits, uint16_t y_splits) { // Get current and destination cells for this line int cx1 = CELL_INDEX(X, current_position[X_AXIS]), cy1 = CELL_INDEX(Y, current_position[Y_AXIS]), cx2 = CELL_INDEX(X, destination[X_AXIS]), cy2 = CELL_INDEX(Y, destination[Y_AXIS]); cx1 = constrain(cx1, 0, ABL_BG_POINTS_X - 2); cy1 = constrain(cy1, 0, ABL_BG_POINTS_Y - 2); cx2 = constrain(cx2, 0, ABL_BG_POINTS_X - 2); cy2 = constrain(cy2, 0, ABL_BG_POINTS_Y - 2); // Start and end in the same cell? No split needed. if (cx1 == cx2 && cy1 == cy2) { buffer_line_to_destination(fr_mm_s); set_current_from_destination(); return; } #define LINE_SEGMENT_END(A) (current_position[_AXIS(A)] + (destination[_AXIS(A)] - current_position[_AXIS(A)]) * normalized_dist) float normalized_dist, end[XYZE]; const int8_t gcx = MAX(cx1, cx2), gcy = MAX(cy1, cy2); // Crosses on the X and not already split on this X? // The x_splits flags are insurance against rounding errors. if (cx2 != cx1 && TEST(x_splits, gcx)) { // Split on the X grid line CBI(x_splits, gcx); COPY(end, destination); destination[X_AXIS] = bilinear_start[X_AXIS] + ABL_BG_SPACING(X_AXIS) * gcx; normalized_dist = (destination[X_AXIS] - current_position[X_AXIS]) / (end[X_AXIS] - current_position[X_AXIS]); destination[Y_AXIS] = LINE_SEGMENT_END(Y); } // Crosses on the Y and not already split on this Y? else if (cy2 != cy1 && TEST(y_splits, gcy)) { // Split on the Y grid line CBI(y_splits, gcy); COPY(end, destination); destination[Y_AXIS] = bilinear_start[Y_AXIS] + ABL_BG_SPACING(Y_AXIS) * gcy; normalized_dist = (destination[Y_AXIS] - current_position[Y_AXIS]) / (end[Y_AXIS] - current_position[Y_AXIS]); destination[X_AXIS] = LINE_SEGMENT_END(X); } else { // Must already have been split on these border(s) // This should be a rare case. buffer_line_to_destination(fr_mm_s); set_current_from_destination(); return; } destination[Z_AXIS] = LINE_SEGMENT_END(Z); destination[E_AXIS] = LINE_SEGMENT_END(E); // Do the split and look for more borders bilinear_line_to_destination(fr_mm_s, x_splits, y_splits); // Restore destination from stack COPY(destination, end); bilinear_line_to_destination(fr_mm_s, x_splits, y_splits); }
/// /// read one or more word(s) from the VS1001 Control registers /// void vs1001::read(uint8 address, uint16 count, uint16 *pData) { uint8 i; #ifdef VS1000_NEW SBI( xDCS_PORT, xDCS_PIN ); // xDCS hi #else CBI( BSYNC_PORT, BSYNC_PIN ); // byte sync lo #endif CBI( MP3_PORT, MP3_PIN); // xCS lo write_byte_spi(VS1001_READ); write_byte_spi(address); while (count--) { *pData = write_byte_spi(0) << 8; *pData++ |= write_byte_spi(0); } SBI( MP3_PORT, MP3_PIN); // xCS hi //this is absolutely neccessary! //delay(5); //wait 5 microseconds after sending data to control port for (i=0;i<8;i++) asm volatile("nop"); }
/// /// send a burst of 32 data bytes to the VS1001 MPEG stream /// void vs1001::send_32(unsigned char *p) { int j; #ifdef VS1000_NEW CBI( xDCS_PORT, xDCS_PIN ); // xDCS lo #else SBI( BSYNC_PORT, BSYNC_PIN ); // byte sync hi #endif for (j=0;j<31;j++) { SPDR = *p++ ; // send data // wait for data to be sent loop_until_bit_is_set(SPSR, SPIF); } SPDR = *p++ ; // send last byte #ifndef VS1000_NEW // release BSYNC before last bit of last byte. asm volatile("nop"); asm volatile("nop"); asm volatile("nop"); CBI( BSYNC_PORT, BSYNC_PIN ); // byte sync lo #endif // wait for data to be sent loop_until_bit_is_set(SPSR, SPIF); #ifdef VS1000_NEW SBI( xDCS_PORT, xDCS_PIN ); // xDCS hi #endif j = SPDR; // clear SPIF }
/* returns a pointer to a memory position after last written */ char * MAX3421E::bytesWr( byte reg, byte nbytes, char * data ) { digitalWrite( SS_PIN, LOW ); #ifdef WORKAROUND_READ_MODIFY_WRITE SPI_SIOxx = ( reg | 0x02 ); while( nbytes-- ) { while(!SPI_CSIIFxx); //check if previous byte was sent CBI(SFR_IFxx, SFR_BIT_CSIIFxx); SPI_SIOxx = ( *data ); // send next data byte data++; // advance data pointer } while(!SPI_CSIIFxx); CBI(SFR_IFxx, SFR_BIT_CSIIFxx); #else SPI_SIOxx = ( reg | 0x02 ); while( nbytes-- ) { while(!SPI_CSIIFxx); //check if previous byte was sent SPI_CSIIFxx = 0; SPI_SIOxx = ( *data ); // send next data byte data++; // advance data pointer } while(!SPI_CSIIFxx); SPI_CSIIFxx = 0; #endif digitalWrite( SS_PIN, HIGH ); return( data ); }
/* returns a pointer to a memory position after last read */ char * MAX3421E::bytesRd ( byte reg, byte nbytes, char * data ) { digitalWrite( SS_PIN, LOW ); #ifdef WORKAROUND_READ_MODIFY_WRITE SPI_SIOxx = reg; while(!SPI_CSIIFxx); CBI(SFR_IFxx, SFR_BIT_CSIIFxx); while( nbytes ) { SPI_SIOxx = 0; //send empty byte nbytes--; while(!SPI_CSIIFxx); CBI(SFR_IFxx, SFR_BIT_CSIIFxx); *data = SPI_SIOxx; data++; } #else SPI_SIOxx = reg; while(!SPI_CSIIFxx); SPI_CSIIFxx = 0; while( nbytes ) { SPI_SIOxx = 0; //send empty byte nbytes--; while(!SPI_CSIIFxx); SPI_CSIIFxx = 0; *data = SPI_SIOxx; data++; } #endif digitalWrite( SS_PIN, HIGH ); return( data ); }
/// /// write one or more word(s) to the VS1001 Control registers /// void vs1001::write(uint8 address, uint16 count, uint16 *pData) { uint8 i; #ifdef VS1000_NEW SBI( xDCS_PORT, xDCS_PIN ); // xDCS hi #else CBI( BSYNC_PORT, BSYNC_PIN ); // byte sync lo #endif CBI( MP3_PORT, MP3_PIN); // xCS lo write_byte_spi(VS1001_WRITE); write_byte_spi(address); while (count--) { write_byte_spi((uint8)((*pData) >> 8)); write_byte_spi((uint8)*pData); pData++; } SBI( MP3_PORT, MP3_PIN); // xCS hi //this is absolutely neccessary! //delay(5); //wait 5 microseconds after sending data to control port for (i=0;i<16;i++) asm volatile("nop"); //Note: VS1011e sets DREQ low after each SCI operation. The duration depends on the operation. It is // not allowed to start a new SCI/SDI operation before DREQ is high again. loop_until_bit_is_set(DREQ_PORT, DREQ_PIN); }
static void finISR(timer16_Sequence_t timer) { // Disable use of the given timer #ifdef WIRING if (timer == _timer1) { CBI( #if defined(__AVR_ATmega1281__) || defined(__AVR_ATmega2561__) TIMSK1 #else TIMSK #endif , OCIE1A); // disable timer 1 output compare interrupt timerDetach(TIMER1OUTCOMPAREA_INT); } else if (timer == _timer3) { CBI( #if defined(__AVR_ATmega1281__) || defined(__AVR_ATmega2561__) TIMSK3 #else ETIMSK #endif , OCIE3A); // disable the timer3 output compare A interrupt timerDetach(TIMER3OUTCOMPAREA_INT); } #else //!WIRING // For arduino - in future: call here to a currently undefined function to reset the timer #endif }
/// reset the VS1001 void vs1001::reset(reset_e r) { uint16 buf[2]; if (r == SOFT_RESET) { // delay(200); // 200 mS SPSR = (0<<SPI2X); //set spi to Fosc/4 // set SW reset bit buf[0] = SM_RESET ; vs1001::write(SCI_MODE,1,buf); // set bit 2 delay(2); // 2 mS while( !((DREQ_PORT) & (1<<DREQ_PIN)) ); //wait for DREQ CBI( MP3_PORT, MP3_PIN); // output low (select MP3) #ifdef VS1000_NEW //send a pulse to ensure BSYNC Counter has been reset CBI( xDCS_PORT, xDCS_PIN ); // output Low SBI( xDCS_PORT, xDCS_PIN ); // output High #else //send a pulse to ensure BSYNC Counter has been reset SBI( BSYNC_PORT, BSYNC_PIN ); // output High CBI( BSYNC_PORT, BSYNC_PIN ); // output low #endif SBI( MP3_PORT, MP3_PIN); // output hi (deselect MP3) #ifdef VS1000_NEW buf[0] = SM_SDINEW ; vs1001::write(SCI_MODE,1, buf); #endif // set CLOCKF for 24.576 MHz // change to doubler //nick 7/7/04 buf[0] = 0x9800; vs1001::write(SCI_CLOCKF,1,buf); vs1001::write(SCI_CLOCKF,1,buf); #ifdef VS1001 // Force clock doubler see pg32 of VS10XX appl.notes buf[0] = 0x8008; vs1001::write(SCI_INT_FCTLH,1,buf); #endif while( !((DREQ_PORT) & (1<<DREQ_PIN)) ); //wait for DREQ vs1001::nulls(32); SPSR = (1<<SPI2X); //set spi to Fosc/2 } else if (r == HARD_RESET) { CBI(RESET_PORT, RESET_PIN); // RESET- lo delay(1); // 1 mS SBI(RESET_PORT, RESET_PIN); // RESET- hi delay(5); // 5 mS } }
/* Constructor */ MAX3421E::MAX3421E( void ) { // initialize SPI pins pinMode( SCK_PIN, OUTPUT ); pinMode( MISO_PIN, INPUT ); pinMode( MOSI_PIN, OUTPUT ); pinMode( SS_PIN, OUTPUT ); digitalWrite( SCK_PIN, HIGH ); digitalWrite( MOSI_PIN, HIGH ); digitalWrite( SS_PIN, HIGH ); // initialize pins pinMode( INT_PIN, INPUT ); pinMode( GPX_PIN, INPUT ); pinMode( RST_PIN, OUTPUT ); setRST( HIGH ); if (SPI_SAUxEN == 0) { #ifdef WORKAROUND_READ_MODIFY_WRITE SBI2(SFR2_PER0, SFR2_BIT_SAUxEN); /* supply SAUx clock */ #else SPI_SAUxEN = 1U; /* supply SAUx clock */ #endif NOP(); NOP(); NOP(); NOP(); SPI_SPSx = 0x0001U; } #ifdef WORKAROUND_READ_MODIFY_WRITE SPI_STx |= SPI_CHx; /* disable CSIxx */ CBI(SFR_IFxx, SFR_BIT_CSIIFxx); /* clear INTCSIxx interrupt flag */ SBI(SFR_MKxx, SFR_BIT_CSIMKxx); /* disable INTCSIxx interrupt */ CBI(SFR_PR1xx, SFR_BIT_CSIPR1xx); /* set INTCSIxx high priority */ CBI(SFR_PR0xx, SFR_BIT_CSIPR0xx); #else SPI_STx |= SPI_CHx; /* disable CSIxx */ SPI_CSIIFxx = 0U; /* clear INTCSIxx interrupt flag */ SPI_CSIMKxx = 1U; /* disable INTCSIxx interrupt */ SPI_CSIPR1xx = 0U; /* set INTCSIxx high priority */ SPI_CSIPR0xx = 0U; #endif SPI_SIRxx = 0x0007U; /* clear error flag */ SPI_SMRxx = 0x0020U; SPI_SCRxx = 0xF007U; SPI_SDRxx = 0x0200U; SPI_SOx |= SPI_CHx << 8; /* CSIxx clock initial level */ SPI_SOx &= ~SPI_CHx; /* CSIxx SO initial level */ SPI_SOEx |= SPI_CHx; /* enable CSIxx output */ SPI_SSx |= SPI_CHx; /* enable CSIxx */ }
void MarlinSerial::begin(const long baud) { uint16_t baud_setting; bool useU2X = true; #if F_CPU == 16000000UL && SERIAL_PORT == 0 // hard-coded exception for compatibility with the bootloader shipped // with the Duemilanove and previous boards and the firmware on the 8U2 // on the Uno and Mega 2560. if (baud == 57600) useU2X = false; #endif if (useU2X) { M_UCSRxA = _BV(M_U2Xx); baud_setting = (F_CPU / 4 / baud - 1) / 2; } else { M_UCSRxA = 0; baud_setting = (F_CPU / 8 / baud - 1) / 2; } // assign the baud_setting, a.k.a. ubbr (USART Baud Rate Register) M_UBRRxH = baud_setting >> 8; M_UBRRxL = baud_setting; SBI(M_UCSRxB, M_RXENx); SBI(M_UCSRxB, M_TXENx); SBI(M_UCSRxB, M_RXCIEx); #if TX_BUFFER_SIZE > 0 CBI(M_UCSRxB, M_UDRIEx); _written = false; #endif }
void SPIClass::begin() { pinMode(SCK, OUTPUT); pinMode(MISO, INPUT_PULLUP); pinMode(MOSI, OUTPUT); pinMode(SS, OUTPUT); digitalWrite(SCK, HIGH); digitalWrite(MOSI, HIGH); digitalWrite(SS, HIGH); if (SPI_SAUxEN == 0) { #ifdef WORKAROUND_READ_MODIFY_WRITE SBI2(SFR2_PER0, SFR2_BIT_SAUxEN); // クロック供給開始 #else SPI_SAUxEN = 1; // クロック供給開始 #endif NOP(); NOP(); NOP(); NOP(); SPI_SPSx = 0x0001; // 動作クロック設定 } #ifdef WORKAROUND_READ_MODIFY_WRITE SPI_STx |= SPI_CHx; // シリアル通信停止 SBI(SFR_MKxx, SFR_BIT_CSIMKxx); // 割り込み処理禁止 CBI(SFR_IFxx, SFR_BIT_CSIIFxx); // 割り込み要求フラグをクリア CBI(SFR_PR1xx, SFR_BIT_CSIPR1xx); // 割り込み優先順位の設定 CBI(SFR_PR0xx, SFR_BIT_CSIPR0xx); #else SPI_STx |= SPI_CHx; // シリアル通信停止 SPI_CSIMKxx = 1; // 割り込み処理禁止 SPI_CSIIFxx = 0; // 割り込み要求フラグをクリア SPI_CSIPR1xx = 0; // 割り込み優先順位の設定 SPI_CSIPR0xx = 0; #endif SPI_SIRxx = 0x0007; // エラーフラグをクリア SPI_SMRxx = 0x0020; // モード設定 SPI_SCRxx = 0xF007; // シリアル通信動作設定 SPI_SDRxx = SPI_CLOCK_DIV4 << 9; // 動作クロックの分周設定 start(); }
/* Single host register read */ byte MAX3421E::regRd( byte reg ) { digitalWrite( SS_PIN, LOW ); #ifdef WORKAROUND_READ_MODIFY_WRITE SPI_SIOxx = reg; while(!SPI_CSIIFxx); CBI(SFR_IFxx, SFR_BIT_CSIIFxx); SPI_SIOxx = 0; //send empty byte while(!SPI_CSIIFxx); CBI(SFR_IFxx, SFR_BIT_CSIIFxx); #else SPI_SIOxx = reg; while(!SPI_CSIIFxx); SPI_CSIIFxx = 0; SPI_SIOxx = 0; //send empty byte while(!SPI_CSIIFxx); SPI_CSIIFxx = 0; #endif digitalWrite( SS_PIN, HIGH ); return(SPI_SIOxx); }
/* Single host register write */ void MAX3421E::regWr( byte reg, byte val) { digitalWrite( SS_PIN, LOW ); #ifdef WORKAROUND_READ_MODIFY_WRITE SPI_SIOxx = ( reg | 0x02 ); while(!SPI_CSIIFxx); CBI(SFR_IFxx, SFR_BIT_CSIIFxx); SPI_SIOxx = val; while(!SPI_CSIIFxx); CBI(SFR_IFxx, SFR_BIT_CSIIFxx); #else SPI_SIOxx = ( reg | 0x02 ); while(!SPI_CSIIFxx); SPI_CSIIFxx = 0; SPI_SIOxx = val; while(!SPI_CSIIFxx); SPI_CSIIFxx = 0; #endif digitalWrite( SS_PIN, HIGH ); return; }
void init_steppers(void) { // Stop the X pulse timer. SET_3_BITS(TCCRxB, CSx2,CSx1,CSx0, 0b000); // Waveform Generation Mode = Fast PWM w/ TOP on ICRn. SET_2_BITS(TCCRxB, WGMx3,WGMx2, 0b11); SET_2_BITS(TCCRxA, WGMx1,WGMx0, 0b10); // Set the enable, step, and direction pins to output mode. SBI(DDRx_enable, DDxn_enable); SBI(DDRx_dir, DDxn_dir); SBI(DDRx_step, DDxn_step); // Initialize enable, direction, and step pins. CBI(PORTx_step, PORTxn_step); SBI(PORTx_dir, PORTxn_dir); CBI(PORTx_enable, PORTxn_enable); // Set counter to zero. TCNTx = 0; // Set ICR (TOP) to 1 millisecond. ICRx = F_CPU / 1000; // Set the step pulse width to 1 microsecond. OCRxx_pulse = F_CPU / 1000000; // Comparator Output Mode. Fast PWM, clear on match, set on BOTTOM. SET_2_BITS(TCCRxA, COMxx1_pulse,COMxx0_pulse, 0b10); // Clear counter overflow interrupt flag. SBI(TIFRx, TOVx); // Enable interrupt on counter overflow. SBI(TIMSKx, TOIEx); // N.B., the timers are not started yet. They will be started // after the first action is enqueued. }
static void initISR(timer16_Sequence_t timer) { if( timer == _timer1){ if( SRV_TAUxEN == 0 ){ #ifdef WORKAROUND_READ_MODIFY_WRITE SBI2( SRV_SFR2_PERx, SRV_SFR2_BIT_TAUxEN ); /* supplies input clock */ #else SRV_TAUxEN = 1U; /* supplies input clock */ #endif SRV_TPSx = TIMER_CLOCK; } #ifdef WORKAROUND_READ_MODIFY_WRITE /* Set INTTM04 low priority */ SBI( SRV_SFR_PR1xx, SRV_SFR_BIT_TMPR1xx ); SBI( SRV_SFR_PR0xx, SRV_SFR_BIT_TMPR0xx ); /* Mask channel 04 interrupt */ CBI( SRV_SFR_MKxx, SRV_SFR_BIT_TMMKxx ); /* enable INTTM04 interrupt */ CBI( SRV_SFR_IFxx, SRV_SFR_BIT_TMIFxx ); /* clear INTTM04 interrupt flag */ #else /* Set INTTM04 low priority */ SRV_TMPR1xx = 1U; SRV_TMPR0xx = 1U; /* Mask channel 04 interrupt */ SRV_TMMKxx = 0U; /* enable INTTM04 interrupt */ SRV_TMIFxx = 0U; /* clear INTTM04 interrupt flag */ #endif /* Channel 0 used as interval timer */ SRV_TMRxx = 0x8000U; SRV_TDRxx = (unsigned int)usToTicks(REFRESH_INTERVAL); SRV_TSx |= SRV_CHx; /* operation is enabled (start trigger is generated) */ delay(1); Channel[timer] = -1; handle_interrupts(_timer1); /* TDR0x setting */ } }
/// setup I/O pins and directions for /// communicating with the VS1001 void vs1001::init_io(void) { char dummy; #ifdef VS1000_NEW // setup xDCS (same as pin as BSYNC AFAIK) SBI( xDCS_DDR , xDCS_PIN ); // pin is output for xDCS SBI( xDCS_PORT, xDCS_PIN ); // output High //send a pulse to ensure BSYNC Counter has been reset CBI( xDCS_PORT, xDCS_PIN ); // output Low SBI( xDCS_PORT, xDCS_PIN ); // output High #else // setup BSYNC SBI( BSYNC_DDR , BSYNC_PIN ); // pin is output for BSYNC CBI( BSYNC_PORT, BSYNC_PIN ); // output low //send a pulse to ensure BSYNC Counter has been reset SBI( BSYNC_PORT, BSYNC_PIN ); // output High CBI( BSYNC_PORT, BSYNC_PIN ); // output low #endif // set the MP3/ChipSelect pin hi SBI( MP3_DDR , MP3_PIN); // pin output for xCS SBI( MP3_PORT, MP3_PIN); // output hi (deselect MP3) // set the /Reset pin hi SBI( RESET_DDR , RESET_PIN); // pin output SBI( RESET_PORT, RESET_PIN); // output hi // Setup DREQ Pin CBI(DREQ_DDR , DREQ_PIN); // pin input CBI(DREQ_PORT, DREQ_PIN); // no pullup // Setup the SPI Hardware ( often done in MMC libs, may confict) SPCR = (0<<SPIE)|(1<<SPE)|(0<<DORD)|(1<<MSTR)|(0<<CPOL)|(0<<CPHA)|(0<<SPR1)|(1<<SPR0); SPSR = (1<<SPI2X); // SPEED = FOSC/8 => arduino =>2MHZ dummy = SPSR; // clear status dummy = SPDR; }
void lcdSend4Bits(uint8_t data) { SBI(LCD_E_PORT, LCD_OE); SBI(LCD_DATA_PORT, LCD_D4); SBI(LCD_DATA_PORT, LCD_D5); SBI(LCD_DATA_PORT, LCD_D6); SBI(LCD_DATA_PORT, LCD_D7); if (!CHECK(data, 4)) CBI(LCD_DATA_PORT, LCD_D4); if (!CHECK(data, 5)) CBI(LCD_DATA_PORT, LCD_D5); if (!CHECK(data, 6)) CBI(LCD_DATA_PORT, LCD_D6); if (!CHECK(data, 7)) CBI(LCD_DATA_PORT, LCD_D7); _delay_loop_1(1); // 3+ cycles CBI(LCD_E_PORT, LCD_OE); }
unsigned int get_adc7(void) { unsigned int ret; // Enable the adc SBI(ADCSRA, ADEN); // Set mux to adc 7 ADMUX = (0 << REFS1) | (1 << REFS0) | (1 << MUX2) | (1 << MUX1) | (1 << MUX0); // Convert ret = get_val(); // Disable ADC CBI(ADCSRA, ADEN); return ret; }
void SPIClass::start() { #ifdef WORKAROUND_READ_MODIFY_WRITE CBI(SFR_IFxx, SFR_BIT_CSIIFxx); // 割り込み要求フラグをクリア SPI_SOx |= SPI_CHx << 8; // シリアル出力バッファ設定 SPI_SOx &= ~SPI_CHx; SPI_SOEx |= SPI_CHx; // シリアル出力許可 SPI_SSx |= SPI_CHx; // シリアル通信開始 #else SPI_CSIIFxx = 0; // 割り込み要求フラグをクリア SPI_SOx |= SPI_CHx << 8; // シリアル出力バッファ設定 SPI_SOx &= ~SPI_CHx; SPI_SOEx |= SPI_CHx; // シリアル出力許可 SPI_SSx |= SPI_CHx; // シリアル通信開始 #endif }
FORCE_INLINE void _tx_udr_empty_irq(void) { // If interrupts are enabled, there must be more data in the output // buffer. Send the next byte const uint8_t t = tx_buffer.tail, c = tx_buffer.buffer[t]; tx_buffer.tail = (t + 1) & (TX_BUFFER_SIZE - 1); M_UDRx = c; // clear the TXC bit -- "can be cleared by writing a one to its bit // location". This makes sure flush() won't return until the bytes // actually got written SBI(M_UCSRxA, M_TXCx); if (tx_buffer.head == tx_buffer.tail) { // Buffer empty, so disable interrupts CBI(M_UCSRxB, M_UDRIEx); } }
void MarlinSerial::end() { CBI(M_UCSRxB, M_RXENx); CBI(M_UCSRxB, M_TXENx); CBI(M_UCSRxB, M_RXCIEx); }
int main(int argc, char *argv[]) { { libmaus2::lz::LineSplittingGzipOutputStream LSG("gzsplit",4,17); for ( uint64_t i = 0; i < 17; ++i ) LSG << "line_" << i << "\n"; } { libmaus2::lz::LineSplittingGzipOutputStream LSG("nogzsplit",4,17); } testGzip(); testlz4(); #if 0 maskBamDuplicateFlag(std::cin,std::cout); return 0; #endif #if 0 { libmaus2::lz::BgzfInflateDeflateParallel BIDP(std::cin,std::cout,Z_DEFAULT_COMPRESSION,32,128); libmaus2::autoarray::AutoArray<char> B(64*1024,false); int r; uint64_t t = 0; uint64_t last = std::numeric_limits<uint64_t>::max(); uint64_t lcnt = 0; uint64_t const mod = 64*1024*1024; libmaus2::timing::RealTimeClock rtc; rtc.start(); libmaus2::timing::RealTimeClock lrtc; lrtc.start(); while ( (r = BIDP.read(B.begin(),B.size())) ) { BIDP.write(B.begin(),r); lcnt += r; t += r; if ( t/mod != last/mod ) { if ( isatty(STDERR_FILENO) ) std::cerr << "\r" << std::string(60,' ') << "\r"; std::cerr << rtc.formatTime(rtc.getElapsedSeconds()) << " " << t/(1024*1024) << "MB, " << (lcnt/lrtc.getElapsedSeconds())/(1024.0*1024.0) << "MB/s"; if ( isatty(STDERR_FILENO) ) std::cerr << std::flush; else std::cerr << std::endl; lrtc.start(); last = t; lcnt = 0; } } if ( isatty(STDERR_FILENO) ) std::cerr << "\r" << std::string(60,' ') << "\r"; std::cerr << rtc.formatTime(rtc.getElapsedSeconds()) << " " << t/(1024*1024) << "MB, " << (t/rtc.getElapsedSeconds())/(1024.0*1024.0) << "MB/s"; std::cerr << std::endl; return 0; } #endif #if 0 { ::libmaus2::lz::BgzfDeflateParallel BDP(std::cout,32,128,Z_DEFAULT_COMPRESSION); while ( std::cin ) { libmaus2::autoarray::AutoArray<char> B(16384); std::cin.read(B.begin(),B.size()); int64_t const r = std::cin.gcount(); BDP.write(B.begin(),r); } BDP.flush(); std::cout.flush(); } return 0; #endif #if 0 { try { libmaus2::lz::BgzfInflateParallel BIP(std::cin /* ,4,16 */); uint64_t c = 0; uint64_t b = 0; uint64_t d = 0; libmaus2::timing::RealTimeClock rtc; rtc.start(); libmaus2::autoarray::AutoArray<uint8_t> adata(64*1024,false); while ( (d=BIP.read(reinterpret_cast<char *>(adata.begin()),adata.size())) != 0 ) { b += d; if ( ++c % (16*1024) == 0 ) { std::cerr << c << "\t" << b/(1024.0*1024.0*1024.0) << "\t" << static_cast<double>(b)/(1024.0*1024.0*rtc.getElapsedSeconds()) << " MB/s" << std::endl; } } std::cerr << c << "\t" << b/(1024.0*1024.0*1024.0) << "\t" << static_cast<double>(b)/(1024.0*1024.0*rtc.getElapsedSeconds()) << " MB/s" << std::endl; std::cerr << "decoded " << b << " bytes in " << rtc.getElapsedSeconds() << " seconds." << std::endl; } catch(std::exception const & ex) { std::cerr << ex.what() << std::endl; return EXIT_FAILURE; } } return 0; #endif std::cerr << "Testing random data on bgzf..."; testBgzfRandom(); std::cerr << "done." << std::endl; std::cerr << "Testing mono..."; testBgzfMono(); std::cerr << "done." << std::endl; ::libmaus2::lz::BgzfDeflate<std::ostream> bdefl(std::cout); char const * str = "Hello, world.\n"; bdefl.write(reinterpret_cast<char const *>(str),strlen(str)); bdefl.flush(); bdefl.write(reinterpret_cast<char const *>(str),strlen(str)); bdefl.flush(); bdefl.addEOFBlock(); return 0; ::libmaus2::lz::BgzfInflateStream SW(std::cin); ::libmaus2::autoarray::AutoArray<char> BB(200,false); while ( SW.read(BB.begin(),BB.size()) ) { } if ( argc < 2 ) return EXIT_FAILURE; return 0; #if 0 ::libmaus2::lz::GzipHeader GZH(argv[1]); return 0; #endif std::ostringstream ostr; ::libmaus2::autoarray::AutoArray<uint8_t> message = ::libmaus2::util::GetFileSize::readFile(argv[1]); std::cerr << "Deflating message of length " << message.size() << "..."; ::libmaus2::lz::Deflate DEFL(ostr); DEFL.write ( reinterpret_cast<char const *>(message.begin()), message.size() ); DEFL.flush(); std::cerr << "done." << std::endl; std::cerr << "Checking output..."; std::istringstream istr(ostr.str()); ::libmaus2::lz::Inflate INFL(istr); int c; uint64_t i = 0; while ( (c=INFL.get()) >= 0 ) { assert ( c == message[i] ); i++; } std::cerr << "done." << std::endl; // std::cerr << "Message size " << message.size() << std::endl; std::string testfilename = "test"; ::libmaus2::lz::BlockDeflate BD(testfilename); BD.write ( message.begin(), message.size() ); BD.flush(); uint64_t const decpos = message.size() / 3; ::libmaus2::lz::BlockInflate BI(testfilename,decpos); ::libmaus2::autoarray::AutoArray<uint8_t> dmessage (message.size(),false); uint64_t const red = BI.read(dmessage.begin()+decpos,dmessage.size()); assert ( red == dmessage.size()-decpos ); std::cerr << "("; for ( uint64_t i = decpos; i < message.size(); ++i ) assert ( message[i] == dmessage[i] ); std::cerr << ")\n"; std::string shortmes1("123456789"); std::string shortmes2("AA"); std::string shortmes3("BB"); std::string shortmes4("CC"); std::string textfile1("test1"); std::string textfile2("test2"); std::string textfile3("test3"); std::string textfile4("test4"); ::libmaus2::lz::BlockDeflate BD1(textfile1); BD1.write ( reinterpret_cast<uint8_t const *>(shortmes1.c_str()), shortmes1.size() ); BD1.flush(); ::libmaus2::lz::BlockDeflate BD2(textfile2); BD2.write ( reinterpret_cast<uint8_t const *>(shortmes2.c_str()), shortmes2.size() ); BD2.flush(); ::libmaus2::lz::BlockDeflate BD3(textfile3); BD3.write ( reinterpret_cast<uint8_t const *>(shortmes3.c_str()), shortmes3.size() ); BD3.flush(); ::libmaus2::lz::BlockDeflate BD4(textfile4); BD4.write ( reinterpret_cast<uint8_t const *>(shortmes4.c_str()), shortmes4.size() ); BD4.flush(); std::vector < std::string > filenames; filenames.push_back(textfile1); filenames.push_back(textfile2); filenames.push_back(textfile3); filenames.push_back(textfile4); for ( uint64_t j = 0; j <= 15; ++j ) { ::libmaus2::lz::ConcatBlockInflate CBI(filenames,j); for ( uint64_t i = 0; i < j; ++i ) std::cerr << ' '; for ( uint64_t i = 0; i < CBI.n-j; ++i ) std::cerr << (char)CBI.get(); std::cerr << std::endl; } return 0; }
/** * Initialice the accelerometer setting hte pin 2 and 3 of PORTD */ void init_accelerometer() { CBI(DDRD,XPIN); // x-pin CBI(DDRD,YPIN); // y-pin }
void lcdInit() { // based on http://www.mimuw.edu.pl/~marpe/mikrokontrolery/w5_klawisze_lcd.pdf // slide no. 26 // set input/output direction SBI(LCD_DATA_DDR, LCD_D4); SBI(LCD_DATA_DDR, LCD_D5); SBI(LCD_DATA_DDR, LCD_D6); SBI(LCD_DATA_DDR, LCD_D7); SBI(LCD_E_DDR, LCD_OE); SBI(LCD_RS_DDR, LCD_RS); CBI(LCD_RS_PORT, LCD_RS); CBI(LCD_E_PORT, LCD_OE); _delay_ms(40); SBI(LCD_E_PORT, LCD_OE); SBI(LCD_DATA_PORT, LCD_D4); SBI(LCD_DATA_PORT, LCD_D5); CBI(LCD_DATA_PORT, LCD_D6); CBI(LCD_DATA_PORT, LCD_D7); _delay_loop_1(1); // 3+ cycles CBI(LCD_E_PORT, LCD_OE); _delay_ms(4.1); SBI(LCD_E_PORT, LCD_OE); _delay_loop_1(1); // 3+ cycles CBI(LCD_E_PORT, LCD_OE); _delay_us(100); SBI(LCD_E_PORT, LCD_OE); _delay_loop_1(1); // 3+ cycles CBI(LCD_E_PORT, LCD_OE); _delay_us(100); SBI(LCD_E_PORT, LCD_OE); CBI(LCD_DATA_PORT, LCD_D4); _delay_loop_1(1); // 3+ cycles CBI(LCD_E_PORT, LCD_OE); _delay_us(100); lcdInstr(0x28); //0b00101000 lcdInstr(0x06); //0b00000110 lcdInstr(0x0f); //0b00001111 lcdInstr(0x01); //0b00000001 _delay_ms(2); }
void lcdInstr(uint8_t instr) { CBI(LCD_RS_PORT, LCD_RS); lcdSend4BitsMode(instr); }