static u16 frsky_cb()
{
if (state < FRSKY_BIND_DONE) {
build_bind_packet_1way();
CC2500_Strobe(CC2500_SIDLE);
CC2500_WriteReg(CC2500_0A_CHANNR, 0x00);
CC2500_WriteData(packet, packet[0]+1);
state++;
return 53460;
}
if (state == FRSKY_BIND_DONE) {
state++;
PROTOCOL_SetBindState(0);
}
if (state >= FRSKY_DATA1) {
u8 chan = calc_channel();
CC2500_Strobe(CC2500_SIDLE);
CC2500_WriteReg(CC2500_0A_CHANNR, chan * 5 + 6);
build_data_packet_1way();
CC2500_WriteData(packet, packet[0]+1);
state++;
if (state > FRSKY_DATA5)
state = FRSKY_DATA1;
return 9006;
}
return 0;
}
/**
* @brief Reads one packet from
* @param Memory pointer to store recieved packets
* @param Number of bytes to read (packet length + <optional
* @note Flushes the FIFO after retrieving and puts CC2500 in IDLE mode.
Assumes RX packets are already in RX FIFO
*/
void CC2500_RxPackets(uint8_t* pBuffer, uint16_t NumByteToRead) {
// Read the packet(s)
CC2500_Read(pBuffer, CC2500_FIFO_ADDR, NumByteToRead);
// Go to idle and flush rx buffer.
CC2500_Strobe(CC2500_STROBE_SIDLE, DUMMY_BYTE);
CC2500_Strobe(CC2500_STROBE_SFRX, DUMMY_BYTE);
}
uint8_t frsky_d8_rx_getpkt(void)
{
uint8_t ret = 0;
if (HAL_GPIO_ReadPin(CC2500_GD0_GPIO, CC2500_GD0_PIN) == GPIO_PIN_SET)
{
// note: can't read this while the packet is still being received.
// HAL_Delay(1); // but this is just silly.
CC2500_Strobe(CC2500_STROBE_SIDLE);
volatile uint8_t rx_packet_length = CC2500_ReadReg(CC2500_REG_RXBYTES | CC2500_READ_BURST);
if ((rx_packet_length > 7) && (rx_packet_length < D8_MAX_PACKET_SIZE)) // TODO: fix this to detect pktlen from bindmode
{
CC2500_ReadRXData(rxmsg.packet, rx_packet_length);
if ((rxmsg.d8_rx_packet_data.header_bindcode == m_config.frsky_d8_bind_info.bind_id) && (rxmsg.d8_rx_packet_data.len == 0x11))
/* So, there's two bytes in the packet header that indicate something.
* 0x0100 - North American launch day taranis A
* - DJT jr module
* 0x0300 - XJT jr module
* There are others out there which are unknown, so this check is removed for now.
* Also, there's a CRC or something at the end. But it isn't. 0xA0 bits will always match it. */
ret = rx_packet_length;
}
CC2500_Strobe(CC2500_STROBE_SFRX);
}
return ret;
}
static void CORONA_rf_init() {
CC2500_Strobe(CC2500_SIDLE);
for (u8 i = 0; i <= 0x2E; ++i) CC2500_WriteReg(i, CORONA_init_values[i]);
CC2500_Strobe(CC2500_SCAL); // just duplicating stock tx
CC2500_ReadReg(CC2500_25_FSCAL1); // just duplicating stock tx
if (Model.proto_opts[PROTO_OPTS_FORMAT] == FORMAT_V2) {
CC2500_WriteReg(CC2500_0A_CHANNR, CORONA_BIND_CHANNEL_V2);
CC2500_WriteReg(CC2500_0E_FREQ1, 0x80);
CC2500_WriteReg(CC2500_0F_FREQ0, 0x00);
CC2500_WriteReg(CC2500_15_DEVIATN, 0x50);
CC2500_WriteReg(CC2500_17_MCSM1, 0x00);
CC2500_WriteReg(CC2500_1B_AGCCTRL2, 0x67);
CC2500_WriteReg(CC2500_1C_AGCCTRL1, 0xFB);
CC2500_WriteReg(CC2500_1D_AGCCTRL0, 0xDC);
} else if (Model.proto_opts[PROTO_OPTS_FORMAT] == FORMAT_FDV3) {
// Flydream receiver captures have deviation 50, tx captures show 47
CC2500_WriteReg(CC2500_15_DEVIATN, 0x50);
}
CC2500_WriteReg(CC2500_0C_FSCTRL0, Model.proto_opts[PROTO_OPTS_FREQFINE]);
CC2500_SetTxRxMode(TX_EN);
CC2500_SetPower(0); // min power for binding, set in build_packet for normal operation
}
/**
* @brief Transmits one packet
* @param Memory pointer to packet for Tx
* @param Number of bytes to Tx (length of packet)
* @note Flushes FIFO before placing packet in buffer.
*/
void CC2500_TxPacket(uint8_t* pBuffer, uint16_t NumByteToWrite) {
// Put the device to idle mode to flush the TX buffer
CC2500_Strobe(CC2500_STROBE_SIDLE, 0x00);
// flust the tx fifo
CC2500_Strobe(CC2500_STROBE_SFTX, 0x00);
//write bytes to tx fifo
CC2500_Write(pBuffer, CC2500_FIFO_ADDR, NumByteToWrite);
//enable transmission
CC2500_Strobe(CC2500_STROBE_STX, 0x00);
// status of device after TX will vary depending on MCSM1.TXOFF_MODE[1:0]
}
void RxPacket(void const *argument){
uint8_t mode_filter, transmit_mode;
//uint8_t buf;
uint8_t buf;
Packet pkt;
GPIO_ResetBits(GPIOD, GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15);
mode_filter = 0x70;
transmit_mode = 0x20;
printf("Thread_started. waitig for signal\n");
// put reciever in RX mode
CC2500_Strobe(CC2500_STROBE_SRX, 0x00);
while(1){
int i;
osSignalWait(RX_PKT, osWaitForever);
//turn on LED on packet RX
GPIO_ToggleBits(GPIOD, GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15);
CC2500_Read(&buf ,CC2500_FIFO_ADDR, 1);
//CC2500_RxPackets((uint8_t*)&pkt, CC2500_SETTING_PKTLEN + 2);
printf("buf is %d \n", buf);
if(pkt.Src_addr == 0x01){
i++;
// put the measured RSSI in byte 3 for main board
pkt.Aux_rssi = pkt.Rssi;
printf("%d Packet received from user beacon\n", i);
printf("SRC: 0x%02x\t\t", pkt.Src_addr);
printf("SEQ: 0x%02x\t\t", pkt.Seq_num);
printf("RAW_RSSI: 0x%02x\n", pkt.Rssi);
buf = CC2500_Strobe(CC2500_STROBE_SRX, 0x3F);
printf("Buffer : 0x%02x\n", buf);
}
// change the source address on the packet
pkt.Src_addr = CC2500_SETTING_ADDR;
// transmit this packet for main board
osDelay(100);
CC2500_TxPacket((uint8_t*)&pkt, CC2500_SETTING_PKTLEN);
// turn off LED on successful Tx
GPIO_ToggleBits(GPIOD, GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15);
// put device back to rx mode
osDelay(100);
}
}
int CC2500_Reset()
{
CC2500_Strobe(CC2500_SRES);
usleep(1000);
CC2500_SetTxRxMode(TXRX_OFF);
return CC2500_ReadReg(CC2500_0E_FREQ1) == 0xC4;
}
/**
* @brief Recieves wireless data.
*
* @notes Recieves wireless data, checks the CRC for correctness, and then
* returns the value if it is ok. Otherwise an error value is returned.
* @retval The angle data from the transmitter board or an error code.
*/
angle_data CC2500_RXData(void){
uint8_t bytes_in_rxfifo;
uint8_t data[4];
uint8_t crc;
angle_data processed_data;
CC2500_Strobe(SRX);
while(CC2500_Strobe(SNOP) != 1);
CC2500_Read(&bytes_in_rxfifo, RXBYTES, 1);
bytes_in_rxfifo = bytes_in_rxfifo & 0x7F;
if(bytes_in_rxfifo >= 4){
CC2500_Read(data, 0xFF, 4);
crc = data[3] & 0x80;
if(crc){
processed_data.pitch = data[PITCH_DATA] - 90;
processed_data.roll = data[ROLL_DATA] - 90;
}
CC2500_Strobe(SIDLE);
while(CC2500_Strobe(SNOP) != 0);
CC2500_Strobe(SFRX);
// Return to RX mode
CC2500_Strobe(SRX);
// Wait until mode changes
while(CC2500_Strobe(SNOP) != 1);
}
return processed_data;
}
/**
* @brief Receive packets
* @param Pre-Set Argument
* @retval Null
*/
void RxPacket(void const *argument){
uint8_t mode_filter, transmit_mode;
//uint8_t buf;
uint8_t buf[2];
GPIO_ResetBits(GPIOD, GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15);
mode_filter = 0x70;
transmit_mode = 0x20;
printf("Thread_started. waiting for signal\n");
// put reciever in RX mode
CC2500_Strobe(CC2500_STROBE_SRX, 0x00);
while(1){
int i = 0;
status = CC2500_Strobe(CC2500_STROBE_SRX, 0x00);
CC2500_Read(&temp, CC2500_STATUS_REG_RXBYTES , 2);
CC2500_Read(&test, CC2500_STATUS_REG_PKTSTATUS , 2);
//Read only if correct packet length
if(temp == CC2500_SETTING_PKTLEN)
{
status = CC2500_Strobe(CC2500_STROBE_SRX, 0x00);
CC2500_RxPackets((uint8_t*)received, CC2500_SETTING_PKTLEN ); //Store in float array
}
osDelay(100);
}
}
static void HITEC_CC2500_init() {
const u8 HITEC_init_values[] = {
/* 00 */ 0x2F, 0x2E, 0x2F, 0x07, 0xD3, 0x91, 0xFF, 0x04,
/* 08 */ 0x45, 0x00, 0x00, 0x12, 0x00, 0x5C, 0x85, HITEC_FREQ0_VAL,
/* 10 */ 0x3D, 0x3B, 0x73, 0x73, 0x7A, 0x01, 0x07, 0x30,
/* 18 */ 0x08, 0x1D, 0x1C, 0xC7, 0x00, 0xB0, 0x87, 0x6B,
/* 20 */ 0xF8, 0xB6, 0x10, 0xEA, 0x0A, 0x00, 0x11,
};
CC2500_Strobe(CC2500_SIDLE);
for (u8 i = 0; i < 39; ++i)
CC2500_WriteReg(i, HITEC_init_values[i]);
CC2500_SetTxRxMode(TX_EN);
CC2500_SetPower(Model.tx_power);
}
/**
* @brief Sends data from the transmitter to the reciever.
*
* @notes Processes data and sends it to the reciever.
* @param data: The angle data to send to the reciever.
*/
void CC2500_TXData(angle_data data){
uint8_t transmitted_data[2];
uint8_t bytes_in_txfifo;
transmitted_data[PITCH_DATA] = data.pitch + 90;
transmitted_data[ROLL_DATA] = data.roll + 90;
CC2500_Strobe(SIDLE);
while(CC2500_Strobe(SNOP) != 0);
CC2500_Strobe(SFTX);
CC2500_Write(transmitted_data, 0x3F, 2);
CC2500_Strobe(STX);
while(CC2500_Strobe(SNOP) != 2);
while(CC2500_Strobe(SNOP) != 0);
}
static void frsky_init()
{
CC2500_Reset();
CC2500_WriteReg(CC2500_17_MCSM1, 0x0c);
CC2500_WriteReg(CC2500_18_MCSM0, 0x18);
CC2500_WriteReg(CC2500_06_PKTLEN, 0xff);
CC2500_WriteReg(CC2500_07_PKTCTRL1, 0x04);
CC2500_WriteReg(CC2500_08_PKTCTRL0, 0x05);
CC2500_WriteReg(CC2500_3E_PATABLE, 0xfe);
CC2500_WriteReg(CC2500_0B_FSCTRL1, 0x08);
CC2500_WriteReg(CC2500_0C_FSCTRL0, fine);
CC2500_WriteReg(CC2500_0D_FREQ2, 0x5c);
CC2500_WriteReg(CC2500_0E_FREQ1, 0x58);
CC2500_WriteReg(CC2500_0F_FREQ0, 0x9d + course);
CC2500_WriteReg(CC2500_10_MDMCFG4, 0xaa);
CC2500_WriteReg(CC2500_11_MDMCFG3, 0x10);
CC2500_WriteReg(CC2500_12_MDMCFG2, 0x93);
CC2500_WriteReg(CC2500_13_MDMCFG1, 0x23);
CC2500_WriteReg(CC2500_14_MDMCFG0, 0x7a);
CC2500_WriteReg(CC2500_15_DEVIATN, 0x41);
CC2500_WriteReg(CC2500_19_FOCCFG, 0x16);
CC2500_WriteReg(CC2500_1A_BSCFG, 0x6c);
CC2500_WriteReg(CC2500_1B_AGCCTRL2, 0x43);
CC2500_WriteReg(CC2500_1C_AGCCTRL1, 0x40);
CC2500_WriteReg(CC2500_1D_AGCCTRL0, 0x91);
CC2500_WriteReg(CC2500_21_FREND1, 0x56);
CC2500_WriteReg(CC2500_22_FREND0, 0x10);
CC2500_WriteReg(CC2500_23_FSCAL3, 0xa9);
CC2500_WriteReg(CC2500_24_FSCAL2, 0x0a);
CC2500_WriteReg(CC2500_25_FSCAL1, 0x00);
CC2500_WriteReg(CC2500_26_FSCAL0, 0x11);
CC2500_WriteReg(CC2500_29_FSTEST, 0x59);
CC2500_WriteReg(CC2500_2C_TEST2, 0x88);
CC2500_WriteReg(CC2500_2D_TEST1, 0x31);
CC2500_WriteReg(CC2500_2E_TEST0, 0x0b);
CC2500_WriteReg(CC2500_03_FIFOTHR, 0x07);
CC2500_WriteReg(CC2500_09_ADDR, 0x00);
CC2500_SetTxRxMode(TX_EN);
CC2500_SetPower(Model.tx_power);
CC2500_Strobe(CC2500_SIDLE); // Go to idle...
//CC2500_WriteReg(CC2500_02_IOCFG0, 0x06);
//CC2500_WriteReg(CC2500_0A_CHANNR, 0x06);
#if 0
CC2500_WriteReg(CC2500_02_IOCFG0, 0x01); // reg 0x02: RX complete interrupt
CC2500_WriteReg(CC2500_17_MCSM1, 0x0C); // reg 0x17: Stay in rx after packet complete
CC2500_WriteReg(CC2500_18_MCSM0, 0x18); // reg 0x18: Calibrate when going from idle to rx or tx, po timeout count = 64
CC2500_WriteReg(CC2500_06_PKTLEN, 62); // Leave room for appended status bytes
CC2500_WriteReg(CC2500_08_PKTCTRL0, 0x05); // reg 0x08: CRC_EN = 1, Length_config = 1 (variable length)
CC2500_WriteReg(CC2500_3E_PATABLE, 0xFF);
CC2500_WriteReg(CC2500_0B_FSCTRL1, 0x08); // reg 0x0B: 203 KHz IF
CC2500_WriteReg(CC2500_0C_FSCTRL0, 0x00); // reg 0x0C
// CC2500_WriteReg(CC2500_0D_FREQ2, 0x5C); // reg 0x0D
// CC2500_WriteReg(CC2500_0E_FREQ1, 0x76); // reg 0x0E
// CC2500_WriteReg(CC2500_0F_FREQ0, 0x27); // reg 0x0F
CC2500_WriteReg(CC2500_0D_FREQ2, 0x5C); // reg 0x0D hack: Due to a bit high xtal we shift this down by around 70 khz
CC2500_WriteReg(CC2500_0E_FREQ1, 0x75); // reg 0x0E
CC2500_WriteReg(CC2500_0F_FREQ0, 0x6A); // reg 0x0F
CC2500_WriteReg(CC2500_10_MDMCFG4, 0xAA); // reg 0x10
CC2500_WriteReg(CC2500_11_MDMCFG3, 0x39); // reg 0x11
CC2500_WriteReg(CC2500_12_MDMCFG2, 0x11); // reg 0x12
CC2500_WriteReg(CC2500_13_MDMCFG1, 0x23); // reg 0x13
CC2500_WriteReg(CC2500_14_MDMCFG0, 0x7A); // reg 0x14
CC2500_WriteReg(CC2500_15_DEVIATN, 0x42); // reg 0x15
CC2500_WriteReg(CC2500_19_FOCCFG, 0x16); // reg 0x19
CC2500_WriteReg(CC2500_1A_BSCFG, 0x6C); // reg 0x1A
CC2500_WriteReg(CC2500_1B_AGCCTRL2, 0x03); // reg 0x1B
CC2500_WriteReg(CC2500_1C_AGCCTRL1, 0x40); // reg 0x1C
CC2500_WriteReg(CC2500_1D_AGCCTRL0, 0x91); // reg 0x1D
CC2500_WriteReg(CC2500_21_FREND1, 0x56); // reg 0x21: Default POR value
CC2500_WriteReg(CC2500_22_FREND0, 0x10); // reg 0x22: Default POR value
CC2500_WriteReg(CC2500_23_FSCAL3, 0xA9); // reg 0x23: Default POR value
CC2500_WriteReg(CC2500_24_FSCAL2, 0x05); // reg 0x24: Default POR value
CC2500_WriteReg(CC2500_25_FSCAL1, 0x00); // reg 0x25
CC2500_WriteReg(CC2500_26_FSCAL0, 0x11); // reg 0x26
CC2500_WriteReg(CC2500_29_FSTEST, 0x59); // reg 0x29
CC2500_WriteReg(CC2500_2C_TEST2, 0x88); // reg 0x2C
CC2500_WriteReg(CC2500_2D_TEST1, 0x31); // reg 0x2D
CC2500_WriteReg(CC2500_2E_TEST0, 0x0B); // reg 0x2E
CC2500_WriteReg(CC2500_03_FIFOTHR, 0x0F); // reg 0x03: Use max rx fifo
CC2500_WriteReg(CC2500_09_ADDR, 0x03); // reg 0x09: FrSky bind address is 0x0301 on channel 0
CC2500_Strobe(CC2500_SIDLE); // Go to idle...
CC2500_WriteReg(CC2500_07_PKTCTRL1,0x0D); // reg 0x07 hack: Append status, filter by address, auto-flush on bad crc, PQT=0
CC2500_WriteReg(CC2500_0C_FSCTRL0, 0); // Frequency offset...
CC2500_WriteReg(CC2500_0A_CHANNR, 0);
#endif
}
void CC2500_Reset()
{
CC2500_RfPwr=0xff;
CC2500_Strobe(CC2500_SRES);
}
void CC2500_WriteData(u8 *dpbuffer, u8 len)
{
CC2500_Strobe(CC2500_SFTX);
CC2500_WriteRegisterMulti(CC2500_3F_TXFIFO, dpbuffer, len);
CC2500_Strobe(CC2500_STX);
}
void CC2500_Reset()
{
CC2500_Strobe(CC2500_SRES);
}
/**
* @brief Set CC2500 Initialization.
* @param None
* @retval None
*/
void CC2500_Init(void) {
CC2500_LowLevel_Init();
// Wireless configuration as defined on project specification page 9
uint8_t reg;
// reset the device first
CC2500_Strobe(CC2500_STROBE_SRES, DUMMY_BYTE);
osDelay(50);
// put the device in idle mode
CC2500_Strobe(CC2500_STROBE_SIDLE, DUMMY_BYTE);
osDelay(50);
reg = (uint8_t)CC2500_SETTING_FSCTRL1;
CC2500_Write(®, CC2500_CFG_REG_FSCTRL1, 1);
reg = (uint8_t)CC2500_SETTING_FSCTRL0;
CC2500_Write(®, CC2500_CFG_REG_FSCTRL0, 1);
reg = (uint8_t)CC2500_SETTING_FREQ2;
CC2500_Write(®, CC2500_CFG_REG_FREQ2, 1);
reg = (uint8_t)CC2500_SETTING_FREQ1;
CC2500_Write(®, CC2500_CFG_REG_FREQ1, 1);
reg = (uint8_t)CC2500_SETTING_FREQ0;
CC2500_Write(®, CC2500_CFG_REG_FREQ0, 1);
reg = (uint8_t)CC2500_SETTING_MDMCFG4;
CC2500_Write(®, CC2500_CFG_REG_MDMCFG4, 1);
reg = (uint8_t)CC2500_SETTING_MDMCFG3;
CC2500_Write(®, CC2500_CFG_REG_MDMCFG3, 1);
reg = (uint8_t)CC2500_SETTING_MDMCFG2;
CC2500_Write(®, CC2500_CFG_REG_MDMCFG2, 1);
reg = (uint8_t)CC2500_SETTING_MDMCFG1;
CC2500_Write(®, CC2500_CFG_REG_MDMCFG1, 1);
reg = (uint8_t)CC2500_SETTING_MDMCFG0;
CC2500_Write(®, CC2500_CFG_REG_MDMCFG0, 1);
reg = (uint8_t)CC2500_SETTING_CHANNR;
CC2500_Write(®, CC2500_CFG_REG_CHANNR, 1);
reg = (uint8_t)CC2500_SETTING_DEVIATN;
CC2500_Write(®, CC2500_CFG_REG_DEVIATN, 1);
reg = (uint8_t)CC2500_SETTING_FREND1;
CC2500_Write(®, CC2500_CFG_REG_FRIEND1, 1);
reg = (uint8_t)CC2500_SETTING_FREND0;
CC2500_Write(®, CC2500_CFG_REG_FRIEND0, 1);
reg = (uint8_t)CC2500_SETTING_MCSM0;
CC2500_Write(®, CC2500_CFG_REG_MCSM0, 1);
reg = (uint8_t)0x33;
CC2500_Write(®, CC2500_CFG_REG_MCSM1, 1);
reg = (uint8_t)CC2500_SETTING_FOCCFG;
CC2500_Write(®, CC2500_CFG_REG_FOCCFG, 1);
reg = (uint8_t)CC2500_SETTING_BSCFG;
CC2500_Write(®, CC2500_CFG_REG_BSCFG, 1);
reg = (uint8_t)CC2500_SETTING_AGCCTRL2;
CC2500_Write(®, CC2500_CFG_REG_AGCCTRL2, 1);
reg = (uint8_t)CC2500_SETTING_AGCCTRL1;
CC2500_Write(®, CC2500_CFG_REG_AGCCTRL1, 1);
reg = (uint8_t)CC2500_SETTING_AGCCTRL0;
CC2500_Write(®, CC2500_CFG_REG_AGCCTRL0, 1);
reg = (uint8_t)CC2500_SETTING_FSCAL3;
CC2500_Write(®, CC2500_CFG_REG_FSCAL3, 1);
reg = (uint8_t)CC2500_SETTING_FSCAL2;
CC2500_Write(®, CC2500_CFG_REG_FSCAL2, 1);
reg = (uint8_t)CC2500_SETTING_FSCAL1;
CC2500_Write(®, CC2500_CFG_REG_FSCAL1, 1);
reg = (uint8_t)CC2500_SETTING_FSCAL0;
CC2500_Write(®, CC2500_CFG_REG_FSCAL0, 1);
reg = (uint8_t)CC2500_SETTING_FSTEST;
CC2500_Write(®, CC2500_CFG_REG_FSTEST, 1);
reg = (uint8_t)CC2500_SETTING_TEST2;
CC2500_Write(®, CC2500_CFG_REG_TEST2, 1);
reg = (uint8_t)CC2500_SETTING_TEST1;
CC2500_Write(®, CC2500_CFG_REG_TEST1, 1);
reg = (uint8_t)CC2500_SETTING_TEST0;
CC2500_Write(®, CC2500_CFG_REG_TEST0, 1);
reg = (uint8_t)CC2500_SETTING_FIFOTHR;
CC2500_Write(®, CC2500_CFG_REG_FIFOTHR, 1);
reg = (uint8_t)CC2500_SETTING_IOCFG2;
CC2500_Write(®, CC2500_CFG_REG_IOCFG2, 1);
reg = (uint8_t)CC2500_SETTING_IOCFG0;
CC2500_Write(®, CC2500_CFG_REG_IOCFG0, 1);
reg = (uint8_t)CC2500_SETTING_PKTCTRL1;
CC2500_Write(®, CC2500_CFG_REG_PKTCTRL1, 1);
reg = (uint8_t)CC2500_SETTING_PKTCTRL0;
CC2500_Write(®, CC2500_CFG_REG_PKTCTRL0, 1);
reg = (uint8_t)CC2500_SETTING_ADDR;
CC2500_Write(®, CC2500_CFG_REG_ADDR, 1);
reg = (uint8_t)CC2500_SETTING_PKTLEN;
CC2500_Write(®, CC2500_CFG_REG_PKTLEN, 1);
// flush the rx and tx buffer
CC2500_Strobe(CC2500_STROBE_SFTX, DUMMY_BYTE);
CC2500_Strobe(CC2500_STROBE_SFRX, DUMMY_BYTE);
}
/**
* @brief Configures the SPI and starts the wireless chipset.
*
* @notes Configures SPI with the pins defined in the CC2500.h file. Then uses
* the SPI to put the wireless chipset through its manual restart
* procedure.
*/
void CC2500_LowLevel_Init(void){
GPIO_InitTypeDef GPIO_InitStructure;
SPI_InitTypeDef SPI_InitStructure;
uint8_t ctrl;
/* Enable the SPI periph */
RCC_APB2PeriphClockCmd(CC2500_SPI_CLK, ENABLE);
/* Enable SCK, MOSI and MISO GPIO clocks */
RCC_AHB1PeriphClockCmd(CC2500_SPI_SCK_GPIO_CLK | CC2500_SPI_MISO_GPIO_CLK | CC2500_SPI_MOSI_GPIO_CLK, ENABLE);
/* Enable CS GPIO clock */
RCC_AHB1PeriphClockCmd(CC2500_SPI_CS_GPIO_CLK, ENABLE);
GPIO_PinAFConfig(CC2500_SPI_SCK_GPIO_PORT, CC2500_SPI_SCK_SOURCE, CC2500_SPI_SCK_AF);
GPIO_PinAFConfig(CC2500_SPI_MISO_GPIO_PORT, CC2500_SPI_MISO_SOURCE, CC2500_SPI_MISO_AF);
GPIO_PinAFConfig(CC2500_SPI_MOSI_GPIO_PORT, CC2500_SPI_MOSI_SOURCE, CC2500_SPI_MOSI_AF);
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_DOWN;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
/* SPI SCK pin configuration */
GPIO_InitStructure.GPIO_Pin = CC2500_SPI_SCK_PIN;
GPIO_Init(CC2500_SPI_SCK_GPIO_PORT, &GPIO_InitStructure);
/* SPI MOSI pin configuration */
GPIO_InitStructure.GPIO_Pin = CC2500_SPI_MOSI_PIN;
GPIO_Init(CC2500_SPI_MOSI_GPIO_PORT, &GPIO_InitStructure);
/* SPI MISO pin configuration */
GPIO_InitStructure.GPIO_Pin = CC2500_SPI_MISO_PIN;
GPIO_Init(CC2500_SPI_MISO_GPIO_PORT, &GPIO_InitStructure);
/* SPI configuration -------------------------------------------------------*/
SPI_I2S_DeInit(CC2500_SPI);
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_16;
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
SPI_InitStructure.SPI_CRCPolynomial = 7;
SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
SPI_Init(CC2500_SPI, &SPI_InitStructure);
/* Enable SPI1 */
SPI_Cmd(CC2500_SPI, ENABLE);
/* Configure GPIO PIN for Lis Chip select */
GPIO_InitStructure.GPIO_Pin = CC2500_SPI_CS_PIN;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
GPIO_Init(CC2500_SPI_CS_GPIO_PORT, &GPIO_InitStructure);
/* Deselect : Chip Select high */
GPIO_SetBits(CC2500_SPI_CS_GPIO_PORT, CC2500_SPI_CS_PIN);
//CC2500_Read(&ctrl, 0x30, 1);
CC2500_CS_LOW();
delay(100);
CC2500_CS_HIGH();
delay(100);
CC2500_CS_LOW();
delay(150);
// Send reset command
CC2500_Strobe(SRES);
while(!GPIO_ReadInputDataBit(CC2500_SPI_MISO_GPIO_PORT, CC2500_SPI_MISO_PIN));
CC2500_CS_HIGH();
// Set to IDLE state
CC2500_Strobe(SIDLE);
}
