void bootloader_main() {
SystemInit();
spiflash_reinit();
CGU_Init();
hw_digital_output(LED1);
hw_digital_output(LED2);
hw_digital_output(CC3K_CONN_LED);
hw_digital_output(CC3K_ERR_LED);
hw_digital_write(CC3K_CONN_LED, 0);
hw_digital_write(CC3K_ERR_LED, 0);
init_systick();
__enable_irq();
usb_init();
usb_set_speed(USB_SPEED_FULL);
usb_attach();
while(!exit_and_jump) {
led_task();
__WFI(); /* conserve power */
}
delay_ms(25);
usb_detach();
delay_ms(100);
if (dfu_target == TARGET_RAM) {
jump_to_flash(DFU_DEST_BASE, 0);
}
}
void board_init(void)
{
SystemInit();
CGU_Init();
SysTick_Config( CGU_GetPCLKFrequency(CGU_PERIPHERAL_M4CORE)/CFG_TICKS_PER_SECOND ); /* 1 ms Timer */
//------------- USB Bus power HOST ONLY-------------//
scu_pinmux(0x1, 7, MD_PUP | MD_EZI, FUNC4); // P1_7 USB0_PWR_EN, USB0 VBus function Xplorer
scu_pinmux(0x2, 6, MD_PUP | MD_EZI, FUNC4); // P2_6 is configured as GPIO5[6] for USB1_PWR_EN
GPIO_SetDir (5, BIT_(6), 1); // GPIO5[6] is output
GPIO_SetValue (5, BIT_(6)); // GPIO5[6] output high
// Leds Init
for (uint8_t i=0; i<BOARD_MAX_LEDS; i++)
{
scu_pinmux(leds[i].port, leds[i].pin, MD_PUP|MD_EZI|MD_ZI, FUNC0);
GPIO_SetDir(leds[i].port, BIT_(leds[i].pin), 1); // output
}
#if CFG_UART_ENABLE
//------------- UART init -------------//
UART_CFG_Type UARTConfigStruct;
scu_pinmux(0x6 ,4, MD_PDN|MD_EZI, FUNC2); // UART0_TXD
scu_pinmux(0x6 ,5, MD_PDN|MD_EZI, FUNC2); // UART0_RXD
UART_ConfigStructInit(&UARTConfigStruct); // default: baud = 9600, 8 bit data, 1 stop bit, no parity
UARTConfigStruct.Baud_rate = CFG_UART_BAUDRATE; // Re-configure baudrate
UART_Init((LPC_USARTn_Type*) LPC_USART0, &UARTConfigStruct); // Initialize UART port
UART_TxCmd((LPC_USARTn_Type*) LPC_USART0, ENABLE); // Enable UART
#endif
}
/**
* Initialize the system
*
* @param none
* @return none
*
* @brief Setup the microcontroller system.
* Initialize the System.
*/
void SystemInit (void)
{
#ifdef KEIL
#if defined(CORE_M4) || defined(CORE_M3)
// Enable VTOR register to point to vector table
SCB->VTOR = getPC() & 0xFFF00000;
#else // code red
// CodeRed startup code will modify VTOR register to match
// when code has been linked to run from.
// Check whether we are running from external flash
if (SCB->VTOR == 0x1C000000)
/*Enable Buffer for External Flash*/
LPC_EMC->STATICCONFIG0 |= 1<<19;
// Call clock initialisation code
CGU_Init();
#endif
/*Enable Buffer for External Flash*/
LPC_EMC->STATICCONFIG0 |= 1<<19;
#endif
}
//====================================================================================
void main()
{
volatile uint32_t i;
uint32_t timer_mark;
//while(1);
SystemInit();
CGU_Init();
scu_pinmux(0xE ,7 , MD_PDN, FUNC4); // P8.1 : USB0_IND1 LED
GPIO_SetDir(LED1_PORT,(1<<LED1_BIT), 1);
GPIO_ClearValue(LED1_PORT,(1<<LED1_BIT));
// M3Frequency is automatically set when SetClock(BASE_M3_CLK... was called.
SysTick_Config(CGU_GetPCLKFrequency(CGU_PERIPHERAL_M4CORE)/1000); // Generate interrupt @ 1000 Hz
/*for(;;)
{
GPIO_ClearValue(LED1_PORT,(1<<LED1_BIT));
for(i = 0; i < 200000; i++);
GPIO_SetValue(LED1_PORT,(1<<LED1_BIT));
for(i = 0; i < 200000; i++);
}
while (1)
{ // Loop forever
timer_mark = msTicks; // Take timer snapshot
while(msTicks < (timer_mark + 100)); // Wait until 100ms has passed
GPIO_ClearValue(LED1_PORT,(1<<LED1_BIT)); // Turn the LED off
timer_mark = msTicks; // Take timer snapshot
while(msTicks < (timer_mark + 100)); // Wait until 100ms has passed
GPIO_SetValue(LED1_PORT,(1<<LED1_BIT)); // Turn the LED on
}*/
// Init on-board LED as output
//GPIO1->FIODIR |= 1 << 18;
// Init SysTick
//SysTick_Config(SystemFrequency / 1000); // Generate interrupt every 1 ms
while (1)
{ // Loop forever
msec = 100;
while(msec);
GPIO_ClearValue(LED1_PORT,(1<<LED1_BIT));
msec = 100;
while(msec);
GPIO_SetValue(LED1_PORT,(1<<LED1_BIT));
}
}
int main(void)
{
SystemInit();
CGU_Init();
// Configure GPIO pins connected to LEDs as outputs
scu_pinmux(D3_SCU_PORT, D3_SCU_PIN, MD_BUK, FUNC4);
GPIO_SetDir(D3_GPIO_PORT, D3_GPIO_MASK, 1);
scu_pinmux(D4_SCU_PORT, D4_SCU_PIN, MD_BUK, FUNC4);
GPIO_SetDir(D4_GPIO_PORT, D4_GPIO_MASK, 1);
scu_pinmux(D5_SCU_PORT, D5_SCU_PIN, MD_BUK, FUNC4);
GPIO_SetDir(D5_GPIO_PORT, D5_GPIO_MASK, 1);
scu_pinmux(D6_SCU_PORT, D6_SCU_PIN, MD_BUK, FUNC4);
GPIO_SetDir(D6_GPIO_PORT, D6_GPIO_MASK, 1);
// Configure GPIO pins connected to push buttons as inputs
scu_pinmux(S1_SCU_PORT, S1_SCU_PIN, MD_BUK | MD_EZI, FUNC4);
GPIO_SetDir(S1_GPIO_PORT, S1_GPIO_MASK, 0);
scu_pinmux(S2_SCU_PORT, S2_SCU_PIN, MD_BUK | MD_EZI, FUNC4);
GPIO_SetDir(S2_GPIO_PORT, S2_GPIO_MASK, 0);
scu_pinmux(S3_SCU_PORT, S3_SCU_PIN, MD_BUK | MD_EZI, FUNC4);
GPIO_SetDir(S3_GPIO_PORT, S3_GPIO_MASK, 0);
scu_pinmux(S4_SCU_PORT, S4_SCU_PIN, MD_BUK | MD_EZI, FUNC4);
GPIO_SetDir(S4_GPIO_PORT, S4_GPIO_MASK, 0);
while(1)
{
if (GPIO_ReadValue(S1_GPIO_PORT) & S1_GPIO_MASK)
GPIO_ClearValue(D3_GPIO_PORT, D3_GPIO_MASK);
else
GPIO_SetValue(D3_GPIO_PORT, D3_GPIO_MASK);
if (GPIO_ReadValue(S2_GPIO_PORT) & S2_GPIO_MASK)
GPIO_ClearValue(D4_GPIO_PORT, D4_GPIO_MASK);
else
GPIO_SetValue(D4_GPIO_PORT, D4_GPIO_MASK);
if (GPIO_ReadValue(S3_GPIO_PORT) & S3_GPIO_MASK)
GPIO_ClearValue(D5_GPIO_PORT, D5_GPIO_MASK);
else
GPIO_SetValue(D5_GPIO_PORT, D5_GPIO_MASK);
if (GPIO_ReadValue(S4_GPIO_PORT) & S4_GPIO_MASK)
GPIO_ClearValue(D6_GPIO_PORT, D6_GPIO_MASK);
else
GPIO_SetValue(D6_GPIO_PORT, D6_GPIO_MASK);
}
}
void bsp_init(void)
{
uint32_t Core_Clock;
/* Set up core clock */
CGU_Init();
/*Init Timer*/
Core_Clock = CGU_GetPCLKFrequency(CORE_CLOCK_ID);
SysTick_Config(Core_Clock/100); /* 10ms Timer */
/* Initialize the external memory controller */
vEMC_InitSRDRAM(SDRAM_BASE_ADDR, SDRAM_WIDTH, SDRAM_SIZE_MBITS, SDRAM_DATA_BUS_BITS, SDRAM_COL_ADDR_BITS);
scu_pinmux(0x9, 5, MD_PUP | MD_EZI, FUNC2); // P9_5 USB1_PWR_EN, USB1 VBus function
scu_pinmux(0x2, 5, MD_PLN | MD_EZI | MD_ZI, FUNC2); // P2_5 USB1_VBUS, MUST CONFIGURE THIS SIGNAL FOR USB1 NORMAL OPERATION
scu_pinmux(0x6, 3, MD_PUP | MD_EZI, FUNC1); // P6_3 USB0_PWR_EN, USB0 VBus function
}
void board_init(void)
{
/* Raise core clock to 204MHz */
CGU_Init(204000000);
/* Set up USB0 clock */
/* Disable PLL first */
CGU_EnableEntity(CGU_CLKSRC_PLL0, DISABLE);
/* the usb core require output clock = 480MHz */
if (CGU_SetPLL0() != CGU_ERROR_SUCCESS) {
while (1);
}
CGU_EntityConnect(CGU_CLKSRC_XTAL_OSC, CGU_CLKSRC_PLL0);
/* Enable PLL after all setting is done */
CGU_EnableEntity(CGU_CLKSRC_PLL0, ENABLE);
/* Turn on the USB0PHY */
LPC_CREG->CREG0 &= ~(1 << 5);
}
void bsp_init(void)
{
uint32_t Core_Clock;
/* Set up core clock */
CGU_Init();
/* Initialize the external memory controller */
vEMC_InitSRDRAM(SDRAM_BASE_ADDR, SDRAM_WIDTH, SDRAM_SIZE_MBITS, SDRAM_DATA_BUS_BITS, SDRAM_COL_ADDR_BITS);
/* Turn on 5V USB VBUS TODO Should be Host-only */
scu_pinmux(0x9, 5, MD_PUP | MD_EZI, FUNC2); // P9_5 USB1_VBUS_EN, USB1 VBus function
scu_pinmux(0x2, 5, MD_PLN | MD_EZI | MD_ZI, FUNC2); // P2_5 USB1_VBUS, MUST CONFIGURE THIS SIGNAL FOR USB1 NORMAL OPERATION
#if (BOARD == BOARD_HITEX_A4)
scu_pinmux(0x6, 3, MD_PUP | MD_EZI, FUNC1); // P6_3 USB0_PWR_EN, USB0 VBus function
#else
scu_pinmux(0x2, 3, MD_PUP | MD_EZI, FUNC7); // USB0 VBus function
#endif
}
int main(void)
{
SystemInit();
CGU_Init();
// Configure external flash
MemoryPinInit();
EMCSRDRAMInit();
EMCFlashInit();
// Init SysTick to 1ms
SysTick_Config(CGU_GetPCLKFrequency(CGU_PERIPHERAL_M4CORE) / 1000);
// Copy image to SDRAM
memcpy((void *)SDRAM_BASE_ADDR, (void *)IMAGE_FLASH_ADDR, 2UL*1024*768);
// Initialize TFP410
TFP410_Init((void *)SDRAM_BASE_ADDR);
while (1)
{
}
}
int main(void)
{
uint8_t i;
SystemInit();
CGU_Init();
// Configure buttons
scu_pinmux(S1_SCU_PORT, S1_SCU_PIN, MD_BUK | MD_EZI, FUNC4);
scu_pinmux(S2_SCU_PORT, S2_SCU_PIN, MD_BUK | MD_EZI, FUNC4);
scu_pinmux(S3_SCU_PORT, S3_SCU_PIN, MD_BUK | MD_EZI, FUNC4);
scu_pinmux(S4_SCU_PORT, S4_SCU_PIN, MD_BUK | MD_EZI, FUNC4);
for (i = 0; i < 4; i++)
{
GPIO_SetDir(buttons[i].port, buttons[i].mask, 0); // input
}
// Configure LED D2
scu_pinmux(D2_SCU_PORT, D2_SCU_PIN, MD_BUK, FUNC0);
GPIO_SetDir(D2_GPIO_PORT, D2_GPIO_MASK, 1); // output
GPIO_ClearValue(D2_GPIO_PORT, D2_GPIO_MASK); // low
// Start M0
m0started = 0;
InitM0aProcessor();
NVIC_ClearPendingIRQ(M0CORE_IRQn);
NVIC_EnableIRQ(M0CORE_IRQn);
StartM0aProcessor();
while (!m0started);
// Init SysTick to 1ms
SysTick_Config(CGU_GetPCLKFrequency(CGU_PERIPHERAL_M4CORE) / 1000);
while (1)
{
}
}
void bsp_init(void)
{
uint32_t Core_Clock;
/* Set up core clock */
CGU_Init();
/*Init Timer*/
Core_Clock = CGU_GetPCLKFrequency(CORE_CLOCK_ID);
SysTick_Config(Core_Clock/100); /* 10ms Timer */
/* Initialize the external memory controller */
vEMC_InitSRDRAM(SDRAM_BASE_ADDR, SDRAM_WIDTH, SDRAM_SIZE_MBITS, SDRAM_DATA_BUS_BITS, SDRAM_COL_ADDR_BITS);
/* Turn on 5V USB VBUS TODO Should be Host-only */
scu_pinmux(0x2, 6, MD_PUP | MD_EZI, FUNC4); // P2_6 USB1_PWR_EN, USB1 VBus function
scu_pinmux(0x2, 5, MD_PLN | MD_EZI | MD_ZI, FUNC2); // P2_5 USB1_VBUS, MUST CONFIGURE THIS SIGNAL FOR USB1 NORMAL OPERATION
/* Turn on 5V USB VBUS TODO Should be Host-only */
#if (BOARD == BOARD_XPLORER)
scu_pinmux(0x1, 7, MD_PUP | MD_EZI, FUNC4); // P1_7 USB0_PWR_EN, USB0 VBus function Xplorer
#else
scu_pinmux(0x2, 3, MD_PUP | MD_EZI, FUNC7); // P2_3 USB0_PWR_EN, USB0 VBus function Farnell
#endif
}
void main ( void )
{
ADI_ETHER_HANDLE hEthernet;
ADI_ETHER_RESULT etherResult;
ADI_ETHER_DEV_INIT EtherInitData[MAX_NETWORK_IF] = { { true, &memtable[0] }, { true, &memtable[1] }}; // data-cache,driver memory
uint32_t reg_data;
int i, nEtherDevUsed;
char *ether_stack_block;
ADI_GPIO_RESULT gpio_result;
uint32_t gpioMaxCallbacks;
int nRet;
/**
* Initialize managed drivers and/or services that have been added to
* the project.
* @return zero on success
*/
adi_initComponents();
/**
* The default startup code does not include any functionality to allow
* core 0 to enable core 1. A convenient way to enable core 1 is to use the
* 'adi_core_1_enable' function.
*/
adi_core_1_enable();
/* Begin adding your custom code here */
g_AuxiTMIsFirstUpdated = 1;
/* init CGU first time */
CGU_Init ( MULTIPLIER_SEL, CCLK_SEL, DDRCLK_SEL ); /* CCLK=16.384*iMultiplier /1 Mhz, 16.384*iMultiplier/iDDCLKSel Mhz DDR2 CLK */
#if defined(__DEBUG_FILE__)
/* open the debug file */
pDebugFile = fopen(__DEBUG_FILE_NAME__, "w");
if (pDebugFile == 0)
{
fclose(pDebugFile);
return;
}
#elif defined(__DEBUG_UART__)
Init_UART();
#endif
Init_PTPAuxin();
/* configures the switches */
#if BF609_EZ_BRD
DEBUG_STATEMENT ( "Configuring switches for the ethernet operation \n\n" );
ConfigSoftSwitches();
#endif
/* open ethernet device */
nEtherDevUsed = ( user_net_num_ifces > MAX_NETWORK_IF ) ? MAX_NETWORK_IF : user_net_num_ifces;
#if BF609_EZ_BRD
nEtherDevUsed = 1;
#endif
DEBUG_STATEMENT ( " init EMAC\n\n" );
for ( i = 0; i < nEtherDevUsed; i++ )
{
etherResult = adi_ether_Open ( g_pDevEntry[i], &EtherInitData[i], g_pEthCallBack[i], &hEthernet );
if ( etherResult != ADI_ETHER_RESULT_SUCCESS )
{
DEBUG_STATEMENT ( "adi_ether_Open: failed to open ethernet driver\n\n" );
return ;
}
g_hDev[i] = hEthernet;
/* get the mac address */
memcpy ( ( ( ADI_EMAC_DEVICE * ) hEthernet )->MacAddress, user_net_config_info[i].hwaddr, 6 );
/* allocate memory */
ether_stack_block = heap_malloc ( i+1, g_contEthHeapSize[i] );
if ( ether_stack_block == NULL )
{
DEBUG_PRINT ( " heap_malloc: in heap %d, failed to allocate memory to the stack \n\n" , i+1);
return ;
}
/* init buf mem */
nRet = InitBuff ( g_contEthHeapSize[i],
ether_stack_block, hEthernet,
&user_net_config_info[i] );
if( nRet<0 )
{
DEBUG_STATEMENT ( " InitBuff: failed to enable Init Buffs\n\n" );
return ;
}
/* Enable the MAC */
etherResult = adi_ether_EnableMAC ( hEthernet );
if ( etherResult != ADI_ETHER_RESULT_SUCCESS )
{
DEBUG_STATEMENT ( " adi_ether_EnableMAC: failed to enable EMAC\n\n" );
return ;
}
}
//enable EMAC INT
adi_int_EnableInt ( ( (ADI_EMAC_DEVICE *)g_hDev[0])->Interrupt, true);
adi_int_EnableInt ( ( (ADI_EMAC_DEVICE *)g_hDev[1])->Interrupt, true);
/* activate rx channel DMA */
enable_rx ( g_hDev[0] );
enable_rx ( g_hDev[1] );
/* activate tx channel DMA */
enable_tx ( g_hDev[0] );
enable_tx ( g_hDev[1] );
//enable emac0 tx,rx
enable_emac_tx_rx ( g_hDev[0] );
//enable emac1 tx,rx
enable_emac_tx_rx ( g_hDev[1] );
//enable
Enable_Time_Stamp_Auxin_Interrupt();
//
HandleLoop();
return ;
}//main
/**
* Initialize the system
*
* @param none
* @return none
*
* @brief Setup the microcontroller system.
* Initialize the System.
*/
void SystemInit (void)
{
uint32_t org;
#if !defined(__CODE_RED)
#if defined(CORE_M4) && defined(USE_FPU)
fpuEnable();
#endif
#endif
#if !defined(CORE_M0)
// Set up Cortex_M3 or M4 VTOR register to point to vector table
// This code uses a toolchain defined symbol to locate the vector table
// If this is not completed, interrupts are likely to cause an exception.
unsigned int * pSCB_VTOR = (unsigned int *) 0xE000ED08;
#if defined(__IAR_SYSTEMS_ICC__)
extern void *__vector_table;
org = *pSCB_VTOR = (unsigned int)&__vector_table;
#elif defined(__CODE_RED)
extern void *g_pfnVectors;
// CodeRed - correct to assign address of variable not contents
// org = *pSCB_VTOR = (unsigned int)g_pfnVectors;
org = *pSCB_VTOR = (unsigned int)&g_pfnVectors;
#elif defined(__ARMCC_VERSION)
extern void *__Vectors;
org = *pSCB_VTOR = (unsigned int)&__Vectors;
#elif defined(__GNUC__)
extern void *__isr_vector;
org = *pSCB_VTOR = (unsigned int)&__isr_vector;
#else
#error Unknown compiler
#endif
#else
// Cortex M0?
#error Cannot configure VTOR on Cortex_M0
#endif
// LPC18xx/LPC43xx ROM sets the PLL to run from IRC and drive the part
// at 96 MHz out of reset
SystemCoreClock = 96000000;
// In case we are running from external flash, (booted by boot rom)
// We enable the EMC buffer to improve performance.
if(org == 0x1C000000)
{
/*Enable Buffer for External Flash*/
LPC_EMC->STATICCONFIG0 |= 1<<19;
}
// CodeRed - call clock init code by default
#ifdef __CODE_RED
// Call clock initialisation code
CGU_Init();
#endif
// In case we are running from internal flash, we configure the flash
// accelerator. This is a conservative value that should work up to 204
// MHz on the LPC43xx or 180 MHz on the LPC18xx. This value may change
// as the chips are characterized and should also change based on
// core clock speed.
#define FLASH_ACCELERATOR_SPEED 6
#ifdef INTERNAL_FLASH
{
uint32_t *MAM,t;
// Set up flash controller for both banks
// Bank A
MAM = (uint32_t *)(LPC_CREG_BASE + 0x120);
t=*MAM;
t &= ~(0xF<<12);
*MAM = t | (FLASH_ACCELERATOR_SPEED<<12);
// Bank B
MAM = (uint32_t *)(LPC_CREG_BASE + 0x124);
t=*MAM;
t &= ~(0xF<<12);
*MAM = t | (FLASH_ACCELERATOR_SPEED<<12);
}
#endif
}
