int
TRAunsetup(GENmodel *inModel, CKTcircuit *ckt)
{
TRAmodel *model;
TRAinstance *here;
for (model = (TRAmodel *)inModel; model != NULL;
model = model->TRAnextModel)
{
for (here = model->TRAinstances; here != NULL;
here=here->TRAnextInstance)
{
if (here->TRAbrEq1) {
CKTdltNNum(ckt, here->TRAbrEq1);
here->TRAbrEq1= 0;
}
if (here->TRAbrEq2) {
CKTdltNNum(ckt, here->TRAbrEq2);
here->TRAbrEq2= 0;
}
if (here->TRAintNode1) {
CKTdltNNum(ckt, here->TRAintNode1);
here->TRAintNode1= 0;
}
if (here->TRAintNode2) {
CKTdltNNum(ckt, here->TRAintNode2);
here->TRAintNode2= 0;
}
}
}
return OK;
}
int
BSIM3v32unsetup(
GENmodel *inModel,
CKTcircuit *ckt)
{
BSIM3v32model *model;
BSIM3v32instance *here;
for (model = (BSIM3v32model *)inModel; model != NULL;
model = model->BSIM3v32nextModel)
{
for (here = model->BSIM3v32instances; here != NULL;
here=here->BSIM3v32nextInstance)
{
if (here->BSIM3v32dNodePrime
&& here->BSIM3v32dNodePrime != here->BSIM3v32dNode)
{
CKTdltNNum(ckt, here->BSIM3v32dNodePrime);
here->BSIM3v32dNodePrime = 0;
}
if (here->BSIM3v32sNodePrime
&& here->BSIM3v32sNodePrime != here->BSIM3v32sNode)
{
CKTdltNNum(ckt, here->BSIM3v32sNodePrime);
here->BSIM3v32sNodePrime = 0;
}
}
}
return OK;
}
int
HFET2unsetup(GENmodel *inModel, CKTcircuit *ckt)
{
HFET2model *model;
HFET2instance *here;
for (model = (HFET2model *)inModel; model != NULL;
model = model->HFET2nextModel)
{
for (here = model->HFET2instances; here != NULL;
here=here->HFET2nextInstance)
{
if (here->HFET2drainPrimeNode
&& here->HFET2drainPrimeNode != here->HFET2drainNode)
{
CKTdltNNum(ckt, here->HFET2drainPrimeNode);
here->HFET2drainPrimeNode = 0;
}
if (here->HFET2sourcePrimeNode
&& here->HFET2sourcePrimeNode != here->HFET2sourceNode)
{
CKTdltNNum(ckt, here->HFET2sourcePrimeNode);
here->HFET2sourcePrimeNode = 0;
}
}
}
return OK;
}
int
TXLunsetup(GENmodel *inModel, CKTcircuit *ckt)
{
TXLmodel *model;
TXLinstance *here;
for (model = (TXLmodel *) inModel; model != NULL;
model = model->TXLnextModel) {
for (here = model->TXLinstances; here != NULL;
here = here->TXLnextInstance) {
if (here->TXLibr1) {
CKTdltNNum(ckt, here->TXLibr1);
here->TXLibr1 = 0;
}
if (here->TXLibr2) {
CKTdltNNum(ckt, here->TXLibr2);
here->TXLibr2 = 0;
}
here->TXLdcGiven=0;
}
}
return OK;
}
int
DIOunsetup(
GENmodel *inModel,
CKTcircuit *ckt)
{
DIOmodel *model;
DIOinstance *here;
for (model = (DIOmodel *)inModel; model != NULL;
model = model->DIOnextModel)
{
for (here = model->DIOinstances; here != NULL;
here=here->DIOnextInstance)
{
if (here->DIOposPrimeNode
&& here->DIOposPrimeNode != here->DIOposNode)
{
CKTdltNNum(ckt, here->DIOposPrimeNode);
here->DIOposPrimeNode = 0;
}
}
}
return OK;
}
int
MESAunsetup(GENmodel *inModel, CKTcircuit *ckt)
{
MESAmodel *model;
MESAinstance *here;
for (model = (MESAmodel *)inModel; model != NULL;
model = model->MESAnextModel)
{
for (here = model->MESAinstances; here != NULL;
here=here->MESAnextInstance)
{
if (here->MESAdrainPrimeNode
&& here->MESAdrainPrimeNode != here->MESAdrainNode)
{
CKTdltNNum(ckt, here->MESAdrainPrimeNode);
here->MESAdrainPrimeNode = 0;
}
if (here->MESAsourcePrimeNode
&& here->MESAsourcePrimeNode != here->MESAsourceNode)
{
CKTdltNNum(ckt, here->MESAsourcePrimeNode);
here->MESAsourcePrimeNode = 0;
}
if (here->MESAgatePrimeNode
&& here->MESAgatePrimeNode != here->MESAgateNode)
{
CKTdltNNum(ckt, here->MESAgatePrimeNode);
here->MESAgatePrimeNode = 0;
}
if (here->MESAsourcePrmPrmNode
&& here->MESAsourcePrmPrmNode != here->MESAsourcePrimeNode)
{
CKTdltNNum(ckt, here->MESAsourcePrmPrmNode);
here->MESAsourcePrmPrmNode = 0;
}
if (here->MESAdrainPrmPrmNode
&& here->MESAdrainPrmPrmNode != here->MESAdrainPrimeNode)
{
CKTdltNNum(ckt, here->MESAdrainPrmPrmNode);
here->MESAdrainPrmPrmNode = 0;
}
}
}
return OK;
}
int
BSIM3v32unsetup(
GENmodel *inModel,
CKTcircuit *ckt)
{
BSIM3v32model *model;
BSIM3v32instance *here;
#ifdef USE_OMP
model = (BSIM3v32model*)inModel;
tfree(model->BSIM3v32InstanceArray);
#endif
for (model = (BSIM3v32model *)inModel; model != NULL;
model = BSIM3v32nextModel(model))
{
for (here = BSIM3v32instances(model); here != NULL;
here=BSIM3v32nextInstance(here))
{
if (here->BSIM3v32qNode > 0)
CKTdltNNum(ckt, here->BSIM3v32qNode);
here->BSIM3v32qNode = 0;
if (here->BSIM3v32sNodePrime > 0
&& here->BSIM3v32sNodePrime != here->BSIM3v32sNode)
CKTdltNNum(ckt, here->BSIM3v32sNodePrime);
here->BSIM3v32sNodePrime = 0;
if (here->BSIM3v32dNodePrime > 0
&& here->BSIM3v32dNodePrime != here->BSIM3v32dNode)
CKTdltNNum(ckt, here->BSIM3v32dNodePrime);
here->BSIM3v32dNodePrime = 0;
}
}
return OK;
}
int
VSRCunsetup(GENmodel *inModel, CKTcircuit *ckt)
{
VSRCmodel *model;
VSRCinstance *here;
for (model = (VSRCmodel *)inModel; model != NULL;
model = model->VSRCnextModel)
{
for (here = model->VSRCinstances; here != NULL;
here=here->VSRCnextInstance)
{
if (here->VSRCbranch) {
CKTdltNNum(ckt, here->VSRCbranch);
here->VSRCbranch = 0;
}
}
}
return OK;
}
int
CCVSunsetup(GENmodel *inModel, CKTcircuit *ckt)
{
CCVSmodel *model;
CCVSinstance *here;
for (model = (CCVSmodel *)inModel; model != NULL;
model = model->CCVSnextModel)
{
for (here = model->CCVSinstances; here != NULL;
here=here->CCVSnextInstance)
{
if (here->CCVSbranch) {
CKTdltNNum(ckt, here->CCVSbranch);
here->CCVSbranch = 0;
}
}
}
return OK;
}
int
MIFunsetup(GENmodel *inModel,CKTcircuit *ckt)
{
MIFmodel *model;
MIFinstance *here;
Mif_Smp_Ptr_t *smp_data_out;
/* Mif_Smp_Ptr_t *smp_data_cntl;*/
/* Mif_Port_Type_t type, in_type, out_type;*/
Mif_Port_Type_t in_type, out_type;
Mif_Cntl_Src_Type_t cntl_src_type;
int num_conn,num_port,i,j,k,l,num_port_k;
for (model = (MIFmodel *)inModel; model != NULL;
model = model->MIFnextModel)
{
for(here = model->MIFinstances; here != NULL;
here = here->MIFnextInstance)
{
num_conn=here->num_conn;
for(i = 0; i < num_conn; i++) {
/* if the connection is null, skip to next connection */
if(here->conn[i]->is_null) continue;
/* prepare things for convenient access later */
num_port = here->conn[i]->size;
/* loop through all ports on this connection */
for(j = 0; j < num_port; j++) {
/* determine the type of this output port */
out_type = here->conn[i]->port[j]->type;
/* create a pointer to the smp data for quick access */
smp_data_out = &(here->conn[i]->port[j]->smp_data);
for(k = 0; k < num_conn; k++) {
/* if the connection is null or is not an input
skip to next connection */
if((here->conn[k]->is_null) || (! here->conn[k]->is_input))
continue;
num_port_k = here->conn[k]->size;
/* determine the type of this input port */
for(l = 0; l < num_port_k; l++) {
/* if port is null, skip to next */
if(here->conn[k]->port[l]->is_null)
continue;
in_type = here->conn[i]->port[j]->type;
cntl_src_type = MIFget_cntl_src_type(in_type, out_type);
switch(cntl_src_type)
{
case MIF_VCVS:
case MIF_ICVS:
case MIF_VCIS:
case MIF_ICIS:
case MIF_minus_one: /* FIXME, really ? */
if(smp_data_out->branch)
{
CKTdltNNum(ckt, smp_data_out->branch);
smp_data_out->branch = 0;
}
if(smp_data_out->ibranch)
{
CKTdltNNum(ckt, smp_data_out->ibranch);
smp_data_out->ibranch = 0;
}
here->initialized=MIF_FALSE;
break;
}
}
}
}
}
}
}
/* printf("MIFunsetup completed.\n");*/
return OK;
}
