status_t CLOCK_BootToFeeMode(
mcg_oscsel_t oscsel, uint8_t frdiv, mcg_dmx32_t dmx32, mcg_drs_t drs, void (*fllStableDelay)(void))
{
CLOCK_SetExternalRefClkConfig(oscsel);
return CLOCK_SetFeeMode(frdiv, dmx32, drs, fllStableDelay);
}
status_t CLOCK_BootToBlpeMode(mcg_oscsel_t oscsel)
{
CLOCK_SetExternalRefClkConfig(oscsel);
/* Set to FBE mode. */
MCG->C1 =
((MCG->C1 & ~(MCG_C1_CLKS_MASK | MCG_C1_IREFS_MASK)) | (MCG_C1_CLKS(kMCG_ClkOutSrcExternal) /* CLKS = 2 */
| MCG_C1_IREFS(kMCG_FllSrcExternal))); /* IREFS = 0 */
/* If use external crystal as clock source, wait for it stable. */
{
if (MCG->C2 & MCG_C2_EREFS_MASK)
{
while (!(MCG->S & MCG_S_OSCINIT0_MASK))
{
}
}
}
/* Wait for MCG_S[CLKST] and MCG_S[IREFST]. */
while ((MCG->S & (MCG_S_IREFST_MASK | MCG_S_CLKST_MASK)) !=
(MCG_S_IREFST(kMCG_FllSrcExternal) | MCG_S_CLKST(kMCG_ClkOutStatExt)))
{
}
/* In FBE now, start to enter BLPE. */
MCG->C2 |= MCG_C2_LP_MASK;
return kStatus_Success;
}
status_t CLOCK_BootToPeeMode(mcg_oscsel_t oscsel, mcg_pll_clk_select_t pllcs, mcg_pll_config_t const *config)
{
assert(config);
CLOCK_SetExternalRefClkConfig(oscsel);
CLOCK_SetPbeMode(pllcs, config);
/* Change to use PLL output clock. */
MCG->C1 = (MCG->C1 & ~MCG_C1_CLKS_MASK) | MCG_C1_CLKS(kMCG_ClkOutSrcOut);
while (MCG_S_CLKST_VAL != kMCG_ClkOutStatPll)
{
}
return kStatus_Success;
}
/*******************************************************************************
* Code for BOARD_BootClockRUN configuration
******************************************************************************/
void BOARD_BootClockRUN(void)
{
/* Setup the reference oscillator. */
BOARD_RfOscInit();
/* Set the system clock dividers in SIM to safe value. */
CLOCK_SetSimSafeDivs();
/* Enable RTC oscillator. */
CLOCK_CONFIG_EnableRtcOsc(RTC_OSC_CAP_LOAD_0PF);
/* Initializes OSC0 according to Ref OSC needs. */
BOARD_InitOsc0();
/* Set MCG to FEI mode. */
#if FSL_CLOCK_DRIVER_VERSION >= MAKE_VERSION(2, 2, 0)
CLOCK_BootToFeiMode(mcgConfig_BOARD_BootClockRUN.dmx32,
mcgConfig_BOARD_BootClockRUN.drs,
CLOCK_CONFIG_FllStableDelay);
#else
CLOCK_BootToFeiMode(mcgConfig_BOARD_BootClockRUN.drs,
CLOCK_CONFIG_FllStableDelay);
#endif
/* Configure the Internal Reference clock (MCGIRCLK). */
CLOCK_SetInternalRefClkConfig(mcgConfig_BOARD_BootClockRUN.irclkEnableMode,
mcgConfig_BOARD_BootClockRUN.ircs,
mcgConfig_BOARD_BootClockRUN.fcrdiv);
/* Select the MCG external reference clock. */
CLOCK_SetExternalRefClkConfig(mcgConfig_BOARD_BootClockRUN.oscsel);
/* Set the clock configuration in SIM module. */
CLOCK_SetSimConfig(&simConfig_BOARD_BootClockRUN);
/* Configure RTC clock. */
CLOCK_CONFIG_SetRtcClock();
/* Set SystemCoreClock variable. */
SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK;
/* Set LPUART clock source. */
CLOCK_SetLpuartClock(SIM_LPUART_CLK_SEL_OSCERCLK_CLK);
/* Set TPM clock source. */
CLOCK_SetTpmClock(SIM_TPM_CLK_SEL_OSCERCLK_CLK);
}
status_t CLOCK_SetMcgConfig(const mcg_config_t *config)
{
mcg_mode_t next_mode;
status_t status = kStatus_Success;
mcg_pll_clk_select_t pllcs = kMCG_PllClkSelPll0;
/* If need to change external clock, MCG_C7[OSCSEL]. */
if (MCG_C7_OSCSEL_VAL != config->oscsel)
{
/* If external clock is in use, change to FEI first. */
if (!(MCG->S & MCG_S_IRCST_MASK))
{
CLOCK_ExternalModeToFbeModeQuick();
CLOCK_SetFeiMode(config->dmx32, config->drs, (void (*)(void))0);
}
CLOCK_SetExternalRefClkConfig(config->oscsel);
}
/* Re-configure MCGIRCLK, if MCGIRCLK is used as system clock source, then change to FEI/PEI first. */
if (MCG_S_CLKST_VAL == kMCG_ClkOutStatInt)
{
MCG->C2 &= ~MCG_C2_LP_MASK; /* Disable lowpower. */
{
CLOCK_SetFeiMode(config->dmx32, config->drs, CLOCK_FllStableDelay);
}
}
/* Configure MCGIRCLK. */
CLOCK_SetInternalRefClkConfig(config->irclkEnableMode, config->ircs, config->fcrdiv);
next_mode = CLOCK_GetMode();
do
{
next_mode = mcgModeMatrix[next_mode][config->mcgMode];
switch (next_mode)
{
case kMCG_ModeFEI:
status = CLOCK_SetFeiMode(config->dmx32, config->drs, CLOCK_FllStableDelay);
break;
case kMCG_ModeFEE:
status = CLOCK_SetFeeMode(config->frdiv, config->dmx32, config->drs, CLOCK_FllStableDelay);
break;
case kMCG_ModeFBI:
status = CLOCK_SetFbiMode(config->dmx32, config->drs, (void (*)(void))0);
break;
case kMCG_ModeFBE:
status = CLOCK_SetFbeMode(config->frdiv, config->dmx32, config->drs, (void (*)(void))0);
break;
case kMCG_ModeBLPI:
status = CLOCK_SetBlpiMode();
break;
case kMCG_ModeBLPE:
status = CLOCK_SetBlpeMode();
break;
case kMCG_ModePBE:
/* If target mode is not PBE or PEE, then only need to set CLKS = EXT here. */
if ((kMCG_ModePEE == config->mcgMode) || (kMCG_ModePBE == config->mcgMode))
{
{
status = CLOCK_SetPbeMode(pllcs, &config->pll0Config);
}
}
else
{
MCG->C1 = ((MCG->C1 & ~MCG_C1_CLKS_MASK) | MCG_C1_CLKS(kMCG_ClkOutSrcExternal));
while (MCG_S_CLKST_VAL != kMCG_ClkOutStatExt)
{
}
}
break;
case kMCG_ModePEE:
status = CLOCK_SetPeeMode();
break;
default:
break;
}
if (kStatus_Success != status)
{
return status;
}
} while (next_mode != config->mcgMode);
if (config->pll0Config.enableMode & kMCG_PllEnableIndependent)
{
CLOCK_EnablePll0(&config->pll0Config);
}
else
{
MCG->C5 &= ~(uint32_t)kMCG_PllEnableIndependent;
}
return kStatus_Success;
}
status_t CLOCK_SetMcgConfig(const mcg_config_t *config)
{
mcg_mode_t next_mode;
status_t status = kStatus_Success;
/* If need to change external clock, MCG_C7[OSCSEL]. */
if (MCG_C7_OSCSEL_VAL != config->oscsel)
{
/* If external clock is in use, change to FEI first. */
if (!(MCG->S & MCG_S_IRCST_MASK))
{
CLOCK_ExternalModeToFbeModeQuick();
CLOCK_SetFeiMode(config->dmx32, config->drs, (void (*)(void))0);
}
CLOCK_SetExternalRefClkConfig(config->oscsel);
}
/* Re-configure MCGIRCLK, if MCGIRCLK is used as system clock source, then change to FEI/PEI first. */
if (MCG_S_CLKST_VAL == kMCG_ClkOutStatInt)
{
MCG->C2 &= ~MCG_C2_LP_MASK; /* Disable lowpower. */
{
CLOCK_SetFeiMode(config->dmx32, config->drs, CLOCK_FllStableDelay);
}
}
/* Configure MCGIRCLK. */
CLOCK_SetInternalRefClkConfig(config->irclkEnableMode, config->ircs, config->fcrdiv);
next_mode = CLOCK_GetMode();
do
{
next_mode = mcgModeMatrix[next_mode][config->mcgMode];
switch (next_mode)
{
case kMCG_ModeFEI:
status = CLOCK_SetFeiMode(config->dmx32, config->drs, CLOCK_FllStableDelay);
break;
case kMCG_ModeFEE:
status = CLOCK_SetFeeMode(config->frdiv, config->dmx32, config->drs, CLOCK_FllStableDelay);
break;
case kMCG_ModeFBI:
status = CLOCK_SetFbiMode(config->dmx32, config->drs, (void (*)(void))0);
break;
case kMCG_ModeFBE:
status = CLOCK_SetFbeMode(config->frdiv, config->dmx32, config->drs, (void (*)(void))0);
break;
case kMCG_ModeBLPI:
status = CLOCK_SetBlpiMode();
break;
case kMCG_ModeBLPE:
status = CLOCK_SetBlpeMode();
break;
default:
break;
}
if (kStatus_Success != status)
{
return status;
}
} while (next_mode != config->mcgMode);
return kStatus_Success;
}
