void NRF_WriteReg(uint8_t RegCommand, uint8_t Value)
{
CSN_H();
delay_ms(3);
CSN_L();
spiX_put(RegCommand);
spiX_wait();
spiX_put(Value);
spiX_wait();
CSN_H();
}
void NRF_WriteRegData(uint8_t RegCommand, uint8_t* pData, uint8_t DataSize)
{
uint8_t ii;
CSN_H();
delay_ms(3);
CSN_L();
spiX_put(RegCommand);
spiX_wait();
for(ii = 0; ii < DataSize; ii++)
{
spiX_put(pData[ii]);
spiX_wait();
}
CSN_H();
}
char spiX_readreg(char RegCommand)
{
char val;
CSN_H();
delay_ms(2);
CSN_L();
spiX_put(RegCommand);
spiX_wait();
spiX_get();
delay_ms(3);
spiX_put(0);
spiX_wait();
val = spiX_get();
CSN_H();
return val;
}
/*
*****************************************************************
* 读寄存器
*****************************************************************
*/
uint8_t ANO_NRF::Read_Reg(uint8_t reg)
{
uint8_t reg_val;
CSN_L(); /* 选通器件 */
RW(reg); /* 写寄存器地址 */
reg_val = RW(0); /* 读取该寄存器返回数据 */
CSN_H(); /* 禁止该器件 */
return reg_val;
}
u8 NRF24L01_Read_Reg(u8 reg)
{
u8 reg_val;
CSN_L(); //使能SPI传输
SPI_ReadWriteByte(reg); //发送寄存器号
reg_val=SPI_ReadWriteByte(0XFF);//读取寄存器内容
CSN_H(); //禁止SPI传输
return(reg_val); //返回状态值
}
u8 NRF24L01_Write_Reg(u8 reg,u8 value)
{
u8 status;
CSN_L(); //使能SPI传输
status=SPI_ReadWriteByte(reg); //发送寄存器号
SPI_ReadWriteByte(value); //写入寄存器的值
CSN_H(); //禁止SPI传输
return(status); //返回状态值
}
/*
*****************************************************************
* 写寄存器
*****************************************************************
*/
uint8_t ANO_NRF::Write_Reg(uint8_t reg, uint8_t value)
{
uint8_t status;
CSN_L(); /* 选通器件 */
status = RW(reg); /* 写寄存器地址 */
RW(value); /* 写数据 */
CSN_H(); /* 禁止该器件 */
return status;
}
u8 NRF24L01_Read_Buf(u8 reg,u8 *pBuf,u8 len)
{
u8 status,u8_ctr;
CSN_L(); //使能SPI传输
status=SPI_ReadWriteByte(reg); //发送寄存器值(位置),并读取状态值
for(u8_ctr=0;u8_ctr<len;u8_ctr++)
pBuf[u8_ctr]=SPI_ReadWriteByte(0XFF);//读出数据
CSN_H(); //禁止SPI传输
return status; //返回读到的状态值
}
// Write new value to register
// input:
// reg - register number
// value - new value
// output: nRF24L01 status
uint8_t nRF24_RWReg(uint8_t reg, uint8_t value) {
uint8_t status;
CSN_L();
status = nRF24_ReadWrite(reg); // Select register
nRF24_ReadWrite(value); // Write value to register
CSN_H();
return status;
}
u8 NRF24L01_Write_Buf(u8 reg, u8 *pBuf, u8 len)
{
u8 status,u8_ctr;
CSN_L(); //使能SPI传输
status = SPI_ReadWriteByte(reg);//发送寄存器值(位置),并读取状态值
for(u8_ctr=0; u8_ctr<len; u8_ctr++)
SPI_ReadWriteByte(*pBuf++); //写入数据
CSN_H(); //关闭SPI传输
return status; //返回读到的状态值
}
// Read nRF24L01 register
// input:
// reg - register number
// output: register value
uint8_t nRF24_ReadReg(uint8_t reg) {
uint8_t value;
CSN_L();
nRF24_ReadWrite(reg);
value = nRF24_ReadWrite(0);
CSN_H();
return value;
}
// Send buffer to nRF24L01
// input:
// reg - register number
// pBuf - pointer to buffer
// count - bytes count
// output: nRF24L01 status
uint8_t nRF24_WriteBuf(uint8_t reg, uint8_t *pBuf, uint8_t count) {
uint8_t status,i;
CSN_L();
status = nRF24_ReadWrite(reg);
for (i = 0; i < count; i++) nRF24_ReadWrite(*pBuf++);
CSN_H();
return status;
}
// GPIO and SPI initialization
void nRF24_init() {
// IRQ --> PB2
// CE <-- PB3
// CSN <-- PB4
// SCK <-- PB5
// MOSI <-- PB6
// MISO --> PB7
// SCK,MOSI,CSN,CE pins set as output fiwth push-pull at 10MHz
PB_DDR |= 0x78; // Set PB3..PB6 as output
PB_CR1 |= 0x78; // Configure PB3..PB6 as output with push-pull
PB_CR2 |= 0x78; // Set 10MHz output speed for PB3..PB6 pins
//PB_CR2 &= ~(0x78); // Set 2MHz output speed for PB3..PB6 pins
// MISO pin set as input with pull-up
PB_DDR_bit.DDR7 = 0; // Set PB7 as input
PB_CR1_bit.C17 = 1; // Configure PB7 as input with pull-up
PB_CR2_bit.C27 = 0; // Disable external interrupt for PB7
// IRQ pin set as input with pull-up
PB_DDR_bit.DDR2 = 0; // Set PB2 as input
PB_CR1_bit.C12 = 1; // Configure PB2 as input with pull-up
PB_CR2_bit.C22 = 0; // Disable external interrupt for PB2
// Configure SPI
CLK_PCKENR1_bit.PCKEN14 = 1; // Enable SPI peripherial (PCKEN14)
/*
SPI1_CR1_bit.BR = 0; // Baud = f/2 (1MHz at 2MHz CPU)
SPI1_CR1_bit.CPHA = 0; // CPHA = 1st edge
SPI1_CR1_bit.CPOL = 0; // CPOL = low (SCK low when idle)
SPI1_CR1_bit.LSBFIRST = 0; // first bit is MSB
SPI1_CR1_bit.MSTR = 1; // Master configuration
SPI1_CR1_bit.SPE = 0; // Peripherial enabled
*/
SPI1_CR1 = 0x04; // SPI: MSB first, Baud=f/2, Master, CPOL=low, CPHA=1st edge
//SPI1_CR1 = 0x24; // SPI: MSB first, Baud=f/32, Master, CPOL=low, CPHA=1st edge
/*
SPI1_CR2_bit.BDM = 0; // 2-line unidirectional data mode
SPI1_CR2_bit.BD0E = 0; // don't care when BDM set to 0
SPI1_CR2_bit.RXOnly = 0; // Full duplex
SPI1_CR2_bit.SSI = 1; // Master mode
SPI1_CR2_bit.SSM = 1; // Software slave management enabled
*/
SPI1_CR2 = 0x03; // SPI: 2-line mode, full duplex, SSM on (master mode)
SPI1_CR1_bit.SPE = 1; // SPI peripherial enabled
CSN_H();
CE_L(); // CE pin low -> power down mode at startup
}
/*
*****************************************************************
*
* 写缓冲区
*
*****************************************************************
*/
uint8_t ANO_NRF::Write_Buf(uint8_t reg, uint8_t *pBuf, uint8_t uchars)
{
uint8_t i;
uint8_t status;
CSN_L(); /* 选通器件 */
status = RW(reg); /* 写寄存器地址 */
for(i=0; i<uchars; i++)
{
RW(pBuf[i]); /* 写数据 */
}
CSN_H(); /* 禁止该器件 */
return status;
}
/*
*****************************************************************
* 读缓冲区
*****************************************************************
*/
uint8_t ANO_NRF::Read_Buf(uint8_t reg, uint8_t *pBuf, uint8_t uchars)
{
uint8_t i;
uint8_t status;
CSN_L(); /* 选通器件 */
status = RW(reg); /* 写寄存器地址 */
for(i=0; i<uchars; i++)
{
pBuf[i] = RW(0); /* 读取返回数据 */
}
CSN_H(); /* 禁止该器件 */
return status;
}
// GPIO and SPI initialization
void nRF24_init() {
#if _SPI_PORT == 1
// SPI1
RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1 | RCC_APB2Periph_GPIOA,ENABLE);
#elif _SPI_PORT == 2
// SPI2
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB,ENABLE);
RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2,ENABLE);
#elif _SPI_PORT == 3
// SPI3
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB | RCC_APB2Periph_AFIO,ENABLE);
RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI3,ENABLE);
GPIO_PinRemapConfig(GPIO_Remap_SWJ_JTAGDisable, ENABLE); // Disable JTAG for use PB3
#endif
GPIO_InitTypeDef PORT;
// Configure SPI pins
PORT.GPIO_Speed = GPIO_Speed_50MHz;
PORT.GPIO_Pin = SPI_SCK_PIN | SPI_MISO_PIN | SPI_MOSI_PIN;
PORT.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_Init(SPI_GPIO_PORT,&PORT);
// Configure CS pin as output with Push-Pull
PORT.GPIO_Pin = SPI_CS_PIN;
PORT.GPIO_Mode = GPIO_Mode_Out_PP;
GPIO_Init(SPI_GPIO_PORT,&PORT);
// Configure CE pin as output with Push-Pull
PORT.GPIO_Pin = nRF24_CE_PIN;
PORT.GPIO_Mode = GPIO_Mode_Out_PP;
GPIO_Init(nRF24_CE_PORT,&PORT);
// Configure IRQ pin as input with Pull-Up
PORT.GPIO_Pin = nRF24_IRQ_PIN;
PORT.GPIO_Mode = GPIO_Mode_IPU;
GPIO_Init(nRF24_IRQ_PORT,&PORT);
nRF24_SPI_Init(SPI_BaudRatePrescaler_2); // Which SPI speed do we need?
SPI_Cmd(SPI_PORT,ENABLE);
CSN_H();
CE_L();
}
// GPIO and SPI initialization
void nRF24_init() {
// GND --> PB1
// IRQ --> NC(?!)
// CE <-- PB2
// CSN <-- PC4
// SCK <-- PC5
// MOSI <-- PC6
// MISO --> PC7
// SCK,MOSI,CSN,CE pins set as output fiwth push-pull at 10MHz
// Set PB1, PB2 as output
// CE, GND
GPIOB->DDR |= 0x06;
GPIOB->CR1 |= 0x06;
GPIOB->CR2 |= 0x06;
GPIOB->ODR &= ~(0x2); // GND
// Set PC4..PC6 as output
// MOSI, SCK, CSN
GPIOC->DDR |= 0x70;
GPIOC->CR1 |= 0x70;
GPIOC->CR2 |= 0x70;
// MISO pin set as input with pull-up
// Set PC7 as input
GPIOC->DDR &= ~0x80;
// Configure PC7 as input with pull-up
GPIOC->CR1 |= 0x80;
// Disable external interrupt for PC7
GPIOC->CR2 &= ~0x80;
// IRQ pin set as input with pull-up
// Set PC1 as input
GPIOB->DDR &= ~0x02;
// Configure PC1 as input with pull-up
GPIOB->CR1 |= 0x02;
// Disable external interrupt for PC1
GPIOB->CR2 &= ~0x02;
// Configure SPI
/*CLK_PCKENR1_bit.PCKEN14 = 1; // Enable SPI peripherial (PCKEN14)*/
// Enable SPI (PCKEN11)
CLK->PCKENR1 |= 0x02;
/*
SPI_CR1_bit.BR = 0; // Baud = f/2 (1MHz at 2MHz CPU)
SPI_CR1_bit.CPHA = 0; // CPHA = 1st edge
SPI_CR1_bit.CPOL = 0; // CPOL = low (SCK low when idle)
SPI_CR1_bit.LSBFIRST = 0; // first bit is MSB
SPI_CR1_bit.MSTR = 1; // Master configuration
SPI_CR1_bit.SPE = 0; // Peripherial enabled
*/
SPI->CR1 = 0x04; // SPI: MSB first, Baud=f/2, Master, CPOL=low, CPHA=1st edge
//SPI_CR1 = 0x24; // SPI: MSB first, Baud=f/32, Master, CPOL=low, CPHA=1st edge
/*
SPI_CR2_bit.BDM = 0; // 2-line unidirectional data mode
SPI_CR2_bit.BD0E = 0; // don't care when BDM set to 0
SPI_CR2_bit.RXOnly = 0; // Full duplex
SPI_CR2_bit.SSI = 1; // Master mode
SPI_CR2_bit.SSM = 1; // Software slave management enabled
*/
SPI->CR2 = 0x03; // SPI: 2-line mode, full duplex, SSM on (master mode)
/*SPI_CR1_bit.SPE = 1; // SPI peripherial enabled*/
SPI->CR1 |= 0x40;
CSN_H();
CE_L(); // CE pin low -> power down mode at startup
}
void NRF24L01_Init(void)
{
CE_L(); //使能24L01
CSN_H(); //SPI片选取消
}
