static void
cyg_hal_plf_serial_init(void)
{
hal_virtual_comm_table_t* comm;
int cur = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT);
// Disable interrupts.
HAL_INTERRUPT_MASK(channels[0].isr_vector);
#if (CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS > 1)
HAL_INTERRUPT_MASK(channels[1].isr_vector);
#endif
// Init channels
init_serial_channel(&channels[0]);
#if (CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS > 1)
init_serial_channel(&channels[1]);
#endif
// Setup procs in the vector table
// Set channel 0
CYGACC_CALL_IF_SET_CONSOLE_COMM(0);
comm = CYGACC_CALL_IF_CONSOLE_PROCS();
CYGACC_COMM_IF_CH_DATA_SET(*comm, &channels[0]);
CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_plf_serial_write);
CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_plf_serial_read);
CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_plf_serial_putc);
CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_plf_serial_getc);
CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_plf_serial_control);
CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_serial_isr);
CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_serial_getc_timeout);
#if (CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS > 1)
// Set channel 1
CYGACC_CALL_IF_SET_CONSOLE_COMM(1);
comm = CYGACC_CALL_IF_CONSOLE_PROCS();
CYGACC_COMM_IF_CH_DATA_SET(*comm, &channels[1]);
CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_plf_serial_write);
CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_plf_serial_read);
CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_plf_serial_putc);
CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_plf_serial_getc);
CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_plf_serial_control);
CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_serial_isr);
CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_serial_getc_timeout);
#endif
// Restore original console
CYGACC_CALL_IF_SET_CONSOLE_COMM(cur);
}
static void
cyg_hal_plf_serial_init(void)
{
hal_virtual_comm_table_t* comm;
int cur = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT);
// CYGACC_CALL_VV1(__call_if_set_console_comm_t*, CYGNUM_CALL_IF_SET_CONSOLE_COMM, -1)
//__call_VV1(CYGNUM_CALL_IF_SET_CONSOLE_COMM, __call_if_set_console_comm_t, int, int)
// Disable interrupts.
HAL_INTERRUPT_MASK(smdk_ser_channels[0].isr_vector);
HAL_INTERRUPT_MASK(smdk_ser_channels[1].isr_vector);
//Unmask UART0/1 RX interrupt
HAL_WRITE_UINT32(INTSUBMSK, __READ_UINT32(INTSUBMSK) & ~(BIT_SUB_RXD0|BIT_SUB_RXD1));
// Init channels
cyg_hal_plf_serial_init_channel(&smdk_ser_channels[0]);
cyg_hal_plf_serial_init_channel(&smdk_ser_channels[1]);
// Setup procs in the vector table
// Set channel 0
CYGACC_CALL_IF_SET_CONSOLE_COMM(0);
comm = CYGACC_CALL_IF_CONSOLE_PROCS();
CYGACC_COMM_IF_CH_DATA_SET(*comm, &smdk_ser_channels[0]);
CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_plf_serial_write);
CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_plf_serial_read);
CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_plf_serial_putc);
CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_plf_serial_getc);
CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_plf_serial_control);
CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_serial_isr);
CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_serial_getc_timeout);
// Set channel 1
CYGACC_CALL_IF_SET_CONSOLE_COMM(1);
comm = CYGACC_CALL_IF_CONSOLE_PROCS();
CYGACC_COMM_IF_CH_DATA_SET(*comm, &smdk_ser_channels[1]);
CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_plf_serial_write);
CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_plf_serial_read);
CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_plf_serial_putc);
CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_plf_serial_getc);
CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_plf_serial_control);
CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_serial_isr);
CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_serial_getc_timeout);
// Restore original console
CYGACC_CALL_IF_SET_CONSOLE_COMM(cur);
}
static void cyg_hal_plf_serial_init(void)
{
hal_virtual_comm_table_t* comm;
int cur = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT);
int iChannels = sizeof(s_atSerialChannels) / sizeof(s_atSerialChannels[0]);
int iIdx;
for(iIdx = 0; iIdx < iChannels; iIdx++)
{
// Disable interrupts.
HAL_INTERRUPT_MASK(s_atSerialChannels[iIdx].isr_vector);
// Init channels
cyg_hal_plf_serial_init_channel(&s_atSerialChannels[iIdx]);
// Setup procs in the vector table
CYGACC_CALL_IF_SET_CONSOLE_COMM(iIdx);
comm = CYGACC_CALL_IF_CONSOLE_PROCS();
CYGACC_COMM_IF_CH_DATA_SET(*comm, &s_atSerialChannels[iIdx]);
CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_plf_serial_write);
CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_plf_serial_read);
CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_plf_serial_putc);
CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_plf_serial_getc);
CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_plf_serial_control);
CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_serial_isr);
CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_serial_getc_timeout);
}
// Restore original console
CYGACC_CALL_IF_SET_CONSOLE_COMM(cur);
}
/* Early initialization of comm channels.
*/
void
cyg_hal_plf_serial_init(void)
{
hal_virtual_comm_table_t* comm;
int cur = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT);
int chan = 0;
struct port_info *port;
static int init = 0;
if (init) return;
init++;
// Setup procs in the vector table
for (port = ports, chan = 0; chan < NUM(ports); chan++, port++) {
CYGACC_CALL_IF_SET_CONSOLE_COMM(chan);
comm = CYGACC_CALL_IF_CONSOLE_PROCS();
CYGACC_COMM_IF_CH_DATA_SET(*comm, port);
CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_plf_serial_write);
CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_plf_serial_read);
CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_plf_serial_putc);
CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_plf_serial_getc);
CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_plf_serial_control);
CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_serial_getc_timeout);
if (port->is_smc) {
cyg_hal_plf_smcx_init_channel(port, port->cpm_page);
CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_smcx_isr);
} else {
cyg_hal_plf_sccx_init_channel(port, port->cpm_page);
CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_sccx_isr);
}
}
// Restore original console
CYGACC_CALL_IF_SET_CONSOLE_COMM(cur);
}
void
cyg_hal_am33_serial_init(int first_chan)
{
hal_virtual_comm_table_t* comm;
int cur = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT);
int i;
for (i = 0; i < AM33_NUM_UARTS; i++) {
// Disable interrupts.
HAL_INTERRUPT_MASK(channels[0].isr_vector);
// Init channel
cyg_hal_plf_serial_init_channel((void*)&channels[i]);
cyg_hal_plf_serial_set_baud(channels[i].base, CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD);
// Setup procs in the vector table
CYGACC_CALL_IF_SET_CONSOLE_COMM(i + first_chan);
comm = CYGACC_CALL_IF_CONSOLE_PROCS();
CYGACC_COMM_IF_CH_DATA_SET(*comm, &channels[i]);
CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_plf_serial_write);
CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_plf_serial_read);
CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_plf_serial_putc);
CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_plf_serial_getc);
CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_plf_serial_control);
CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_serial_isr);
CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_serial_getc_timeout);
}
// Restore original console
CYGACC_CALL_IF_SET_CONSOLE_COMM(cur);
}
void
cyg_hal_ixp425_serial_init(void)
{
hal_virtual_comm_table_t* comm;
int i, cur = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT);
for (i = 0; i < IXP425_NUM_UARTS; i++) {
// Disable interrupts.
HAL_INTERRUPT_MASK(plf_ser_channels[i].isr_vector);
// Init channels
cyg_hal_plf_serial_init_channel(&plf_ser_channels[i]);
// Setup procs in the vector table
CYGACC_CALL_IF_SET_CONSOLE_COMM(i);
comm = CYGACC_CALL_IF_CONSOLE_PROCS();
CYGACC_COMM_IF_CH_DATA_SET(*comm, &plf_ser_channels[i]);
CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_plf_serial_write);
CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_plf_serial_read);
CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_plf_serial_putc);
CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_plf_serial_getc);
CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_plf_serial_control);
CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_serial_isr);
CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_serial_getc_timeout);
}
// Restore original console
CYGACC_CALL_IF_SET_CONSOLE_COMM(cur);
}
static void
cyg_hal_plf_serial_init(void)
{
hal_virtual_comm_table_t* comm;
int cur = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT);
// Init channels
cyg_hal_plf_serial_init_channel(&aaed2000_ser_channels[0]);
// Setup procs in the vector table
// Set channel 0
CYGACC_CALL_IF_SET_CONSOLE_COMM(0);
comm = CYGACC_CALL_IF_CONSOLE_PROCS();
CYGACC_COMM_IF_CH_DATA_SET(*comm, &aaed2000_ser_channels[0]);
CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_plf_serial_write);
CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_plf_serial_read);
CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_plf_serial_putc);
CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_plf_serial_getc);
CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_plf_serial_control);
CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_serial_isr);
CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_serial_getc_timeout);
// Restore original console
CYGACC_CALL_IF_SET_CONSOLE_COMM(cur);
}
static void
cyg_hal_plf_serial_init(void)
{
hal_virtual_comm_table_t* comm;
int i, cur = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT);
#define NUM_CHANNELS CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS
for (i = 0; i < NUM_CHANNELS; i++) {
// Disable interrupts.
HAL_INTERRUPT_MASK(channels[i].isr_vector);
// Init channels
cyg_hal_plf_serial_init_channel((void*)&channels[i]);
// Setup procs in the vector table
// Set COMM callbacks for channel
CYGACC_CALL_IF_SET_CONSOLE_COMM(i);
comm = CYGACC_CALL_IF_CONSOLE_PROCS();
CYGACC_COMM_IF_CH_DATA_SET(*comm, &channels[i]);
CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_plf_serial_write);
CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_plf_serial_read);
CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_plf_serial_putc);
CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_plf_serial_getc);
CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_plf_serial_control);
CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_serial_isr);
CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_serial_getc_timeout);
}
// Restore original console
CYGACC_CALL_IF_SET_CONSOLE_COMM(cur);
}
void cyg_hal_plf_screen_init(void)
{
hal_virtual_comm_table_t* comm;
int cur = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT);
// Disable interrupts.
HAL_INTERRUPT_MASK(pc_ser_channels[PCMB_PORT_INDEX].isr_vector);
// Init channels
cyg_hal_plf_screen_init_channel(&pc_ser_channels[PCMB_PORT_INDEX]);
// Setup procs in the vector table
// Set channel 2
CYGACC_CALL_IF_SET_CONSOLE_COMM(PCMB_PORT_INDEX);
comm = CYGACC_CALL_IF_CONSOLE_PROCS();
CYGACC_COMM_IF_CH_DATA_SET(*comm, &pc_ser_channels[PCMB_PORT_INDEX]);
CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_plf_screen_write);
CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_plf_screen_read);
CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_plf_screen_putc);
CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_plf_screen_getc);
CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_plf_screen_control);
CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_screen_isr);
CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_screen_getc_timeout);
// Restore original console
CYGACC_CALL_IF_SET_CONSOLE_COMM(cur);
}
static void
cyg_hal_plf_serial_init(void)
{
hal_virtual_comm_table_t* comm;
int cur = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT);
int i;
// Init channels
#define NUMOF(x) (sizeof(x)/sizeof(x[0]))
for (i = 0; i < NUMOF(ser_channels); i++) {
init_channel(&ser_channels[i]);
CYGACC_CALL_IF_SET_CONSOLE_COMM(i);
comm = CYGACC_CALL_IF_CONSOLE_PROCS();
CYGACC_COMM_IF_CH_DATA_SET(*comm, &ser_channels[i]);
CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_plf_serial_write);
CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_plf_serial_read);
CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_plf_serial_putc);
CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_plf_serial_getc);
CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_plf_serial_control);
CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_serial_isr);
CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_serial_getc_timeout);
}
// Restore original console
CYGACC_CALL_IF_SET_CONSOLE_COMM(cur);
}
static void CYGOPT_HAL_KINETIS_DIAG_FLASH_SECTION_ATTR
cyg_hal_plf_serial_init(void)
{
hal_virtual_comm_table_t* comm;
int cur;
int chan_i;
cur = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT);
// Init channels
for(chan_i=0; chan_i<CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS; chan_i++) {
cyg_hal_plf_serial_init_channel(&plf_ser_channels[chan_i]);
// Setup procs in the vector table
CYGACC_CALL_IF_SET_CONSOLE_COMM(chan_i);
comm = CYGACC_CALL_IF_CONSOLE_PROCS();
CYGACC_COMM_IF_CH_DATA_SET(*comm, &plf_ser_channels[chan_i]);
CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_plf_serial_write);
CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_plf_serial_read);
CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_plf_serial_putc);
CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_plf_serial_getc);
CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_plf_serial_control);
CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_serial_isr);
CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_serial_getc_timeout);
}
// Restore original console
CYGACC_CALL_IF_SET_CONSOLE_COMM(cur);
#if (CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD != CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL_BAUD)
plf_ser_channels[CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL]->baud_rate =
CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL_BAUD;
update_baud_rate( &plf_ser_channels[CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL] );
#endif
}
static void
cyg_hal_plf_serial_init(void)
{
hal_virtual_comm_table_t* comm;
int cur = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT);
channel_data_t* chan;
chan = &aeb_ser_channels[0];
chan->base = (cyg_uint8*)CYG_DEV_UART1_BASE;
chan->isr_vector = CYGNUM_HAL_INTERRUPT_UART1;
chan->msec_timeout = 1000;
// Init channel
cyg_hal_plf_serial_init_channel(chan);
// Setup procs in the vector table
// Set channel 0
CYGACC_CALL_IF_SET_CONSOLE_COMM(0);
comm = CYGACC_CALL_IF_CONSOLE_PROCS();
CYGACC_COMM_IF_CH_DATA_SET(*comm, chan);
CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_plf_serial_write);
CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_plf_serial_read);
CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_plf_serial_putc);
CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_plf_serial_getc);
CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_plf_serial_control);
CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_serial_isr);
CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_serial_getc_timeout);
// Restore original console
CYGACC_CALL_IF_SET_CONSOLE_COMM(cur);
}
// This is the COMMS init function. It gets called both by the stubs
// and diag init code to initialize the COMMS mangler channel table -
// that's all. The callers have to decide whether to actually use this
// channel.
void
cyg_hal_diag_mangler_null_init(void)
{
hal_virtual_comm_table_t* comm;
int cur = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT);
// Initialize mangler procs
CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_MANGLER);
comm = CYGACC_CALL_IF_CONSOLE_PROCS();
CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_diag_mangler_null_write);
CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_diag_mangler_null_read);
CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_diag_mangler_null_putc);
CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_diag_mangler_null_getc);
CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_diag_mangler_null_control);
// Restore the original console channel.
CYGACC_CALL_IF_SET_CONSOLE_COMM(cur);
}
void
cyg_hal_plf_scif_init(int scif_index, int comm_index,
int rcv_vect, cyg_uint8* base, bool irda_mode)
{
channel_data_t* chan = &channels[scif_index];
hal_virtual_comm_table_t* comm;
int cur = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT);
// Initialize channel table
chan->base = base;
chan->isr_vector = rcv_vect;
chan->msec_timeout = 1000;
chan->irda_mode = irda_mode;
#ifdef CYGHWR_HAL_SH_SH2_SCIF_ASYNC_RXTX
chan->async_rxtx_mode = false;
#endif
// Disable interrupts.
HAL_INTERRUPT_MASK(chan->isr_vector);
// Init channel
cyg_hal_plf_scif_init_channel(chan);
// Setup procs in the vector table
// Initialize channel procs
CYGACC_CALL_IF_SET_CONSOLE_COMM(comm_index);
comm = CYGACC_CALL_IF_CONSOLE_PROCS();
CYGACC_COMM_IF_CH_DATA_SET(*comm, chan);
CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_plf_scif_write);
CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_plf_scif_read);
CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_plf_scif_putc);
CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_plf_scif_getc);
CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_plf_scif_control);
CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_scif_isr);
CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_scif_getc_timeout);
// Restore original console
CYGACC_CALL_IF_SET_CONSOLE_COMM(cur);
}
static void
hal_a2fxxx_serial_init(void)
{
hal_virtual_comm_table_t* comm;
int cur;
int i;
cur = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT);
for( i = 0; i < CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS ; i++ )
{
hal_a2fxxx_serial_init_channel(&a2fxxx_ser_channels[i]);
CYGACC_CALL_IF_SET_CONSOLE_COMM(i);
comm = CYGACC_CALL_IF_CONSOLE_PROCS();
CYGACC_COMM_IF_CH_DATA_SET(*comm, &a2fxxx_ser_channels[i]);
CYGACC_COMM_IF_WRITE_SET(*comm, hal_a2fxxx_serial_write);
CYGACC_COMM_IF_READ_SET(*comm, hal_a2fxxx_serial_read);
CYGACC_COMM_IF_PUTC_SET(*comm, hal_a2fxxx_serial_putc);
CYGACC_COMM_IF_GETC_SET(*comm, hal_a2fxxx_serial_getc);
CYGACC_COMM_IF_CONTROL_SET(*comm, hal_a2fxxx_serial_control);
CYGACC_COMM_IF_DBG_ISR_SET(*comm, hal_a2fxxx_serial_isr);
CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, hal_a2fxxx_serial_getc_timeout);
}
// Restore original console
CYGACC_CALL_IF_SET_CONSOLE_COMM(cur);
// set debug channel baud rate if different
#if (CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD != CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL_BAUD)
a2fxxx_ser_channels[CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL]->baud_rate =
CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL_BAUD;
update_baud_rate( &a2fxxx_ser_channels[CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL] );
#endif
}
static void
net_io_init(void)
{
static int init = 0;
if (!init) {
hal_virtual_comm_table_t* comm;
int cur = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT);
// Setup procs in the vector table
CYGACC_CALL_IF_SET_CONSOLE_COMM(TCP_CHANNEL);
comm = CYGACC_CALL_IF_CONSOLE_PROCS();
//CYGACC_COMM_IF_CH_DATA_SET(*comm, chan);
CYGACC_COMM_IF_WRITE_SET(*comm, net_io_write);
CYGACC_COMM_IF_READ_SET(*comm, net_io_read);
CYGACC_COMM_IF_PUTC_SET(*comm, net_io_putc);
CYGACC_COMM_IF_GETC_SET(*comm, net_io_getc);
CYGACC_COMM_IF_CONTROL_SET(*comm, net_io_control);
CYGACC_COMM_IF_DBG_ISR_SET(*comm, net_io_isr);
CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, net_io_getc_timeout);
// Disable interrupts via this interface to set static
// state into correct state.
net_io_control( comm, __COMMCTL_IRQ_DISABLE );
// Restore original console
CYGACC_CALL_IF_SET_CONSOLE_COMM(cur);
init = 1;
gdb_active = false;
}
__tcp_listen(&tcp_sock, gdb_port);
state = tcp_sock.state;
#ifdef DEBUG_TCP
diag_printf("show tcp = %p\n", (void *)&show_tcp);
#endif
}
/*
* Early initialization of comm channels. Must not rely
* on interrupts, yet. Interrupt operation can be enabled
* in _bsp_board_init().
*/
void
cyg_hal_plf_serial_init(void)
{
hal_virtual_comm_table_t* comm;
int cur = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT);
static int init = 0; // It's wrong to do this more than once
int chan = 0;
if (init) return;
init++;
// Setup procs in the vector table
#if CYGNUM_HAL_QUICC_SMC1 > 0
// Set up SMC1
cyg_hal_smcx_init_channel(&ports[chan], QUICC_CPM_SMC1);
CYGACC_CALL_IF_SET_CONSOLE_COMM(chan);// Should be configurable!
comm = CYGACC_CALL_IF_CONSOLE_PROCS();
CYGACC_COMM_IF_CH_DATA_SET(*comm, &ports[chan]);
CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_sxx_write);
CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_sxx_read);
CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_sxx_putc);
CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_sxx_getc);
CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_sxx_control);
CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_smcx_isr);
CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_sxx_getc_timeout);
chan++;
#endif
#if CYGNUM_HAL_QUICC_SMC2 > 0
// Set up SMC2
cyg_hal_smcx_init_channel(&ports[chan], QUICC_CPM_SMC2);
CYGACC_CALL_IF_SET_CONSOLE_COMM(chan);// Should be configurable!
comm = CYGACC_CALL_IF_CONSOLE_PROCS();
CYGACC_COMM_IF_CH_DATA_SET(*comm, &ports[chan]);
CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_sxx_write);
CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_sxx_read);
CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_sxx_putc);
CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_sxx_getc);
CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_sxx_control);
CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_smcx_isr);
CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_sxx_getc_timeout);
chan++;
#endif
#if CYGNUM_HAL_QUICC_SCC1 > 0
// Set up SCC1
cyg_hal_sccx_init_channel(&ports[chan], QUICC_CPM_SCC1);
CYGACC_CALL_IF_SET_CONSOLE_COMM(chan);// Should be configurable!
comm = CYGACC_CALL_IF_CONSOLE_PROCS();
CYGACC_COMM_IF_CH_DATA_SET(*comm, &ports[chan]);
CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_sxx_write);
CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_sxx_read);
CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_sxx_putc);
CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_sxx_getc);
CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_sxx_control);
CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_sccx_isr);
CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_sxx_getc_timeout);
chan++;
#endif
#if CYGNUM_HAL_QUICC_SCC2 > 0
// Set up SCC2
cyg_hal_sccx_init_channel(&ports[chan], QUICC_CPM_SCC2);
CYGACC_CALL_IF_SET_CONSOLE_COMM(chan);// Should be configurable!
comm = CYGACC_CALL_IF_CONSOLE_PROCS();
CYGACC_COMM_IF_CH_DATA_SET(*comm, &ports[chan]);
CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_sxx_write);
CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_sxx_read);
CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_sxx_putc);
CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_sxx_getc);
CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_sxx_control);
CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_sccx_isr);
CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_sxx_getc_timeout);
chan++;
#endif
#if CYGNUM_HAL_QUICC_SCC3 > 0
// Set up SCC3
cyg_hal_sccx_init_channel(&ports[chan], QUICC_CPM_SCC3);
CYGACC_CALL_IF_SET_CONSOLE_COMM(chan);// Should be configurable!
comm = CYGACC_CALL_IF_CONSOLE_PROCS();
CYGACC_COMM_IF_CH_DATA_SET(*comm, &ports[chan]);
CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_sxx_write);
CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_sxx_read);
CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_sxx_putc);
CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_sxx_getc);
CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_sxx_control);
CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_sccx_isr);
CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_sxx_getc_timeout);
chan++;
#endif
// Restore original console
CYGACC_CALL_IF_SET_CONSOLE_COMM(cur);
}
static void
cyg_hal_plf_serial_init(void)
{
hal_virtual_comm_table_t* comm;
int cur;
cur = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT);
// Init channels
cyg_hal_plf_serial_init_channel(&mac7100_ser_channels[0]);
#if CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS > 1
cyg_hal_plf_serial_init_channel(&mac7100_ser_channels[1]);
#endif
#if CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS > 2
cyg_hal_plf_serial_init_channel(&mac7100_ser_channels[2]);
#endif
#if CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS > 3
cyg_hal_plf_serial_init_channel(&mac7100_ser_channels[3]);
#endif
// Setup procs in the vector table
// Set channel 0
CYGACC_CALL_IF_SET_CONSOLE_COMM(0);
comm = CYGACC_CALL_IF_CONSOLE_PROCS();
CYGACC_COMM_IF_CH_DATA_SET(*comm, &mac7100_ser_channels[0]);
CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_plf_serial_write);
CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_plf_serial_read);
CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_plf_serial_putc);
CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_plf_serial_getc);
CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_plf_serial_control);
CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_serial_isr);
CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_serial_getc_timeout);
#if CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS > 1
// Set channel 1
CYGACC_CALL_IF_SET_CONSOLE_COMM(1);
comm = CYGACC_CALL_IF_CONSOLE_PROCS();
CYGACC_COMM_IF_CH_DATA_SET(*comm, &mac7100_ser_channels[1]);
CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_plf_serial_write);
CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_plf_serial_read);
CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_plf_serial_putc);
CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_plf_serial_getc);
CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_plf_serial_control);
CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_serial_isr);
CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_serial_getc_timeout);
#endif
#if CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS > 2
CYGACC_CALL_IF_SET_CONSOLE_COMM(2);
comm = CYGACC_CALL_IF_CONSOLE_PROCS();
CYGACC_COMM_IF_CH_DATA_SET(*comm, &mac7100_ser_channels[2]);
CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_plf_serial_write);
CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_plf_serial_read);
CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_plf_serial_putc);
CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_plf_serial_getc);
CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_plf_serial_control);
CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_serial_isr);
CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_serial_getc_timeout);
#endif
#if CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS > 3
CYGACC_CALL_IF_SET_CONSOLE_COMM(3);
comm = CYGACC_CALL_IF_CONSOLE_PROCS();
CYGACC_COMM_IF_CH_DATA_SET(*comm, &mac7100_ser_channels[3]);
CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_plf_serial_write);
CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_plf_serial_read);
CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_plf_serial_putc);
CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_plf_serial_getc);
CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_plf_serial_control);
CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_serial_isr);
CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_serial_getc_timeout);
#endif
// Restore original console
CYGACC_CALL_IF_SET_CONSOLE_COMM(cur);
}