/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Cec_ManHandleSpecialCases( Gia_Man_t * p, Cec_ParCec_t * pPars )
{
Gia_Obj_t * pObj1, * pObj2;
Gia_Obj_t * pDri1, * pDri2;
int i;
abctime clk = Abc_Clock();
Gia_ManSetPhase( p );
Gia_ManForEachPo( p, pObj1, i )
{
pObj2 = Gia_ManPo( p, ++i );
// check if they different on all-0 pattern
// (for example, when they have the same driver but complemented)
if ( Gia_ObjPhase(pObj1) != Gia_ObjPhase(pObj2) )
{
Abc_Print( 1, "Networks are NOT EQUIVALENT. Output %d trivially differs (different phase). ", i/2 );
Abc_PrintTime( 1, "Time", Abc_Clock() - clk );
pPars->iOutFail = i/2;
Cec_ManTransformPattern( p, i/2, NULL );
return 0;
}
// get the drivers
pDri1 = Gia_ObjFanin0(pObj1);
pDri2 = Gia_ObjFanin0(pObj2);
// drivers are different PIs
if ( Gia_ObjIsPi(p, pDri1) && Gia_ObjIsPi(p, pDri2) && pDri1 != pDri2 )
{
Abc_Print( 1, "Networks are NOT EQUIVALENT. Output %d trivially differs (different PIs). ", i/2 );
Abc_PrintTime( 1, "Time", Abc_Clock() - clk );
pPars->iOutFail = i/2;
Cec_ManTransformPattern( p, i/2, NULL );
// if their compl attributes are the same - one should be complemented
assert( Gia_ObjFaninC0(pObj1) == Gia_ObjFaninC0(pObj2) );
Abc_InfoSetBit( p->pCexComb->pData, Gia_ObjCioId(pDri1) );
return 0;
}
// one of the drivers is a PI; another is a constant 0
if ( (Gia_ObjIsPi(p, pDri1) && Gia_ObjIsConst0(pDri2)) ||
(Gia_ObjIsPi(p, pDri2) && Gia_ObjIsConst0(pDri1)) )
{
Abc_Print( 1, "Networks are NOT EQUIVALENT. Output %d trivially differs (PI vs. constant). ", i/2 );
Abc_PrintTime( 1, "Time", Abc_Clock() - clk );
pPars->iOutFail = i/2;
Cec_ManTransformPattern( p, i/2, NULL );
// the compl attributes are the same - the PI should be complemented
assert( Gia_ObjFaninC0(pObj1) == Gia_ObjFaninC0(pObj2) );
if ( Gia_ObjIsPi(p, pDri1) )
Abc_InfoSetBit( p->pCexComb->pData, Gia_ObjCioId(pDri1) );
else
Abc_InfoSetBit( p->pCexComb->pData, Gia_ObjCioId(pDri2) );
return 0;
}
}
/**Function*************************************************************
Synopsis [Interface to the old CEC engine]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Cec_ManVerifyOld( Gia_Man_t * pMiter, int fVerbose, int * piOutFail, abctime clkTotal, int fSilent )
{
// extern int Fra_FraigCec( Aig_Man_t ** ppAig, int nConfLimit, int fVerbose );
extern int Ssw_SecCexResimulate( Aig_Man_t * p, int * pModel, int * pnOutputs );
Gia_Man_t * pTemp = Gia_ManTransformMiter( pMiter );
Aig_Man_t * pMiterCec = Gia_ManToAig( pTemp, 0 );
int RetValue, iOut, nOuts;
if ( piOutFail )
*piOutFail = -1;
Gia_ManStop( pTemp );
// run CEC on this miter
RetValue = Fra_FraigCec( &pMiterCec, 10000000, fVerbose );
// report the miter
if ( RetValue == 1 )
{
if ( !fSilent )
{
Abc_Print( 1, "Networks are equivalent. " );
Abc_PrintTime( 1, "Time", Abc_Clock() - clkTotal );
}
}
else if ( RetValue == 0 )
{
if ( !fSilent )
{
Abc_Print( 1, "Networks are NOT EQUIVALENT. " );
Abc_PrintTime( 1, "Time", Abc_Clock() - clkTotal );
}
if ( pMiterCec->pData == NULL )
Abc_Print( 1, "Counter-example is not available.\n" );
else
{
iOut = Ssw_SecCexResimulate( pMiterCec, (int *)pMiterCec->pData, &nOuts );
if ( iOut == -1 )
Abc_Print( 1, "Counter-example verification has failed.\n" );
else
{
if ( !fSilent )
{
Abc_Print( 1, "Primary output %d has failed", iOut );
if ( nOuts-1 >= 0 )
Abc_Print( 1, ", along with other %d incorrect outputs", nOuts-1 );
Abc_Print( 1, ".\n" );
}
if ( piOutFail )
*piOutFail = iOut;
}
Cec_ManTransformPattern( pMiter, iOut, (int *)pMiterCec->pData );
}
}
else if ( !fSilent )
{
Abc_Print( 1, "Networks are UNDECIDED. " );
Abc_PrintTime( 1, "Time", Abc_Clock() - clkTotal );
}
fflush( stdout );
Aig_ManStop( pMiterCec );
return RetValue;
}
