static void i2c_stm32_irq_config_func_4(struct device *dev) { IRQ_CONNECT(DT_I2C_4_EVENT_IRQ, DT_I2C_4_EVENT_IRQ_PRI, stm32_i2c_event_isr, DEVICE_GET(i2c_stm32_4), 0); irq_enable(DT_I2C_4_EVENT_IRQ); IRQ_CONNECT(DT_I2C_4_ERROR_IRQ, DT_I2C_4_ERROR_IRQ_PRI, stm32_i2c_error_isr, DEVICE_GET(i2c_stm32_4), 0); irq_enable(DT_I2C_4_ERROR_IRQ); }
static void dma_qmsi_config(struct device *dev) { ARG_UNUSED(dev); IRQ_CONNECT(IRQ_GET_NUMBER(QM_IRQ_DMA_0_INT_0), CONFIG_DMA_0_IRQ_PRI, qm_dma_0_isr_0, DEVICE_GET(dma_qmsi), 0); irq_enable(IRQ_GET_NUMBER(QM_IRQ_DMA_0_INT_0)); QM_IR_UNMASK_INTERRUPTS(QM_INTERRUPT_ROUTER->dma_0_int_0_mask); IRQ_CONNECT(IRQ_GET_NUMBER(QM_IRQ_DMA_0_INT_1), CONFIG_DMA_0_IRQ_PRI, qm_dma_0_isr_1, DEVICE_GET(dma_qmsi), 0); irq_enable(IRQ_GET_NUMBER(QM_IRQ_DMA_0_INT_1)); QM_IR_UNMASK_INTERRUPTS(QM_INTERRUPT_ROUTER->dma_0_int_1_mask); #if (CONFIG_SOC_QUARK_SE_C1000) IRQ_CONNECT(IRQ_GET_NUMBER(QM_IRQ_DMA_0_INT_2), CONFIG_DMA_0_IRQ_PRI, qm_dma_0_isr_2, DEVICE_GET(dma_qmsi), 0); irq_enable(IRQ_GET_NUMBER(QM_IRQ_DMA_0_INT_2)); QM_IR_UNMASK_INTERRUPTS(QM_INTERRUPT_ROUTER->dma_0_int_2_mask); IRQ_CONNECT(IRQ_GET_NUMBER(QM_IRQ_DMA_0_INT_3), CONFIG_DMA_0_IRQ_PRI, qm_dma_0_isr_3, DEVICE_GET(dma_qmsi), 0); irq_enable(IRQ_GET_NUMBER(QM_IRQ_DMA_0_INT_3)); QM_IR_UNMASK_INTERRUPTS(QM_INTERRUPT_ROUTER->dma_0_int_3_mask); IRQ_CONNECT(IRQ_GET_NUMBER(QM_IRQ_DMA_0_INT_4), CONFIG_DMA_0_IRQ_PRI, qm_dma_0_isr_4, DEVICE_GET(dma_qmsi), 0); irq_enable(IRQ_GET_NUMBER(QM_IRQ_DMA_0_INT_4)); QM_IR_UNMASK_INTERRUPTS(QM_INTERRUPT_ROUTER->dma_0_int_4_mask); IRQ_CONNECT(IRQ_GET_NUMBER(QM_IRQ_DMA_0_INT_5), CONFIG_DMA_0_IRQ_PRI, qm_dma_0_isr_5, DEVICE_GET(dma_qmsi), 0); irq_enable(IRQ_GET_NUMBER(QM_IRQ_DMA_0_INT_5)); QM_IR_UNMASK_INTERRUPTS(QM_INTERRUPT_ROUTER->dma_0_int_5_mask); IRQ_CONNECT(IRQ_GET_NUMBER(QM_IRQ_DMA_0_INT_6), CONFIG_DMA_0_IRQ_PRI, qm_dma_0_isr_6, DEVICE_GET(dma_qmsi), 0); irq_enable(IRQ_GET_NUMBER(QM_IRQ_DMA_0_INT_6)); QM_IR_UNMASK_INTERRUPTS(QM_INTERRUPT_ROUTER->dma_0_int_6_mask); IRQ_CONNECT(IRQ_GET_NUMBER(QM_IRQ_DMA_0_INT_7), CONFIG_DMA_0_IRQ_PRI, qm_dma_0_isr_7, DEVICE_GET(dma_qmsi), 0); irq_enable(IRQ_GET_NUMBER(QM_IRQ_DMA_0_INT_7)); QM_IR_UNMASK_INTERRUPTS(QM_INTERRUPT_ROUTER->dma_0_int_7_mask); #endif /* CONFIG_SOC_QUARK_SE_C1000 */ IRQ_CONNECT(IRQ_GET_NUMBER(QM_IRQ_DMA_0_ERROR_INT), CONFIG_DMA_0_IRQ_PRI, qm_dma_0_error_isr, DEVICE_GET(dma_qmsi), 0); irq_enable(IRQ_GET_NUMBER(QM_IRQ_DMA_0_ERROR_INT)); #if (QM_LAKEMONT) QM_INTERRUPT_ROUTER->dma_0_error_int_mask &= ~QM_IR_DMA_ERROR_HOST_MASK; #elif (QM_SENSOR) QM_INTERRUPT_ROUTER->dma_0_error_int_mask &= ~QM_IR_DMA_ERROR_SS_MASK; #endif }
static void usart_gecko_config_func_3(struct device *dev) { IRQ_CONNECT(DT_SILABS_GECKO_USART_3_IRQ_RX, DT_SILABS_GECKO_USART_3_IRQ_RX_PRIORITY, uart_gecko_isr, DEVICE_GET(usart_3), 0); IRQ_CONNECT(DT_SILABS_GECKO_USART_3_IRQ_TX, DT_SILABS_GECKO_USART_3_IRQ_TX_PRIORITY, uart_gecko_isr, DEVICE_GET(usart_3), 0); irq_enable(DT_SILABS_GECKO_USART_3_IRQ_RX); irq_enable(DT_SILABS_GECKO_USART_3_IRQ_TX); }
static void uart_mcux_config_func_5(struct device *dev) { IRQ_CONNECT(CONFIG_UART_MCUX_5_IRQ_STATUS, CONFIG_UART_MCUX_5_IRQ_STATUS_PRI, uart_mcux_isr, DEVICE_GET(uart_5), 0); irq_enable(CONFIG_UART_MCUX_5_IRQ_STATUS); IRQ_CONNECT(CONFIG_UART_MCUX_5_IRQ_ERROR, CONFIG_UART_MCUX_5_IRQ_ERROR_PRI, uart_mcux_isr, DEVICE_GET(uart_5), 0); irq_enable(CONFIG_UART_MCUX_5_IRQ_ERROR); }
static int mcux_igpio_4_init(struct device *dev) { IRQ_CONNECT(CONFIG_MCUX_IGPIO_4_IRQ_0, CONFIG_MCUX_IGPIO_4_IRQ_0_PRI, mcux_igpio_port_isr, DEVICE_GET(mcux_igpio_4), 0); irq_enable(CONFIG_MCUX_IGPIO_4_IRQ_0); IRQ_CONNECT(CONFIG_MCUX_IGPIO_4_IRQ_1, CONFIG_MCUX_IGPIO_4_IRQ_1_PRI, mcux_igpio_port_isr, DEVICE_GET(mcux_igpio_4), 0); irq_enable(CONFIG_MCUX_IGPIO_4_IRQ_1); return 0; }
static int mcux_igpio_5_init(struct device *dev) { IRQ_CONNECT(DT_MCUX_IGPIO_5_IRQ_0, DT_MCUX_IGPIO_5_IRQ_0_PRI, mcux_igpio_port_isr, DEVICE_GET(mcux_igpio_5), 0); irq_enable(DT_MCUX_IGPIO_5_IRQ_0); IRQ_CONNECT(DT_MCUX_IGPIO_5_IRQ_1, DT_MCUX_IGPIO_5_IRQ_1_PRI, mcux_igpio_port_isr, DEVICE_GET(mcux_igpio_5), 0); irq_enable(DT_MCUX_IGPIO_5_IRQ_1); return 0; }
static void uart_mcux_config_func_5(struct device *dev) { IRQ_CONNECT(IRQ_UART5_STATUS, CONFIG_UART_MCUX_5_IRQ_PRI, uart_mcux_isr, DEVICE_GET(uart_5), 0); irq_enable(IRQ_UART5_STATUS); #ifdef IRQ_UART5_ERROR IRQ_CONNECT(IRQ_UART5_ERROR, CONFIG_UART_MCUX_5_IRQ_PRI, uart_mcux_isr, DEVICE_GET(uart_5), 0); irq_enable(IRQ_UART5_ERROR); #endif }
static void qdec_nrfx_event_handler(nrfx_qdec_event_t event) { sensor_trigger_handler_t handler; unsigned int key; switch (event.type) { case NRF_QDEC_EVENT_REPORTRDY: accumulate(&qdec_nrfx_data, event.data.report.acc); key = irq_lock(); handler = qdec_nrfx_data.data_ready_handler; irq_unlock(key); if (handler) { struct sensor_trigger trig = { .type = SENSOR_TRIG_DATA_READY, .chan = SENSOR_CHAN_ROTATION, }; handler(DEVICE_GET(qdec_nrfx), &trig); } break; default: LOG_ERR("unhandled event (0x%x)", event.type); break; } }
static void uart_cmsdk_apb_irq_config_func_4(struct device *dev) { IRQ_CONNECT(DT_ARM_CMSDK_UART_4_IRQ_TX, DT_ARM_CMSDK_UART_4_IRQ_TX_PRIORITY, uart_cmsdk_apb_isr, DEVICE_GET(uart_cmsdk_apb_4), 0); irq_enable(DT_ARM_CMSDK_UART_4_IRQ_TX); IRQ_CONNECT(DT_ARM_CMSDK_UART_4_IRQ_RX, DT_ARM_CMSDK_UART_4_IRQ_RX_PRIORITY, uart_cmsdk_apb_isr, DEVICE_GET(uart_cmsdk_apb_4), 0); irq_enable(DT_ARM_CMSDK_UART_4_IRQ_RX); }
static void i2c_stm32_irq_config_func_2(struct device *dev) { #ifdef CONFIG_I2C_STM32_COMBINED_INTERRUPT IRQ_CONNECT(DT_I2C_2_COMBINED_IRQ, DT_I2C_2_COMBINED_IRQ_PRI, stm32_i2c_combined_isr, DEVICE_GET(i2c_stm32_2), 0); irq_enable(DT_I2C_2_COMBINED_IRQ); #else IRQ_CONNECT(DT_I2C_2_EVENT_IRQ, DT_I2C_2_EVENT_IRQ_PRI, stm32_i2c_event_isr, DEVICE_GET(i2c_stm32_2), 0); irq_enable(DT_I2C_2_EVENT_IRQ); IRQ_CONNECT(DT_I2C_2_ERROR_IRQ, DT_I2C_2_ERROR_IRQ_PRI, stm32_i2c_error_isr, DEVICE_GET(i2c_stm32_2), 0); irq_enable(DT_I2C_2_ERROR_IRQ); #endif }
static void mcux_wdog_config_func_0(struct device *dev) { IRQ_CONNECT(CONFIG_WDT_0_IRQ, CONFIG_WDT_0_IRQ_PRI, mcux_wdog_isr, DEVICE_GET(mcux_wdog_0), 0); irq_enable(CONFIG_WDT_0_IRQ); }
static void i2c_mcux_config_func_1(struct device *dev) { IRQ_CONNECT(CONFIG_I2C_MCUX_1_IRQ, CONFIG_I2C_MCUX_1_IRQ_PRI, i2c_mcux_isr, DEVICE_GET(i2c_mcux_1), 0); irq_enable(CONFIG_I2C_MCUX_1_IRQ); }
static int imx_gpio_7_init(struct device *dev) { IRQ_CONNECT(DT_GPIO_IMX_PORT_7_IRQ_0, DT_GPIO_IMX_PORT_7_IRQ_0_PRI, imx_gpio_port_isr, DEVICE_GET(imx_gpio_7), 0); irq_enable(DT_GPIO_IMX_PORT_7_IRQ_0); IRQ_CONNECT(DT_GPIO_IMX_PORT_7_IRQ_1, DT_GPIO_IMX_PORT_7_IRQ_1_PRI, imx_gpio_port_isr, DEVICE_GET(imx_gpio_7), 0); irq_enable(DT_GPIO_IMX_PORT_7_IRQ_1); return 0; }
static void mcux_adc16_config_func_1(struct device *dev) { IRQ_CONNECT(CONFIG_ADC_1_IRQ, CONFIG_ADC_1_IRQ_PRI, mcux_adc16_isr, DEVICE_GET(mcux_adc16_1), 0); irq_enable(CONFIG_ADC_1_IRQ); }
static void timer_cmsdk_apb_config_1(struct device *dev) { IRQ_CONNECT(CMSDK_APB_TIMER_1_IRQ, CONFIG_TIMER_TMR_CMSDK_APB_1_IRQ_PRI, timer_tmr_cmsdk_apb_isr, DEVICE_GET(timer_tmr_cmsdk_apb_0), 0); irq_enable(CMSDK_APB_TIMER_1_IRQ); }
static void uart_cmsdk_apb_irq_config_func_4(struct device *dev) { IRQ_CONNECT(CMSDK_APB_UART_4_IRQ_TX, CONFIG_UART_CMSDK_APB_PORT4_IRQ_PRI, uart_cmsdk_apb_isr, DEVICE_GET(uart_cmsdk_apb_4), 0); irq_enable(CMSDK_APB_UART_4_IRQ_TX); IRQ_CONNECT(CMSDK_APB_UART_4_IRQ_RX, CONFIG_UART_CMSDK_APB_PORT4_IRQ_PRI, uart_cmsdk_apb_isr, DEVICE_GET(uart_cmsdk_apb_4), 0); irq_enable(CMSDK_APB_UART_4_IRQ_RX); }
static void usart2_sam_irq_config_func(struct device *port) { IRQ_CONNECT(CONFIG_USART_SAM_PORT_2_IRQ, CONFIG_USART_SAM_PORT_2_IRQ_PRIO, usart_sam_isr, DEVICE_GET(usart2_sam), 0); irq_enable(CONFIG_USART_SAM_PORT_2_IRQ); }
static void event_handler(const nrfx_adc_evt_t *p_event) { struct device *dev = DEVICE_GET(adc_0); if (p_event->type == NRFX_ADC_EVT_DONE) { adc_context_on_sampling_done(&m_data.ctx, dev); } }
int qrk_cxxxx_rtc_init(struct device *rtc_dev) { IRQ_CONNECT(SOC_RTC_INTERRUPT, ISR_DEFAULT_PRIO, rtc_isr, DEVICE_GET(rtc), 0); irq_enable(SOC_RTC_INTERRUPT); rtc_dev->driver_api = &qrk_cxxxx_rtc_funcs; return 0; }
static void uart_nrf5_irq_config(struct device *port) { IRQ_CONNECT(NRF52_IRQ_UARTE0_UART0_IRQn, CONFIG_UART_NRF5_IRQ_PRI, uart_nrf5_isr, DEVICE_GET(uart_nrf5_0), 0); irq_enable(NRF52_IRQ_UARTE0_UART0_IRQn); }
void stm32_exti_unset_callback(int line) { struct device *dev = DEVICE_GET(exti_stm32); struct stm32_exti_data *data = dev->driver_data; data->cb[line].cb = NULL; data->cb[line].data = NULL; }
static void dtimer_cmsdk_apb_config_0(struct device *dev) { IRQ_CONNECT(DT_ARM_CMSDK_DTIMER_0_IRQ_0, DT_ARM_CMSDK_DTIMER_0_IRQ_0_PRIORITY, dtmr_cmsdk_apb_isr, DEVICE_GET(dtmr_cmsdk_apb_0), 0); irq_enable(DT_ARM_CMSDK_DTIMER_0_IRQ_0); }
static void rtc_callback(void *user_data) { const struct counter_alarm_cfg *cfg = user_data; if (user_cb) { (*user_cb)(DEVICE_GET(rtc), 0, cfg->ticks, user_data); } }
static void mcux_elcdif_config_func_1(struct device *dev) { IRQ_CONNECT(DT_FSL_IMX6SX_LCDIF_0_IRQ_0, DT_FSL_IMX6SX_LCDIF_0_IRQ_0_PRIORITY, mcux_elcdif_isr, DEVICE_GET(mcux_elcdif_1), 0); irq_enable(DT_FSL_IMX6SX_LCDIF_0_IRQ_0); }
static void mcux_lpuart_config_func_1(struct device *dev) { IRQ_CONNECT(CONFIG_UART_MCUX_LPUART_1_IRQ, CONFIG_UART_MCUX_LPUART_1_IRQ_PRI, mcux_lpuart_isr, DEVICE_GET(uart_1), 0); irq_enable(CONFIG_UART_MCUX_LPUART_1_IRQ); }
static void uart4_sam_irq_config_func(struct device *port) { IRQ_CONNECT(DT_UART_SAM_PORT_4_IRQ, DT_UART_SAM_PORT_4_IRQ_PRIO, uart_sam_isr, DEVICE_GET(uart4_sam), 0); irq_enable(DT_UART_SAM_PORT_4_IRQ); }
static void i2c_imx_config_func_4(struct device *dev) { ARG_UNUSED(dev); IRQ_CONNECT(DT_FSL_IMX7D_I2C_I2C_4_IRQ, DT_FSL_IMX7D_I2C_I2C_4_IRQ_PRIORITY, i2c_imx_isr, DEVICE_GET(i2c_imx_4), 0); irq_enable(DT_FSL_IMX7D_I2C_I2C_4_IRQ); }
static void mcux_lpsci_config_func_0(struct device *dev) { IRQ_CONNECT(NXP_KINETIS_LPSCI_4006A000_IRQ_0, NXP_KINETIS_LPSCI_4006A000_IRQ_0_PRIORITY, mcux_lpsci_isr, DEVICE_GET(uart_0), 0); irq_enable(NXP_KINETIS_LPSCI_4006A000_IRQ_0); }
static void uart_cmsdk_apb_irq_config_func_3(struct device *dev) { IRQ_CONNECT(CMSDK_APB_UART_3_IRQ, CONFIG_UART_CMSDK_APB_PORT3_IRQ_PRI, uart_cmsdk_apb_isr, DEVICE_GET(uart_cmsdk_apb_3), 0); irq_enable(CMSDK_APB_UART_3_IRQ); }
static void i2c_mcux_config_func_0(struct device *dev) { ARG_UNUSED(dev); IRQ_CONNECT(CONFIG_I2C_MCUX_0_IRQ, CONFIG_I2C_MCUX_0_IRQ_PRI, i2c_mcux_isr, DEVICE_GET(i2c_mcux_0), 0); irq_enable(CONFIG_I2C_MCUX_0_IRQ); }