void * kse_init(unsigned tag, void *data) { struct local *l; struct desc *txd, *rxd; unsigned i, val, fdx; uint8_t *en; l = ALLOC(struct local, sizeof(struct desc)); /* desc alignment */ memset(l, 0, sizeof(struct local)); l->csr = DEVTOV(pcicfgread(tag, 0x10)); en = data; i = CSR_READ_2(l, MARL); en[0] = i; en[1] = i >> 8; i = CSR_READ_2(l, MARM); en[2] = i; en[3] = i >> 8; i = CSR_READ_2(l, MARH); en[4] = i; en[5] = i >> 8; printf("MAC address %02x:%02x:%02x:%02x:%02x:%02x\n", en[0], en[1], en[2], en[3], en[4], en[5]); CSR_WRITE_2(l, CIDR, 1); mii_dealan(l, 5); val = pcicfgread(tag, PCI_ID_REG); if (PCI_PRODUCT(val) == 0x8841) { val = CSR_READ_4(l, P1SR); fdx = !!(val & (1U << 9)); printf("%s", (val & (1U << 8)) ? "100Mbps" : "10Mbps"); if (fdx) printf("-FDX"); printf("\n"); } txd = &l->txd; rxd = &l->rxd[0]; rxd[0].xd0 = htole32(R0_OWN); rxd[0].xd1 = htole32(FRAMESIZE); rxd[0].xd2 = htole32(VTOPHYS(l->rxstore[0])); rxd[0].xd3 = htole32(VTOPHYS(&rxd[1])); rxd[1].xd0 = htole32(R0_OWN); rxd[1].xd1 = htole32(R1_RER | FRAMESIZE); rxd[1].xd2 = htole32(VTOPHYS(l->rxstore[1])); rxd[1].xd3 = htole32(VTOPHYS(&rxd[0])); l->rx = 0; CSR_WRITE_4(l, TDLB, VTOPHYS(txd)); CSR_WRITE_4(l, RDLB, VTOPHYS(rxd)); CSR_WRITE_4(l, MDTXC, 07); /* stretch short, add CRC, Tx enable */ CSR_WRITE_4(l, MDRXC, 01); /* Rx enable */ CSR_WRITE_4(l, MDRSC, 01); /* start receiving */ return l; }
void * sme_init(unsigned tag, void *data) { struct local *l; struct desc *txd, *rxd; unsigned mac32, mac16, val, fdx; uint8_t *en; l = ALLOC(struct local, 32); /* desc alignment */ memset(l, 0, sizeof(struct local)); l->csr = DEVTOV(pcicfgread(tag, 0x1c)); /* BAR3 mem space, LE */ l->phy = 1; /* 9420 internal PHY */ en = data; mac32 = CSR_READ(l, ADDRL); mac16 = CSR_READ(l, ADDRH); en[0] = mac32; en[1] = mac32 >> 8; en[2] = mac32 >> 16; en[3] = mac32 >> 24; en[4] = mac16; en[5] = mac16 >> 8; printf("MAC address %02x:%02x:%02x:%02x:%02x:%02x\n", en[0], en[1], en[2], en[3], en[4], en[5]); DPRINTF(("PHY %d (%04x.%04x)\n", l->phy, mii_read(l, l->phy, 2), mii_read(l, l->phy, 3))); mii_dealan(l, 5); /* speed and duplexity can be seen in MII 31 */ val = mii_read(l, l->phy, 31); fdx = !!(val & (1U << 4)); printf("%s", (val & (1U << 3)) ? "100Mbps" : "10Mbps"); if (fdx) printf("-FDX"); printf("\n"); txd = &l->txd[0]; rxd = &l->rxd[0]; rxd[0].xd0 = htole32(R0_OWN); rxd[0].xd1 = htole32(R1_RCH | FRAMESIZE); rxd[0].xd2 = htole32(VTOPHYS(l->rxstore[0])); rxd[0].xd3 = htole32(VTOPHYS(&rxd[1])); rxd[1].xd0 = htole32(R0_OWN); rxd[1].xd1 = htole32(R1_RER | FRAMESIZE); rxd[1].xd2 = htole32(VTOPHYS(l->rxstore[1])); /* R1_RER neglects xd3 */ l->tx = l->rx = 0; wbinv(l, sizeof(struct local)); CSR_WRITE(l, TXDBASE, VTOPHYS(txd)); CSR_WRITE(l, RXDBASE, VTOPHYS(rxd)); val = MACCR_TXEN | MACCR_RXEN; if (fdx) val |= MACCR_FDPX; CSR_WRITE(l, BUSMODE, 0); CSR_WRITE(l, DMACCTL, DMACCTL_ST | DMACCTL_SR); CSR_WRITE(l, MAC_CR, val); /* (FDX), Tx/Rx enable */ CSR_WRITE(l, RXPOLLD, 01); /* start receiving */ return l; }