void dma_usart2_irq_disable(){
DMA_ITConfig(DMA1_Channel4,DMA_IT_TC,DISABLE);
}
serialPort_t *uartOpen(USART_TypeDef *USARTx, serialReceiveCallbackPtr callback, uint32_t baudRate, portMode_t mode, portOptions_t options)
{
uartPort_t *s = NULL;
if (USARTx == USART1) {
s = serialUSART1(baudRate, mode, options);
#ifdef USE_USART2
} else if (USARTx == USART2) {
s = serialUSART2(baudRate, mode, options);
#endif
#ifdef USE_USART3
} else if (USARTx == USART3) {
s = serialUSART3(baudRate, mode, options);
#endif
#ifdef USE_USART4
} else if (USARTx == UART4) {
s = serialUSART4(baudRate, mode, options);
#endif
#ifdef USE_USART5
} else if (USARTx == UART5) {
s = serialUSART5(baudRate, mode, options);
#endif
#ifdef USE_USART6
} else if (USARTx == USART6) {
s = serialUSART6(baudRate, mode, options);
#endif
} else {
return (serialPort_t *)s;
}
s->txDMAEmpty = true;
// common serial initialisation code should move to serialPort::init()
s->port.rxBufferHead = s->port.rxBufferTail = 0;
s->port.txBufferHead = s->port.txBufferTail = 0;
// callback works for IRQ-based RX ONLY
s->port.callback = callback;
s->port.mode = mode;
s->port.baudRate = baudRate;
s->port.options = options;
uartReconfigure(s);
// Receive DMA or IRQ
DMA_InitTypeDef DMA_InitStructure;
if (mode & MODE_RX) {
#ifdef STM32F40_41xxx
if (s->rxDMAStream) {
DMA_StructInit(&DMA_InitStructure);
DMA_InitStructure.DMA_PeripheralBaseAddr = s->rxDMAPeripheralBaseAddr;
DMA_InitStructure.DMA_Priority = DMA_Priority_Medium;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable ;
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_1QuarterFull ;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single ;
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
#else
if (s->rxDMAChannel) {
DMA_StructInit(&DMA_InitStructure);
DMA_InitStructure.DMA_PeripheralBaseAddr = s->rxDMAPeripheralBaseAddr;
DMA_InitStructure.DMA_Priority = DMA_Priority_Medium;
DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
#endif
DMA_InitStructure.DMA_BufferSize = s->port.rxBufferSize;
#ifdef STM32F40_41xxx
DMA_InitStructure.DMA_Channel = s->rxDMAChannel;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)s->port.rxBuffer;
DMA_DeInit(s->rxDMAStream);
DMA_Init(s->rxDMAStream, &DMA_InitStructure);
DMA_Cmd(s->rxDMAStream, ENABLE);
USART_DMACmd(s->USARTx, USART_DMAReq_Rx, ENABLE);
s->rxDMAPos = DMA_GetCurrDataCounter(s->rxDMAStream);
#else
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)s->port.rxBuffer;
DMA_DeInit(s->rxDMAChannel);
DMA_Init(s->rxDMAChannel, &DMA_InitStructure);
DMA_Cmd(s->rxDMAChannel, ENABLE);
USART_DMACmd(s->USARTx, USART_DMAReq_Rx, ENABLE);
s->rxDMAPos = DMA_GetCurrDataCounter(s->rxDMAChannel);
#endif
} else {
USART_ClearITPendingBit(s->USARTx, USART_IT_RXNE);
USART_ITConfig(s->USARTx, USART_IT_RXNE, ENABLE);
}
}
// Transmit DMA or IRQ
if (mode & MODE_TX) {
#ifdef STM32F40_41xxx
if (s->txDMAStream) {
DMA_StructInit(&DMA_InitStructure);
DMA_InitStructure.DMA_PeripheralBaseAddr = s->txDMAPeripheralBaseAddr;
DMA_InitStructure.DMA_Priority = DMA_Priority_Medium;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable ;
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_1QuarterFull ;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single ;
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
#else
if (s->txDMAChannel) {
DMA_StructInit(&DMA_InitStructure);
DMA_InitStructure.DMA_PeripheralBaseAddr = s->txDMAPeripheralBaseAddr;
DMA_InitStructure.DMA_Priority = DMA_Priority_Medium;
DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
#endif
DMA_InitStructure.DMA_BufferSize = s->port.txBufferSize;
#ifdef STM32F40_41xxx
DMA_InitStructure.DMA_Channel = s->txDMAChannel;
DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
DMA_DeInit(s->txDMAStream);
DMA_Init(s->txDMAStream, &DMA_InitStructure);
DMA_ITConfig(s->txDMAStream, DMA_IT_TC|DMA_IT_FE|DMA_IT_TE|DMA_IT_DME, ENABLE);
DMA_SetCurrDataCounter(s->txDMAStream, 0);
#else
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
DMA_DeInit(s->txDMAChannel);
DMA_Init(s->txDMAChannel, &DMA_InitStructure);
DMA_ITConfig(s->txDMAChannel, DMA_IT_TC, ENABLE);
DMA_SetCurrDataCounter(s->txDMAChannel, 0);
s->txDMAChannel->CNDTR = 0;
#endif
USART_DMACmd(s->USARTx, USART_DMAReq_Tx, ENABLE);
} else {
USART_ITConfig(s->USARTx, USART_IT_TXE, ENABLE);
}
}
USART_Cmd(s->USARTx, ENABLE);
return (serialPort_t *)s;
}
void uartSetBaudRate(serialPort_t *instance, uint32_t baudRate)
{
uartPort_t *uartPort = (uartPort_t *)instance;
uartPort->port.baudRate = baudRate;
uartReconfigure(uartPort);
}
void uartSetMode(serialPort_t *instance, portMode_t mode)
{
uartPort_t *uartPort = (uartPort_t *)instance;
uartPort->port.mode = mode;
uartReconfigure(uartPort);
}
void Dcmi::InitDCMI() {
DCMI_InitTypeDef DCMI_InitStructure;
DMA_InitTypeDef DMA_InitStructure;
NVIC_InitTypeDef NVIC_InitStructure;
DCMI_CROPInitTypeDef DCMI_CROPInitStructure;
/*** Configures the DCMI to interface with the OV7670 camera module ***/
/* Enable DCMI clock */
RCC_AHB2PeriphClockCmd(RCC_AHB2Periph_DCMI, ENABLE);
DCMI_DeInit();
/* DCMI configuration */
DCMI_InitStructure.DCMI_CaptureMode = captMode;
DCMI_InitStructure.DCMI_SynchroMode = DCMI_SynchroMode_Hardware;
DCMI_InitStructure.DCMI_PCKPolarity = DCMI_PCKPolarity_Rising;
DCMI_InitStructure.DCMI_VSPolarity = DCMI_VSPolarity_High;
DCMI_InitStructure.DCMI_HSPolarity = DCMI_HSPolarity_High;
DCMI_InitStructure.DCMI_CaptureRate = captRate;
DCMI_InitStructure.DCMI_ExtendedDataMode = DCMI_ExtendedDataMode_8b;
/* Configures the DMA2 to transfer Data from DCMI */
/* Enable DMA2 clock */
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE);
/* DMA2 Stream1 Configuration */
DMA_DeInit(DMA2_Stream1);
DMA_InitStructure.DMA_Channel = DMA_Channel_1;
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t) (&DCMI->DR);
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t) dmaMemAddr;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
DMA_InitStructure.DMA_BufferSize = imgSize / 4;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Enable;
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
/* DCMI configuration */
DCMI_Init(&DCMI_InitStructure);
/* DMA2 IRQ channel Configuration */
DMA_Init(DMA2_Stream1, &DMA_InitStructure);
DMA_ITConfig(DMA2_Stream1, DMA_IT_TC, ENABLE);
DMA_ITConfig(DMA2_Stream1, DMA_IT_TE, ENABLE);
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_1);
NVIC_InitStructure.NVIC_IRQChannel = DCMI_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 2;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
NVIC_InitStructure.NVIC_IRQChannel = DMA2_Stream1_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
}
serialPort_t *uartOpen(USART_TypeDef *USARTx, serialReceiveCallbackPtr callback, uint32_t baudRate, portMode_t mode)
{
DMA_InitTypeDef DMA_InitStructure;
USART_InitTypeDef USART_InitStructure;
uartPort_t *s = NULL;
if (USARTx == USART1)
s = serialUSART1(baudRate, mode);
if (USARTx == USART2)
s = serialUSART2(baudRate, mode);
s->USARTx = USARTx;
// common serial initialisation code should move to serialPort::init()
s->port.rxBufferHead = s->port.rxBufferTail = 0;
s->port.txBufferHead = s->port.txBufferTail = 0;
// callback for IRQ-based RX ONLY
s->port.callback = callback;
s->port.mode = mode;
s->port.baudRate = baudRate;
USART_InitStructure.USART_BaudRate = baudRate;
USART_InitStructure.USART_WordLength = USART_WordLength_8b;
if (mode & MODE_SBUS) {
USART_InitStructure.USART_StopBits = USART_StopBits_2;
USART_InitStructure.USART_Parity = USART_Parity_Even;
} else {
USART_InitStructure.USART_StopBits = USART_StopBits_1;
USART_InitStructure.USART_Parity = USART_Parity_No;
}
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_InitStructure.USART_Mode = 0;
if (mode & MODE_RX)
USART_InitStructure.USART_Mode |= USART_Mode_Rx;
if (mode & MODE_TX)
USART_InitStructure.USART_Mode |= USART_Mode_Tx;
USART_Init(USARTx, &USART_InitStructure);
USART_Cmd(USARTx, ENABLE);
DMA_StructInit(&DMA_InitStructure);
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&USARTx->DR;
DMA_InitStructure.DMA_Priority = DMA_Priority_Medium;
DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
// Receive DMA or IRQ
if (mode & MODE_RX) {
if (s->rxDMAChannel) {
DMA_InitStructure.DMA_BufferSize = s->port.rxBufferSize;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)s->port.rxBuffer;
DMA_DeInit(s->rxDMAChannel);
DMA_Init(s->rxDMAChannel, &DMA_InitStructure);
DMA_Cmd(s->rxDMAChannel, ENABLE);
USART_DMACmd(USARTx, USART_DMAReq_Rx, ENABLE);
s->rxDMAPos = DMA_GetCurrDataCounter(s->rxDMAChannel);
} else {
USART_ITConfig(USARTx, USART_IT_RXNE, ENABLE);
}
}
// Transmit DMA or IRQ
if (mode & MODE_TX) {
if (s->txDMAChannel) {
DMA_InitStructure.DMA_BufferSize = s->port.txBufferSize;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
DMA_DeInit(s->txDMAChannel);
DMA_Init(s->txDMAChannel, &DMA_InitStructure);
DMA_ITConfig(s->txDMAChannel, DMA_IT_TC, ENABLE);
DMA_SetCurrDataCounter(s->txDMAChannel, 0);
s->txDMAChannel->CNDTR = 0;
USART_DMACmd(USARTx, USART_DMAReq_Tx, ENABLE);
} else {
USART_ITConfig(USARTx, USART_IT_TXE, ENABLE);
}
}
return (serialPort_t *)s;
}
/**
* @brief Configure the DMA controller according to the Stream parameters
* defined in main.h file
* @param None
* @retval None
*/
static void DMA_Config(void)
{
NVIC_InitTypeDef NVIC_InitStructure;
DMA_InitTypeDef DMA_InitStructure;
__IO uint32_t Timeout = TIMEOUT_MAX;
/* Enable DMA clock */
RCC_AHB1PeriphClockCmd(DMA_STREAM_CLOCK, ENABLE);
/* Reset DMA Stream registers (for debug purpose) */
DMA_DeInit(DMA_STREAM);
/* Check if the DMA Stream is disabled before enabling it.
Note that this step is useful when the same Stream is used multiple times:
enabled, then disabled then re-enabled... In this case, the DMA Stream disable
will be effective only at the end of the ongoing data transfer and it will
not be possible to re-configure it before making sure that the Enable bit
has been cleared by hardware. If the Stream is used only once, this step might
be bypassed. */
while (DMA_GetCmdStatus(DMA_STREAM) != DISABLE)
{
}
/* Configure DMA Stream */
DMA_InitStructure.DMA_Channel = DMA_CHANNEL;
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)aSRC_Const_Buffer;
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)aDST_Buffer;
DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToMemory;
DMA_InitStructure.DMA_BufferSize = (uint32_t)BUFFER_SIZE;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Enable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(DMA_STREAM, &DMA_InitStructure);
/* Enable DMA Stream Transfer Complete interrupt */
DMA_ITConfig(DMA_STREAM, DMA_IT_TC, ENABLE);
/* DMA Stream enable */
DMA_Cmd(DMA_STREAM, ENABLE);
/* Check if the DMA Stream has been effectively enabled.
The DMA Stream Enable bit is cleared immediately by hardware if there is an
error in the configuration parameters and the transfer is no started (ie. when
wrong FIFO threshold is configured ...) */
Timeout = TIMEOUT_MAX;
while ((DMA_GetCmdStatus(DMA_STREAM) != ENABLE) && (Timeout-- > 0))
{
}
/* Check if a timeout condition occurred */
if (Timeout == 0)
{
/* Manage the error: to simplify the code enter an infinite loop */
while (1)
{
}
}
/* Enable the DMA Stream IRQ Channel */
NVIC_InitStructure.NVIC_IRQChannel = DMA_STREAM_IRQ;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
}
void ADC1_Init(uint16_t *ADC_Buffer)
{
DMA_InitTypeDef DMA_InitStructure;
ADC_CommonInitTypeDef ADC_CommonInitStructure;
ADC_InitTypeDef ADC_InitStructure;
GPIO_InitTypeDef GPIO_InitStructure;
/* enable clocks for DMA2, ADC1, GPIOA ----------------------------------*/
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2 | RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOC, ENABLE);
// RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE);
ADC_DeInit();
/* DMA2 stream0 channel0 configuration ----------------------------------*/
DMA_InitStructure.DMA_Channel = DMA_Channel_0;
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&ADC1->DR;
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)ADC_Buffer;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
DMA_InitStructure.DMA_BufferSize = 5;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable; // was enable
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(DMA2_Stream0, &DMA_InitStructure);
DMA_Cmd(DMA2_Stream0, ENABLE);
/* ADC Common Init ------------------------------------------------------*/
ADC_CommonInitStructure.ADC_Mode = ADC_Mode_Independent;
ADC_CommonInitStructure.ADC_Prescaler = ADC_Prescaler_Div8;
ADC_CommonInitStructure.ADC_DMAAccessMode = ADC_DMAAccessMode_Disabled;
ADC_CommonInitStructure.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_20Cycles; // was 5?
ADC_CommonInit(&ADC_CommonInitStructure);
/* ADC1 Init ------------------------------------------------------------*/
ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b;
ADC_InitStructure.ADC_ScanConvMode = ENABLE;
ADC_InitStructure.ADC_ContinuousConvMode = DISABLE; // was enable
ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None;
ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1;
ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Left; // was right - in CLOUDS is left?
ADC_InitStructure.ADC_NbrOfConversion = 5;
// ADC_InitStructure.ADC_NbrOfChannel = 10; not existing
ADC_Init(ADC1, &ADC_InitStructure);
/* Configure analog input pins ------------------------------------------*/
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | GPIO_Pin_4 |GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7;// | GPIO_Pin_10 | GPIO_Pin_11;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AN;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL ;
GPIO_Init(GPIOA, &GPIO_InitStructure);
// adc8 is adc1_10 =pc0, next is adc1_11 =pc1
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AN;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL ;
GPIO_Init(GPIOC, &GPIO_InitStructure);
/* ADC1 regular channel configuration -----------------------------------*/
ADC_RegularChannelConfig(ADC1, ADC_Channel_0, 1, ADC_SampleTime_480Cycles);
ADC_RegularChannelConfig(ADC1, ADC_Channel_1, 2, ADC_SampleTime_480Cycles);
ADC_RegularChannelConfig(ADC1, ADC_Channel_2, 3, ADC_SampleTime_480Cycles);
ADC_RegularChannelConfig(ADC1, ADC_Channel_3, 4, ADC_SampleTime_480Cycles);
ADC_RegularChannelConfig(ADC1, ADC_Channel_4, 5, ADC_SampleTime_480Cycles);
/* Enable Complete DMA interrupt */
DMA_ITConfig(DMA2_Stream0, DMA_IT_TC, ENABLE); // do we need this?
/* ADC DMA IRQ Channel configuration */
NVIC_EnableIRQ(DMA2_Stream0_IRQn);
/* Enable DMA request after last transfer (Single-ADC mode) */
ADC_DMARequestAfterLastTransferCmd(ADC1, ENABLE);
/* Enable ADC1 DMA */
ADC_DMACmd(ADC1, ENABLE);
/* Enable ADC1 */
ADC_Cmd(ADC1, ENABLE);
/* Start ADC1 Software Conversion */
ADC_SoftwareStartConv(ADC1);
}
/***************************************************************************************************
* @fn uarts_regist
*
* @brief 串口资源注册
* @param NULL
* @return null
***************************************************************************************************/
void uarts_regist(void)
{
GPIO_InitTypeDef GPIO_InitStructure;
NVIC_InitTypeDef NVIC_InitStructure;
USART_InitTypeDef USART_InitStructure;
DMA_InitTypeDef DMA_InitStructure;
uint32_t temp;
//USART_S_PORT_TxPin
RCC_AHB1PeriphClockCmd(USART_S_PORT_GPIO_CLK, ENABLE);
GPIO_InitStructure.GPIO_Pin = USART_S_PORT_TxPin ;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
GPIO_Init(USART_S_PORT_GPIO, &GPIO_InitStructure);
GPIO_PinAFConfig(USART_S_PORT_GPIO, USART_S_PORT_Tx_Pinsource, USART_S_PORT_GPIO_AF);
//USART_S_PORT_RxPin
GPIO_InitStructure.GPIO_Pin = USART_S_PORT_RxPin ;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
GPIO_Init(USART_S_PORT_GPIO, &GPIO_InitStructure);
GPIO_PinAFConfig(USART_S_PORT_GPIO, USART_S_PORT_Rx_Pinsource, USART_S_PORT_GPIO_AF);
//USARTdbg_TxPin
RCC_AHB1PeriphClockCmd(USARTdbg_GPIO_CLK, ENABLE);
GPIO_InitStructure.GPIO_Pin = USARTdbg_TxPin ;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
GPIO_Init(USARTdbg_GPIO, &GPIO_InitStructure);
GPIO_PinAFConfig(USARTdbg_GPIO, USARTdbg_Tx_Pinsource, USARTdbg_GPIO_AF);
//USARTdbg_RxPin
GPIO_InitStructure.GPIO_Pin = USARTdbg_RxPin ;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
GPIO_Init(USARTdbg_GPIO, &GPIO_InitStructure);
GPIO_PinAFConfig(USARTdbg_GPIO, USARTdbg_Rx_Pinsource, USARTdbg_GPIO_AF);
//---------------------USART_S_PORT串口功能配置---------------------
//打开串口对应的外设时钟
RCC_APB1PeriphClockCmd(USART_S_PORT_CLK, ENABLE);
//串口发DMA配置
//启动DMA时钟
RCC_AHB1PeriphClockCmd(USART_S_PORT_DMA_CLK, ENABLE);
//DMA1通道配置
//关闭通道
DMA_Cmd(USART_S_PORT_Tx_DMA_STREAM,DISABLE);
DMA_DeInit(USART_S_PORT_Tx_DMA_STREAM);
//通道地址
DMA_InitStructure.DMA_Channel = USART_S_PORT_Tx_DMA_Channel;
//外设地址
DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)(&USART_S_PORT->DR);
//内存地址
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)Sport_TxBuffer;
//dma传输方向单向
DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
//设置DMA在传输时缓冲区的长度
DMA_InitStructure.DMA_BufferSize = S_PORT_TX_BUFF_LEN;
//设置DMA的外设递增模式，一个外设
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
//设置DMA的内存递增模式
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
//外设数据字长
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
//内存数据字长
DMA_InitStructure.DMA_MemoryDataSize = DMA_PeripheralDataSize_Byte;
//设置DMA的传输模式
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
//设置DMA的优先级别
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(USART_S_PORT_Tx_DMA_STREAM,&DMA_InitStructure);
//清中断
DMA_ClearITPendingBit(USART_S_PORT_Tx_DMA_STREAM, USART_S_PORT_Tx_DMA_FLAG);
//使能中断
DMA_ITConfig(USART_S_PORT_Tx_DMA_STREAM,DMA_IT_TC,ENABLE);
//串口收DMA配置
//关闭通道
DMA_Cmd(USART_S_PORT_Rx_DMA_STREAM,DISABLE);
DMA_DeInit(USART_S_PORT_Rx_DMA_STREAM);
//通道地址
DMA_InitStructure.DMA_Channel = USART_S_PORT_Rx_DMA_Channel;
//外设地址
DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)(&USART_S_PORT->DR);
//内存地址
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)Sport_RxBuffer;
//dma传输方向单向
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
//设置DMA在传输时缓冲区的长度
DMA_InitStructure.DMA_BufferSize = S_PORT_RX_BUFF_LEN;
//设置DMA的外设递增模式，一个外设
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
//设置DMA的内存递增模式
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
//外设数据字长
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
//内存数据字长
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
//设置DMA的传输模式
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
//设置DMA的优先级别
DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(USART_S_PORT_Rx_DMA_STREAM,&DMA_InitStructure);
DMA_Cmd(USART_S_PORT_Rx_DMA_STREAM,ENABLE);
USART_InitStructure.USART_BaudRate = 115200;
USART_InitStructure.USART_WordLength = USART_WordLength_8b;
USART_InitStructure.USART_StopBits = USART_StopBits_1;
USART_InitStructure.USART_Parity = USART_Parity_No;
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
//初始化串口
USART_Init(USART_S_PORT,&USART_InitStructure);
//中断配置
USART_ITConfig(USART_S_PORT,USART_IT_TC,DISABLE);
USART_ITConfig(USART_S_PORT,USART_IT_RXNE,DISABLE);
USART_ITConfig(USART_S_PORT,USART_IT_IDLE,ENABLE);
//配置UART中断
NVIC_InitStructure.NVIC_IRQChannel = USART_S_PORT_IRQn; //通道设置为串口1中断
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = USART_S_PORT_Rx_NVIC_PRIORITY; //中断占先等级
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; //中断响应优先级0
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; //打开中断
NVIC_Init(&NVIC_InitStructure);
//DMA发送中断
NVIC_InitStructure.NVIC_IRQChannel = USART_S_PORT_Tx_DMA_IRQn; //通道设置为串口1中断
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = USART_S_PORT_Tx_DMA_NVIC_PRIORITY; //中断占先等级
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; //中断响应优先级0
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; //打开中断
NVIC_Init(&NVIC_InitStructure);
//清中断
temp = USART_S_PORT->SR;
temp = USART_S_PORT->DR; //清USART_IT_IDLE标志
//采用DMA方式发送
// USART_DMACmd(USART_S_PORT,USART_DMAReq_Tx,ENABLE);
// //采用DMA方式接收
USART_DMACmd(USART_S_PORT,USART_DMAReq_Rx,ENABLE);
//启动串口
USART_Cmd(USART_S_PORT, ENABLE);
//---------------------USARTdbg串口功能配置---------------------
//打开串口对应的外设时钟
RCC_APB1PeriphClockCmd(USARTdbg_CLK, ENABLE);
//串口发DMA配置
//关闭通道
DMA_Cmd(USARTdbg_Tx_DMA_STREAM,DISABLE);
DMA_DeInit(USARTdbg_Tx_DMA_STREAM);
//通道地址
DMA_InitStructure.DMA_Channel = USARTdbg_Tx_DMA_Channel;
//外设地址
DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)(&USARTdbg->DR);
//内存地址
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)dbg_TxBuffer;
//dma传输方向单向
DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
//设置DMA在传输时缓冲区的长度
DMA_InitStructure.DMA_BufferSize = DBG_TX_BUF_LEN;
//设置DMA的外设递增模式，一个外设
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
//设置DMA的内存递增模式
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
//外设数据字长
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
//内存数据字长
DMA_InitStructure.DMA_MemoryDataSize = DMA_PeripheralDataSize_Byte;
//设置DMA的传输模式
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
//设置DMA的优先级别
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(USARTdbg_Tx_DMA_STREAM,&DMA_InitStructure);
//清中断
DMA_ClearITPendingBit(USARTdbg_Tx_DMA_STREAM, USARTdbg_Tx_DMA_FLAG);
//使能中断
DMA_ITConfig(USARTdbg_Tx_DMA_STREAM,DMA_IT_TC,ENABLE);
//串口收DMA配置
//关闭通道
DMA_Cmd(USARTdbg_Rx_DMA_STREAM,DISABLE);
DMA_DeInit(USARTdbg_Rx_DMA_STREAM);
//通道地址
DMA_InitStructure.DMA_Channel = USARTdbg_Rx_DMA_Channel;
//外设地址
DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)(&USARTdbg->DR);
//内存地址
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)dbg_RxBuffer;
//dma传输方向单向
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
//设置DMA在传输时缓冲区的长度
DMA_InitStructure.DMA_BufferSize = DBG_RX_BUF_LEN;
//设置DMA的外设递增模式，一个外设
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
//设置DMA的内存递增模式
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
//外设数据字长
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
//内存数据字长
DMA_InitStructure.DMA_MemoryDataSize = DMA_PeripheralDataSize_Byte;
//设置DMA的传输模式
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
//设置DMA的优先级别
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(USARTdbg_Rx_DMA_STREAM,&DMA_InitStructure);
DMA_Cmd(USARTdbg_Rx_DMA_STREAM,ENABLE);
USART_InitStructure.USART_BaudRate = 115200;
USART_InitStructure.USART_WordLength = USART_WordLength_8b;
USART_InitStructure.USART_StopBits = USART_StopBits_1;
USART_InitStructure.USART_Parity = USART_Parity_No;
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
//初始化串口
USART_Init(USARTdbg,&USART_InitStructure);
//中断配置
USART_ITConfig(USARTdbg,USART_IT_TC,DISABLE);
USART_ITConfig(USARTdbg,USART_IT_RXNE,DISABLE);
USART_ITConfig(USARTdbg,USART_IT_IDLE,ENABLE);
USART_ClearITPendingBit(USARTdbg, USART_IT_RXNE);
//清中断
temp = USARTdbg->SR;
temp = USARTdbg->DR; //清USART_IT_IDLE标志
//配置UART中断
NVIC_InitStructure.NVIC_IRQChannel = USARTdbg_IRQn; //通道设置为串口1中断
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = USARTdbg_Rx_NVIC_PRIORITY; //中断占先等级
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; //中断响应优先级0
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; //打开中断
NVIC_Init(&NVIC_InitStructure);
//DMA发送中断
NVIC_InitStructure.NVIC_IRQChannel = USARTdbg_Tx_DMA_IRQn; //通道设置为串口1中断
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = USARTdbg_Tx_DMA_NVIC_PRIORITY; //中断占先等级
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; //中断响应优先级0
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; //打开中断
NVIC_Init(&NVIC_InitStructure);
//采用DMA方式发送
// USART_DMACmd(USARTdbg,USART_DMAReq_Tx,ENABLE);
//采用DMA方式接收
USART_DMACmd(USARTdbg,USART_DMAReq_Rx,ENABLE);
//启动串口
USART_Cmd(USARTdbg, ENABLE);
}
void ws2811LedStripHardwareInit(void)
{
TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
TIM_OCInitTypeDef TIM_OCInitStructure;
GPIO_InitTypeDef GPIO_InitStructure;
DMA_InitTypeDef DMA_InitStructure;
uint16_t prescalerValue;
#ifdef CC3D
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
GPIO_StructInit(&GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init(GPIOB, &GPIO_InitStructure);
#else
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
/* GPIOA Configuration: TIM3 Channel 1 as alternate function push-pull */
GPIO_StructInit(&GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init(GPIOA, &GPIO_InitStructure);
#endif
RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE);
/* Compute the prescaler value */
prescalerValue = (uint16_t) (SystemCoreClock / 24000000) - 1;
/* Time base configuration */
TIM_TimeBaseStructInit(&TIM_TimeBaseStructure);
TIM_TimeBaseStructure.TIM_Period = 29; // 800kHz
TIM_TimeBaseStructure.TIM_Prescaler = prescalerValue;
TIM_TimeBaseStructure.TIM_ClockDivision = 0;
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
TIM_TimeBaseInit(TIM3, &TIM_TimeBaseStructure);
/* PWM1 Mode configuration: Channel1 */
TIM_OCStructInit(&TIM_OCInitStructure);
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
TIM_OCInitStructure.TIM_Pulse = 0;
TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
TIM_OC1Init(TIM3, &TIM_OCInitStructure);
TIM_OC1PreloadConfig(TIM3, TIM_OCPreload_Enable);
TIM_CtrlPWMOutputs(TIM3, ENABLE);
/* configure DMA */
/* DMA clock enable */
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
/* DMA1 Channel6 Config */
DMA_DeInit(DMA1_Channel6);
DMA_StructInit(&DMA_InitStructure);
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&TIM3->CCR1;
DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)ledStripDMABuffer;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
DMA_InitStructure.DMA_BufferSize = WS2811_DMA_BUFFER_SIZE;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
DMA_Init(DMA1_Channel6, &DMA_InitStructure);
/* TIM3 CC1 DMA Request enable */
TIM_DMACmd(TIM3, TIM_DMA_CC1, ENABLE);
DMA_ITConfig(DMA1_Channel6, DMA_IT_TC, ENABLE);
NVIC_InitTypeDef NVIC_InitStructure;
NVIC_InitStructure.NVIC_IRQChannel = DMA1_Channel6_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = NVIC_PRIORITY_BASE(NVIC_PRIO_WS2811_DMA);
NVIC_InitStructure.NVIC_IRQChannelSubPriority = NVIC_PRIORITY_SUB(NVIC_PRIO_WS2811_DMA);
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
const hsvColor_t hsv_white = { 0, 255, 255};
setStripColor(&hsv_white);
ws2811UpdateStrip();
}
/*
Only 1 byte READ using Interrupt or Polling otherwise using DMA
*/
void I2C1_EV_IRQHandler()
{
__IO uint16_t regSR1, regSR2;
__IO uint32_t regSR;
int i=10;
rt_interrupt_enter();
//rt_hw_led_on(10);
regSR1 = I2C1->SR1;
regSR2 = I2C1->SR2;
regSR = (regSR2 << 16) | regSR1;
//rt_kprintf("EV=> SR1: 0x%x\tSR2: 0x%x\tSR: 0x%x status: %d\n", regSR1, regSR2, regSR, i2cStatus);
if( (regSR & I2C_EVENT_MASTER_MODE_SELECT) == I2C_EVENT_MASTER_MODE_SELECT) //EV5
{
if( i2cStatus == S1 ) //Send TX Command
{
I2C1->DR = DevAddr & 0xFE;
i2cStatus = S2;
}
else if( i2cStatus == S4 ) //Send RX Command
{
I2C1->DR = DevAddr | 0x01;
i2cStatus = S5;
}
regSR1 = 0;
regSR2 = 0;
}
if( (regSR & I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED)== I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED ) //EV6
{
switch( i2cStatus )
{
case S2: //Send 1st memory address phase
{
//I2C_DMACmd(I2C1, ENABLE);
I2C1->DR = MemAddr[0];
if( memtype == I2C_MEM_1Byte )
i2cStatus = S2_2;
else if( memtype == I2C_MEM_2Bytes )
i2cStatus = S2_1;
}
break;
case S5: //Set RX buffer phase
{
if( i2cFlag == I2C_READ_DMA )
{
I2C_DMAConfig(I2C1, i2c_buf, BufSize, I2C_DIRECTION_RX);
I2C1->CR2 |= CR2_LAST_Set | CR2_DMAEN_Set;
DMA_ITConfig( I2C1_DMA_CHANNEL_RX, DMA_IT_TC, ENABLE);
}
else if( i2cFlag == I2C_READ_INTERRUPT )
{
I2C1->CR2 |= I2C_IT_BUF;
I2C1->CR1 &= CR1_ACK_Reset;
/* Program the STOP */
I2C1->CR1 |= CR1_STOP_Set;
}
i2cStatus = S6;
}
break;
}
regSR1 = 0;
regSR2 = 0;
//dump_i2c_register(I2C1);
}
if((regSR & I2C_EVENT_MASTER_BYTE_RECEIVED) == I2C_EVENT_MASTER_BYTE_RECEIVED) //EV7
{
//Interrupt RX complete phase
if( i2cStatus == S6 && i2cFlag == I2C_READ_INTERRUPT )
{
*i2c_buf = I2C1->DR;
i2cStatus = S_STOP;
rt_event_send(&i2c_event, I2C_COMPLETE);
}
}
if( (regSR & I2C_EVENT_MASTER_BYTE_TRANSMITTED) == I2C_EVENT_MASTER_BYTE_TRANSMITTED ) //EV8_2
{
//Start TX/RX phase
if(i2cStatus == S3)
{
DMA_ClearFlag(I2C1_DMA_CHANNEL_TX, DMA_FLAG_TCIF6 );
DMA_Cmd(I2C1_DMA_CHANNEL_TX, DISABLE);
switch (i2cFlag)
{
case I2C_WRITE:
i2cStatus = S_STOP;
I2C1->CR1 |= CR1_STOP_Set;
rt_event_send(&i2c_event, I2C_COMPLETE);
break;
case I2C_READ_DMA:
i2cStatus = S4;
I2C1->CR1 |= CR1_START_Set;
break;
case I2C_READ_POLLING:
i2cStatus = S_STOP;
rt_event_send(&i2c_event, I2C_COMPLETE);
I2C1->CR2 &= ~(CR2_LAST_Set | I2C_IT_EVT | CR2_DMAEN_Set);
I2C1->CR1 |= CR1_START_Set;
break;
case I2C_READ_INTERRUPT:
i2cStatus = S4;
I2C1->CR1 |= CR1_START_Set;
break;
}
}
if( i2cStatus == S2_1 ) //Send 2nd memory address
{
if( memtype == I2C_MEM_2Bytes ) //memory address has 2 bytes
{
I2C1->DR = MemAddr[1];
i2cStatus = S2_2;
}
if( i2cFlag == I2C_READ_POLLING || i2cFlag == I2C_READ_DMA || i2cFlag == I2C_READ_INTERRUPT)
{
i2cStatus = S3;
}
}
if( i2cStatus == S2_2 ) //Set TX DAM phase
{
I2C_DMAConfig(I2C1, i2c_buf, BufSize, I2C_DIRECTION_TX);
I2C1->CR2 |= CR2_DMAEN_Set;
i2cStatus = S3;
}
}
rt_interrupt_leave();
}
void PIOS_Video_Init(const struct pios_video_cfg * cfg){
dev_cfg = cfg; // store config before enabling interrupt
if (cfg->mask.remap) {
GPIO_PinAFConfig(cfg->mask.sclk.gpio,
__builtin_ctz(cfg->mask.sclk.init.GPIO_Pin),
cfg->mask.remap);
GPIO_PinAFConfig(cfg->mask.mosi.gpio,
__builtin_ctz(cfg->mask.mosi.init.GPIO_Pin),
cfg->mask.remap);
}
if (cfg->level.remap)
{
GPIO_PinAFConfig(cfg->level.sclk.gpio,
__builtin_ctz(cfg->level.sclk.init.GPIO_Pin),
cfg->level.remap);
GPIO_PinAFConfig(cfg->level.miso.gpio,
__builtin_ctz(cfg->level.miso.init.GPIO_Pin),
cfg->level.remap);
}
/* SPI3 MASTER MASKBUFFER */
GPIO_Init(cfg->mask.sclk.gpio, (GPIO_InitTypeDef*)&(cfg->mask.sclk.init));
GPIO_Init(cfg->mask.mosi.gpio, (GPIO_InitTypeDef*)&(cfg->mask.mosi.init));
/* SPI1 SLAVE FRAMEBUFFER */
GPIO_Init(cfg->level.sclk.gpio, (GPIO_InitTypeDef*)&(cfg->level.sclk.init));
GPIO_Init(cfg->level.miso.gpio, (GPIO_InitTypeDef*)&(cfg->level.miso.init));
/* Initialize the SPI block */
SPI_Init(cfg->level.regs, (SPI_InitTypeDef*)&(cfg->level.init));
SPI_Init(cfg->mask.regs, (SPI_InitTypeDef*)&(cfg->mask.init));
/* Enable SPI */
SPI_Cmd(cfg->level.regs, ENABLE);
SPI_Cmd(cfg->mask.regs, ENABLE);
/* Configure DMA for SPI Tx MASTER */
DMA_Cmd(cfg->mask.dma.tx.channel, DISABLE);
DMA_Init(cfg->mask.dma.tx.channel, (DMA_InitTypeDef*)&(cfg->mask.dma.tx.init));
/* Configure DMA for SPI Tx SLAVE */
DMA_Cmd(cfg->level.dma.tx.channel, DISABLE);
DMA_Init(cfg->level.dma.tx.channel, (DMA_InitTypeDef*)&(cfg->level.dma.tx.init));
/* Trigger interrupt when for half conversions too to indicate double buffer */
DMA_ITConfig(cfg->mask.dma.tx.channel, DMA_IT_TC, ENABLE);
/*DMA_ClearFlag(cfg->mask.dma.tx.channel,DMA_FLAG_TCIF5);
DMA_ClearITPendingBit(cfg->mask.dma.tx.channel, DMA_IT_TCIF5);
DMA_ClearFlag(cfg->level.dma.tx.channel,DMA_FLAG_TCIF5);
DMA_ClearITPendingBit(cfg->level.dma.tx.channel, DMA_IT_TCIF5);
*/
/* Configure DMA interrupt */
NVIC_Init(&cfg->level.dma.irq.init);
NVIC_Init(&cfg->mask.dma.irq.init);
/* Enable SPI interrupts to DMA */
SPI_I2S_DMACmd(cfg->level.regs, SPI_I2S_DMAReq_Tx, ENABLE);
SPI_I2S_DMACmd(cfg->mask.regs, SPI_I2S_DMAReq_Tx, ENABLE);
/* Configure the Video Line interrupt */
PIOS_EXTI_Init(cfg->hsync);
PIOS_EXTI_Init(cfg->vsync);
draw_buffer_level = buffer0_level;
draw_buffer_mask = buffer0_mask;
disp_buffer_level = buffer1_level;
disp_buffer_mask = buffer1_mask;
}
void UartConfig() {
SerialPortInit(&serialPort3, 3);
serialPort_t *s;
s = serialPort3;
serialPort3->thisUsart = USARTx;
USARTx_TX_GPIO_CLK_EN;
USARTx_RX_GPIO_CLK_EN;
USARTx_DMAx_CLK_EN;
USARTx_CLK_EN;
USARTx_DMAx_CLK_EN;
USARTx_TX_AFConfig;
USARTx_RX_AFConfig;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
GPIO_InitStructure.GPIO_Pin = USARTx_TX_PIN;
GPIO_Init(USARTx_TX_GPIO_PORT, &GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pin = USARTx_RX_PIN;
GPIO_Init(USARTx_RX_GPIO_PORT, &GPIO_InitStructure);
USART_InitStructure.USART_BaudRate = BAUD;
USART_InitStructure.USART_WordLength = USART_WordLength_8b;
USART_InitStructure.USART_StopBits = USART_StopBits_1;
USART_InitStructure.USART_Parity = USART_Parity_No;
USART_InitStructure.USART_HardwareFlowControl =
USART_HardwareFlowControl_None;
USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
USART_Init(USARTx, &USART_InitStructure);
DMA_DeInit(USARTx_TX_DMA_STREAM);
DMA_InitStructure.DMA_Channel = USARTx_TX_DMA_CHANNEL;
DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)(&(USARTx->DR));
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t) serialPort3->txBuf;
DMA_InitStructure.DMA_BufferSize = SERIAL_BUFSIZE;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Enable;
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(USARTx_TX_DMA_STREAM, &DMA_InitStructure);
DMA_SetCurrDataCounter(USARTx_TX_DMA_STREAM, 0);
DMA_ITConfig(USARTx_TX_DMA_STREAM, DMA_IT_TC | DMA_IT_FE | DMA_IT_TE,
ENABLE);
USART_DMACmd(USARTx, USART_DMAReq_Tx, DISABLE);
DMA_Cmd(USARTx_TX_DMA_STREAM, DISABLE);
DMA_DeInit(USARTx_RX_DMA_STREAM);
DMA_InitStructure.DMA_Channel = USARTx_RX_DMA_CHANNEL;
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t) & USARTx->DR;
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t) s->rxBuf;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
DMA_InitStructure.DMA_BufferSize = SERIAL_BUFSIZE;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(USARTx_RX_DMA_STREAM, &DMA_InitStructure);
DMA_ClearFlag(USARTx_RX_DMA_STREAM,
USARTx_RX_DMA_FLAG_TCIF | USARTx_RX_DMA_FLAG_HTIF
| USARTx_RX_DMA_FLAG_TEIF);
DMA_Cmd(USARTx_RX_DMA_STREAM, ENABLE);
USART_DMACmd(USARTx, USART_DMAReq_Rx, ENABLE);
NVIC_InitStructure.NVIC_IRQChannel = USARTx_DMA_TX_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
/* Enable USART */
USART_Cmd(USARTx, ENABLE);
}
//***************************************************************************************
int main(void)
{
/*!< At this stage the microcontroller clock setting is already configured,
this is done through SystemInit() function which is called from startup
file (startup_stm32f4xx.s) before to branch to application main.
To reconfigure the default setting of SystemInit() function, refer to
system_stm32f4xx.c file
*/
/* Initialize Leds mounted on STM32F4-Discovery board */
STM_EVAL_LEDInit(LED4);
STM_EVAL_LEDInit(LED3);
STM_EVAL_LEDInit(LED5);
STM_EVAL_LEDInit(LED6);
init_USART1(9600); // initialize USART1 @ 9600 baud
char hello[] = "Init complete! Hello World!/n";
USART_puts_chars(USART1, hello); // just send a message to indicate that it works
/* ADC3 configuration *******************************************************/
/* - Enable peripheral clocks */
/* - DMA2_Stream0 channel2 configuration */
/* - Configure ADC Channel12 pin as analog input */
/* - Configure ADC3 Channel12 */
ADC3_CH12_DMA_Config();
/* Start ADC3 Software Conversion */
ADC_SoftwareStartConv(ADC3);
DMA_ITConfig(DMA2_Stream0,DMA_IT_TC,ENABLE);
/* TIM Configuration */
TIM_Config();
PWM_Config();
/* Setup SysTick Timer for 1 msec interrupts.
------------------------------------------
1. The SysTick_Config() function is a CMSIS function which configure:
- The SysTick Reload register with value passed as function parameter.
- Configure the SysTick IRQ priority to the lowest value (0x0F).
- Reset the SysTick Counter register.
- Configure the SysTick Counter clock source to be Core Clock Source (HCLK).
- Enable the SysTick Interrupt.
- Start the SysTick Counter.
2. You can change the SysTick Clock source to be HCLK_Div8 by calling the
SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK_Div8) just after the
SysTick_Config() function call. The SysTick_CLKSourceConfig() is defined
inside the misc.c file.
3. You can change the SysTick IRQ priority by calling the
NVIC_SetPriority(SysTick_IRQn,...) just after the SysTick_Config() function
call. The NVIC_SetPriority() is defined inside the core_cm4.h file.
4. To adjust the SysTick time base, use the following formula:
Reload Value = SysTick Counter Clock (Hz) x Desired Time base (s)
- Reload Value is the parameter to be passed for SysTick_Config() function
- Reload Value should not exceed 0xFFFFFF
*/
if (SysTick_Config(SystemCoreClock / (6250)))
{
/* Capture error */
while (1);
}
set_PWM_duty( 75, LEFT_LED_880);
static uint8_t duty_cycle = 0;
while (1)
{
/* Toggle LED3 and LED6 */
//STM_EVAL_LEDToggle(LED3);
//Delay(100);
STM_EVAL_LEDToggle(LED4);
Delay(100);
STM_EVAL_LEDToggle(LED6);
Delay(100);
STM_EVAL_LEDToggle(LED5);
Delay(100);
}
}
void dma_init(void) {
// SPI_InitTypeDef SPI_InitStructure;
DMA_InitTypeDef DMA_InitStructure;
NVIC_InitTypeDef NVIC_InitStructure;
DMA_Cmd(DMA2_Stream0, DISABLE); //disable receiver
DMA_Cmd(DMA2_Stream3, DISABLE); //disable transmitter
DMA_DeInit(DMA2_Stream0); //place default values
DMA_DeInit(DMA2_Stream3);
DMA_ClearFlag(DMA2_Stream0, DMA_FLAG_TCIF0); //transfer complete
DMA_ClearFlag(DMA2_Stream3, DMA_FLAG_TCIF3);
DMA_ClearFlag(DMA2_Stream0, DMA_FLAG_TEIF0); //transfer error
DMA_ClearFlag(DMA2_Stream3, DMA_FLAG_TEIF3);
DMA_ClearFlag(DMA2_Stream0, DMA_FLAG_FEIF0); //FIFO error
DMA_ClearFlag(DMA2_Stream3, DMA_FLAG_FEIF3);
DMA_ClearFlag(DMA2_Stream0, DMA_FLAG_DMEIF0); //direct mode error
DMA_ClearFlag(DMA2_Stream3, DMA_FLAG_DMEIF3);
/* Start DMA2 clock */
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE);
// Configure DMA streams
DMA_InitStructure.DMA_Channel = DMA_Channel_3;
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&(SPI1->DR);
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_1QuarterFull; //not needed
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
//receiving
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
DMA_Init(DMA2_Stream0, &DMA_InitStructure);
//sending
DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
DMA_Init(DMA2_Stream3, &DMA_InitStructure);
//enable
SPI_DMACmd(SPI1, SPI_DMAReq_Rx | SPI_DMAReq_Tx, ENABLE);
//Setting up interrupt
NVIC_InitStructure.NVIC_IRQChannel = DMA2_Stream3_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
//enable receiving
DMA_ITConfig(DMA2_Stream3, DMA_IT_TC, ENABLE);
}
void xADCInit()
{
/// @brief AD変換初期化
/// @note チャンネル設定のみハンド仕様
/// @note 元のxADCInit
// A/D変換が終了すると値はDMAにより変数g_ad_valueに転送される
//PC2 ch12
//PC3 ch13
ADC_InitTypeDef ADC_InitStructure;
ADC_CommonInitTypeDef ADC_CommonInitStructure;
DMA_InitTypeDef DMA_InitStructure;
NVIC_InitTypeDef NVIC_InitStructure;
/* Enable the DMA Stream IRQ Channel */
NVIC_InitStructure.NVIC_IRQChannel = DMA2_Stream0_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
// Enable peripheral clocks
RCC_AHB1PeriphClockCmd (RCC_AHB1Periph_DMA2 , ENABLE);
RCC_APB2PeriphClockCmd (RCC_APB2Periph_ADC1, ENABLE);
//GPIOのピンをADC入力に設定する
//GPIO_Cの出力ポート設定
GPIO_InitTypeDef GPIO_InitStructure;
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2 | GPIO_Pin_3;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AIN;
GPIO_InitStructure.GPIO_OType = GPIO_OType_OD;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init(GPIOC, &GPIO_InitStructure);
// DMA2 Stream0 channel0 configU3ration
DMA_InitStructure.DMA_Channel = DMA_Channel_0;
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&(ADC1->DR);
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)&g_ad_value;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
DMA_InitStructure.DMA_BufferSize = kSampleNum; //転送回数
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
// DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord; //ペリフェラルのデータサイズ
// DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord; //メモリのデータサイズ
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; //ペリフェラルのデータサイズ
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; //メモリのデータサイズ
// DMA_InitStructure.DMA_Mode = DMA_Mode_Circular; //繰り返し実行
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; //1回の転送で終わり
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init (DMA2_Stream0, &DMA_InitStructure);
//DMAの転送が終わったら割り込みがかかるようにする
DMA_ITConfig(DMA2_Stream0, DMA_IT_TC, ENABLE);
DMA_Cmd (DMA2_Stream0, ENABLE);
ADC_DeInit(); //これがないとADC値が化けることがある。
// ADC Common configU3ration
ADC_CommonInitStructure.ADC_Mode = ADC_Mode_Independent;
ADC_CommonInitStructure.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_5Cycles;
ADC_CommonInitStructure.ADC_DMAAccessMode = ADC_DMAAccessMode_2;
ADC_CommonInitStructure.ADC_Prescaler = ADC_Prescaler_Div2;
ADC_CommonInit (&ADC_CommonInitStructure);
// ADC1 regU3lar channel 12 configU3ration
ADC_DeInit();
ADC_InitStructure.ADC_Resolution = ADC_Resolution_8b;
ADC_InitStructure.ADC_ScanConvMode = ENABLE;
ADC_InitStructure.ADC_ContinuousConvMode = ENABLE;
ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None;
ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;
ADC_InitStructure.ADC_NbrOfConversion = 1; //ADCの本数
ADC_Init (ADC1, &ADC_InitStructure);
ADC_RegularChannelConfig(ADC1, ADC_Channel_12, 1, ADC_SampleTime_3Cycles);
// ADC_RegularChannelConfig(ADC1, ADC_Channel_13, 2, ADC_SampleTime_3Cycles);
// Enable ADC1 DMA
ADC_DMACmd(ADC1, ENABLE);
//変換結果がDMA転送されるごとに、ADCは次の変換を開始するように設定
ADC_DMARequestAfterLastTransferCmd(ADC1, ENABLE); //
// Enable ADC1
ADC_Cmd(ADC1, ENABLE);
// Start ADC1 Software Conversion
ADC_SoftwareStartConv(ADC1);
}
/* Setups --------------------------------------------------------------------*/
void setup_ADC1_with_DMA2( ){
// RC.
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE);
RCC_AHB1PeriphClockCmd(RCC_AHB1ENR_GPIOCEN, ENABLE); // Clock for the ADC port!! Do not forget about this one ;)
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE);
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE);
// GPIO
GPIO_InitTypeDef GPIO_InitStruct;
GPIO_StructInit(&GPIO_InitStruct);
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AN;
//GPIO_InitStruct.GPIO_Speed = GPIO_Speed_100MHz;
GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_NOPULL;
// PA : Pin 0-7.
GPIO_InitStruct.GPIO_Pin = (GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 |
GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7);
GPIO_Init(GPIOA, &GPIO_InitStruct);
// PB : 0-1.
GPIO_InitStruct.GPIO_Pin = (GPIO_Pin_0 | GPIO_Pin_1);
GPIO_Init(GPIOB, &GPIO_InitStruct);
// PC : 0-5.
GPIO_InitStruct.GPIO_Pin = (GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 |
GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5);
GPIO_Init(GPIOC, &GPIO_InitStruct);
// DMA
DMA_InitTypeDef DMA_InitStruct; // Skapar en struct av typ DMA_InitTypeDef som heter DMA_InitStruct.
DMA_DeInit(DMA2_Stream0); // Nollar.
DMA_InitStruct.DMA_Channel = DMA_Channel_0;
DMA_InitStruct.DMA_PeripheralBaseAddr = (uint32_t)&ADC1->DR;
DMA_InitStruct.DMA_Memory0BaseAddr = (uint32_t)&ADC_RawBuffer[0];
DMA_InitStruct.DMA_DIR = DMA_DIR_PeripheralToMemory;
DMA_InitStruct.DMA_BufferSize = 16;
DMA_InitStruct.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStruct.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStruct.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
DMA_InitStruct.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
DMA_InitStruct.DMA_Mode = DMA_Mode_Circular;
DMA_InitStruct.DMA_Priority = DMA_Priority_High;
DMA_InitStruct.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_InitStruct.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStruct.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(DMA2_Stream0, &DMA_InitStruct);
DMA_ITConfig(DMA2_Stream0, DMA_IT_TC, ENABLE);
// NVIC.
NVIC_InitTypeDef NVIC_InitStruct;
NVIC_InitStruct.NVIC_IRQChannel = DMA2_Stream0_IRQn;
NVIC_InitStruct.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStruct.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStruct.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStruct);
DMA_Cmd(DMA2_Stream0, ENABLE);
// ADC
ADC_DeInit( );
ADC_InitTypeDef ADC_InitStruct;
ADC_InitStruct.ADC_Resolution = ADC_Resolution_12b;
ADC_InitStruct.ADC_ScanConvMode = ENABLE;
ADC_InitStruct.ADC_ContinuousConvMode = ENABLE;
ADC_InitStruct.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None;
ADC_InitStruct.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1;
ADC_InitStruct.ADC_DataAlign = ADC_DataAlign_Right;
ADC_InitStruct.ADC_NbrOfConversion = 16;
ADC_Init(ADC1, &ADC_InitStruct);
ADC_CommonInitTypeDef ADC_CommonStruct;
ADC_CommonStruct.ADC_Mode = ADC_Mode_Independent;
ADC_CommonStruct.ADC_Prescaler = ADC_Prescaler_Div2;
ADC_CommonStruct.ADC_DMAAccessMode = ADC_DMAAccessMode_Disabled;
ADC_CommonStruct.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_5Cycles;
ADC_CommonInit(&ADC_CommonStruct);
ADC_RegularChannelConfig(ADC1, ADC_Channel_0, 1, ADC_SampleTime_480Cycles);
ADC_RegularChannelConfig(ADC1, ADC_Channel_1, 2, ADC_SampleTime_480Cycles);
ADC_RegularChannelConfig(ADC1, ADC_Channel_2, 3, ADC_SampleTime_480Cycles);
ADC_RegularChannelConfig(ADC1, ADC_Channel_3, 4, ADC_SampleTime_480Cycles);
ADC_RegularChannelConfig(ADC1, ADC_Channel_4, 5, ADC_SampleTime_480Cycles);
ADC_RegularChannelConfig(ADC1, ADC_Channel_5, 6, ADC_SampleTime_480Cycles);
ADC_RegularChannelConfig(ADC1, ADC_Channel_6, 7, ADC_SampleTime_480Cycles);
ADC_RegularChannelConfig(ADC1, ADC_Channel_7, 8, ADC_SampleTime_480Cycles);
ADC_RegularChannelConfig(ADC1, ADC_Channel_8, 9, ADC_SampleTime_480Cycles);
ADC_RegularChannelConfig(ADC1, ADC_Channel_9, 10, ADC_SampleTime_480Cycles);
ADC_RegularChannelConfig(ADC1, ADC_Channel_10, 11, ADC_SampleTime_480Cycles);
ADC_RegularChannelConfig(ADC1, ADC_Channel_11, 12, ADC_SampleTime_480Cycles);
ADC_RegularChannelConfig(ADC1, ADC_Channel_12, 13, ADC_SampleTime_480Cycles);
ADC_RegularChannelConfig(ADC1, ADC_Channel_13, 14, ADC_SampleTime_480Cycles);
ADC_RegularChannelConfig(ADC1, ADC_Channel_14, 15, ADC_SampleTime_480Cycles);
ADC_RegularChannelConfig(ADC1, ADC_Channel_15, 16, ADC_SampleTime_480Cycles);
ADC_DMARequestAfterLastTransferCmd(ADC1, ENABLE);
ADC_Cmd(ADC1, ENABLE);
ADC_DMACmd(ADC1, ENABLE);
ADC_SoftwareStartConv(ADC1);
}
/**
* @brief Initializes peripherals used by the I2C EEPROM driver.
* @param None
* @retval None
*/
void sEE_LowLevel_Init(void)
{
GPIO_InitTypeDef GPIO_InitStructure;
/*!< sEE_I2C Periph clock enable */
RCC_APB1PeriphClockCmd(sEE_I2C_CLK, ENABLE);
/*!< sEE_I2C_SCL_GPIO_CLK and sEE_I2C_SDA_GPIO_CLK Periph clock enable */
RCC_AHB1PeriphClockCmd(sEE_I2C_SCL_GPIO_CLK | sEE_I2C_SDA_GPIO_CLK, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
/* Reset sEE_I2C IP */
RCC_APB1PeriphResetCmd(sEE_I2C_CLK, ENABLE);
/* Release reset signal of sEE_I2C IP */
RCC_APB1PeriphResetCmd(sEE_I2C_CLK, DISABLE);
/*!< GPIO configuration */
/*!< Configure sEE_I2C pins: SCL */
GPIO_InitStructure.GPIO_Pin = sEE_I2C_SCL_PIN;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_OType = GPIO_OType_OD;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init(sEE_I2C_SCL_GPIO_PORT, &GPIO_InitStructure);
/*!< Configure sEE_I2C pins: SDA */
GPIO_InitStructure.GPIO_Pin = sEE_I2C_SDA_PIN;
GPIO_Init(sEE_I2C_SDA_GPIO_PORT, &GPIO_InitStructure);
/* Connect PXx to I2C_SCL*/
GPIO_PinAFConfig(sEE_I2C_SCL_GPIO_PORT, sEE_I2C_SCL_SOURCE, sEE_I2C_SCL_AF);
/* Connect PXx to I2C_SDA*/
GPIO_PinAFConfig(sEE_I2C_SDA_GPIO_PORT, sEE_I2C_SDA_SOURCE, sEE_I2C_SDA_AF);
/* Configure and enable I2C DMA TX Channel interrupt */
NVIC_InitStructure.NVIC_IRQChannel = sEE_I2C_DMA_TX_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = sEE_I2C_DMA_PREPRIO;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = sEE_I2C_DMA_SUBPRIO;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
/* Configure and enable I2C DMA RX Channel interrupt */
NVIC_InitStructure.NVIC_IRQChannel = sEE_I2C_DMA_RX_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = sEE_I2C_DMA_PREPRIO;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = sEE_I2C_DMA_SUBPRIO;
NVIC_Init(&NVIC_InitStructure);
/*!< I2C DMA TX and RX channels configuration */
/* Enable the DMA clock */
RCC_AHB1PeriphClockCmd(sEE_I2C_DMA_CLK, ENABLE);
/* Clear any pending flag on Rx Stream */
DMA_ClearFlag(sEE_I2C_DMA_STREAM_TX, sEE_TX_DMA_FLAG_FEIF | sEE_TX_DMA_FLAG_DMEIF | sEE_TX_DMA_FLAG_TEIF | \
sEE_TX_DMA_FLAG_HTIF | sEE_TX_DMA_FLAG_TCIF);
/* Disable the EE I2C Tx DMA stream */
DMA_Cmd(sEE_I2C_DMA_STREAM_TX, DISABLE);
/* Configure the DMA stream for the EE I2C peripheral TX direction */
DMA_DeInit(sEE_I2C_DMA_STREAM_TX);
sEEDMA_InitStructure.DMA_Channel = sEE_I2C_DMA_CHANNEL;
sEEDMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)sEE_I2C_DR_Address;
sEEDMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)0; /* This parameter will be configured durig communication */;
sEEDMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral; /* This parameter will be configured durig communication */
sEEDMA_InitStructure.DMA_BufferSize = 0xFFFF; /* This parameter will be configured durig communication */
sEEDMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
sEEDMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
sEEDMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
sEEDMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
sEEDMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
sEEDMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
sEEDMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Enable;
sEEDMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
sEEDMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
sEEDMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(sEE_I2C_DMA_STREAM_TX, &sEEDMA_InitStructure);
/* Clear any pending flag on Rx Stream */
DMA_ClearFlag(sEE_I2C_DMA_STREAM_RX, sEE_RX_DMA_FLAG_FEIF | sEE_RX_DMA_FLAG_DMEIF | sEE_RX_DMA_FLAG_TEIF | \
sEE_RX_DMA_FLAG_HTIF | sEE_RX_DMA_FLAG_TCIF);
/* Disable the EE I2C DMA Rx stream */
DMA_Cmd(sEE_I2C_DMA_STREAM_RX, DISABLE);
/* Configure the DMA stream for the EE I2C peripheral RX direction */
DMA_DeInit(sEE_I2C_DMA_STREAM_RX);
DMA_Init(sEE_I2C_DMA_STREAM_RX, &sEEDMA_InitStructure);
/* Enable the DMA Channels Interrupts */
DMA_ITConfig(sEE_I2C_DMA_STREAM_TX, DMA_IT_TC, ENABLE);
DMA_ITConfig(sEE_I2C_DMA_STREAM_RX, DMA_IT_TC, ENABLE);
}
void pwmDigitalMotorHardwareConfig(const timerHardware_t *timerHardware, uint8_t motorIndex, motorPwmProtocolTypes_e pwmProtocolType)
{
TIM_OCInitTypeDef TIM_OCInitStructure;
DMA_InitTypeDef DMA_InitStructure;
motorDmaOutput_t * const motor = &dmaMotors[motorIndex];
motor->timerHardware = timerHardware;
TIM_TypeDef *timer = timerHardware->tim;
const IO_t motorIO = IOGetByTag(timerHardware->tag);
const uint8_t timerIndex = getTimerIndex(timer);
const bool configureTimer = (timerIndex == dmaMotorTimerCount-1);
IOInit(motorIO, OWNER_MOTOR, RESOURCE_INDEX(motorIndex));
IOConfigGPIOAF(motorIO, IO_CONFIG(GPIO_Mode_AF, GPIO_Speed_50MHz, GPIO_OType_PP, GPIO_PuPd_UP), timerHardware->alternateFunction);
if (configureTimer) {
TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
TIM_TimeBaseStructInit(&TIM_TimeBaseStructure);
RCC_ClockCmd(timerRCC(timer), ENABLE);
TIM_Cmd(timer, DISABLE);
uint32_t hz;
switch (pwmProtocolType) {
case(PWM_TYPE_DSHOT600):
hz = MOTOR_DSHOT600_MHZ * 1000000;
break;
case(PWM_TYPE_DSHOT300):
hz = MOTOR_DSHOT300_MHZ * 1000000;
break;
default:
case(PWM_TYPE_DSHOT150):
hz = MOTOR_DSHOT150_MHZ * 1000000;
}
TIM_TimeBaseStructure.TIM_Prescaler = (uint16_t)((SystemCoreClock / timerClockDivisor(timer) / hz) - 1);
TIM_TimeBaseStructure.TIM_Period = MOTOR_BITLENGTH;
TIM_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV1;
TIM_TimeBaseStructure.TIM_RepetitionCounter = 0;
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
TIM_TimeBaseInit(timer, &TIM_TimeBaseStructure);
}
TIM_OCStructInit(&TIM_OCInitStructure);
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
if (timerHardware->output & TIMER_OUTPUT_N_CHANNEL) {
TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Enable;
TIM_OCInitStructure.TIM_OCNIdleState = TIM_OCNIdleState_Reset;
TIM_OCInitStructure.TIM_OCNPolarity = (timerHardware->output & TIMER_OUTPUT_INVERTED) ? TIM_OCNPolarity_Low : TIM_OCNPolarity_High;
} else {
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
TIM_OCInitStructure.TIM_OCIdleState = TIM_OCIdleState_Set;
TIM_OCInitStructure.TIM_OCPolarity = (timerHardware->output & TIMER_OUTPUT_INVERTED) ? TIM_OCPolarity_Low : TIM_OCPolarity_High;
}
TIM_OCInitStructure.TIM_Pulse = 0;
timerOCInit(timer, timerHardware->channel, &TIM_OCInitStructure);
timerOCPreloadConfig(timer, timerHardware->channel, TIM_OCPreload_Enable);
motor->timerDmaSource = timerDmaSource(timerHardware->channel);
dmaMotorTimers[timerIndex].timerDmaSources |= motor->timerDmaSource;
TIM_CCxCmd(timer, timerHardware->channel, TIM_CCx_Enable);
if (configureTimer) {
TIM_CtrlPWMOutputs(timer, ENABLE);
TIM_ARRPreloadConfig(timer, ENABLE);
TIM_Cmd(timer, ENABLE);
}
DMA_Channel_TypeDef *channel = timerHardware->dmaChannel;
if (channel == NULL) {
/* trying to use a non valid channel */
return;
}
dmaInit(timerHardware->dmaIrqHandler, OWNER_MOTOR, RESOURCE_INDEX(motorIndex));
dmaSetHandler(timerHardware->dmaIrqHandler, motor_DMA_IRQHandler, NVIC_BUILD_PRIORITY(1, 2), motorIndex);
DMA_Cmd(channel, DISABLE);
DMA_DeInit(channel);
DMA_StructInit(&DMA_InitStructure);
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)timerChCCR(timerHardware);
DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)motor->dmaBuffer;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
DMA_InitStructure.DMA_BufferSize = MOTOR_DMA_BUFFER_SIZE;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
DMA_Init(channel, &DMA_InitStructure);
DMA_ITConfig(channel, DMA_IT_TC, ENABLE);
}
/**
* @brief Configure the ADC to run at a fixed oversampling
* @param[in] oversampling the amount of oversampling to run at
* @param[in] internal_adc_id handle to the device
*/
static void PIOS_INTERNAL_ADC_Config(uint32_t internal_adc_id, uint32_t oversampling)
{
struct pios_internal_adc_dev * adc_dev = (struct pios_internal_adc_dev *)internal_adc_id;
if(!PIOS_INTERNAL_ADC_validate(adc_dev))
{
return;
}
adc_dev->adc_oversample = (oversampling > PIOS_ADC_MAX_OVERSAMPLING) ? PIOS_ADC_MAX_OVERSAMPLING : oversampling;
ADC_DeInit(ADC1);
ADC_DeInit(ADC2);
/* Disable interrupts */
DMA_ITConfig(adc_dev->cfg->dma.rx.channel, adc_dev->cfg->dma.irq.flags, DISABLE);
/* Enable ADC clocks */
PIOS_ADC_CLOCK_FUNCTION;
/* Map channels to conversion slots depending on the channel selection mask */
for (int32_t i = 0; i < PIOS_ADC_NUM_PINS; i++) {
ADC_RegularChannelConfig(ADC_MAPPING[i], ADC_CHANNEL[i],
ADC_CHANNEL_MAPPING[i],
PIOS_ADC_SAMPLE_TIME);
}
#if (PIOS_ADC_USE_TEMP_SENSOR)
ADC_TempSensorVrefintCmd(ENABLE);
ADC_RegularChannelConfig(PIOS_ADC_TEMP_SENSOR_ADC, ADC_Channel_16,
PIOS_ADC_TEMP_SENSOR_ADC_CHANNEL,
PIOS_ADC_SAMPLE_TIME);
#endif
// return
/* Configure ADCs */
ADC_InitTypeDef ADC_InitStructure;
ADC_StructInit(&ADC_InitStructure);
ADC_InitStructure.ADC_Mode = ADC_Mode_RegSimult;
ADC_InitStructure.ADC_ScanConvMode = ENABLE;
ADC_InitStructure.ADC_ContinuousConvMode = ENABLE;
ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_None;
ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;
ADC_InitStructure.ADC_NbrOfChannel = ((PIOS_ADC_NUM_CHANNELS + 1) >> 1);
ADC_Init(ADC1, &ADC_InitStructure);
#if (PIOS_ADC_USE_ADC2)
ADC_Init(ADC2, &ADC_InitStructure);
/* Enable ADC2 external trigger conversion (to synch with ADC1) */
ADC_ExternalTrigConvCmd(ADC2, ENABLE);
#endif
RCC_ADCCLKConfig(PIOS_ADC_ADCCLK);
/* Enable ADC1->DMA request */
ADC_DMACmd(ADC1, ENABLE);
/* ADC1 calibration */
ADC_Cmd(ADC1, ENABLE);
ADC_ResetCalibration(ADC1);
while (ADC_GetResetCalibrationStatus(ADC1)) ;
ADC_StartCalibration(ADC1);
while (ADC_GetCalibrationStatus(ADC1)) ;
#if (PIOS_ADC_USE_ADC2)
/* ADC2 calibration */
ADC_Cmd(ADC2, ENABLE);
ADC_ResetCalibration(ADC2);
while (ADC_GetResetCalibrationStatus(ADC2)) ;
ADC_StartCalibration(ADC2);
while (ADC_GetCalibrationStatus(ADC2)) ;
#endif
/* This makes sure we have an even number of transfers if using ADC2 */
adc_dev->dma_block_size = ((PIOS_ADC_NUM_CHANNELS + PIOS_ADC_USE_ADC2) >> PIOS_ADC_USE_ADC2) << PIOS_ADC_USE_ADC2;
adc_dev->dma_half_buffer_size = adc_dev->dma_block_size * adc_dev->adc_oversample;
/* Configure DMA channel */
DMA_InitTypeDef dma_init = adc_dev->cfg->dma.rx.init;
dma_init.DMA_MemoryBaseAddr = (uint32_t) &adc_dev->raw_data_buffer[0];
dma_init.DMA_MemoryInc = DMA_MemoryInc_Enable;
dma_init.DMA_BufferSize = adc_dev->dma_half_buffer_size; /* x2 for double buffer /2 for 32-bit xfr */
DMA_Init(adc_dev->cfg->dma.rx.channel, &dma_init);
DMA_Cmd(adc_dev->cfg->dma.rx.channel, ENABLE);
/* Trigger interrupt when for half conversions too to indicate double buffer */
DMA_ITConfig(adc_dev->cfg->dma.rx.channel, DMA_IT_TC, ENABLE);
DMA_ITConfig(adc_dev->cfg->dma.rx.channel, DMA_IT_HT, ENABLE);
/* Configure DMA interrupt */
NVIC_Init((NVIC_InitTypeDef*)&adc_dev->cfg->dma.irq.init);
/* Finally start initial conversion */
ADC_SoftwareStartConvCmd(ADC1, ENABLE);
/* Use simple averaging filter for now */
for (int32_t i = 0; i < adc_dev->adc_oversample; i++)
adc_dev->fir_coeffs[i] = 1;
adc_dev->fir_coeffs[adc_dev->adc_oversample] = adc_dev->adc_oversample;
/* Enable DMA1 clock */
RCC_AHBPeriphClockCmd(adc_dev->cfg->dma.ahb_clk, ENABLE);
}
void transponderIrHardwareInit(void)
{
TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
TIM_OCInitTypeDef TIM_OCInitStructure;
GPIO_InitTypeDef GPIO_InitStructure;
DMA_InitTypeDef DMA_InitStructure;
RCC_AHBPeriphClockCmd(TRANSPONDER_GPIO_AHB_PERIPHERAL, ENABLE);
GPIO_PinAFConfig(TRANSPONDER_GPIO, TRANSPONDER_PIN_SOURCE, TRANSPONDER_GPIO_AF);
/* Configuration alternate function push-pull */
GPIO_StructInit(&GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pin = TRANSPONDER_PIN;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_DOWN;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init(TRANSPONDER_GPIO, &GPIO_InitStructure);
RCC_APB2PeriphClockCmd(TRANSPONDER_TIMER_APB2_PERIPHERAL, ENABLE);
/* Time base configuration */
TIM_TimeBaseStructInit(&TIM_TimeBaseStructure);
TIM_TimeBaseStructure.TIM_Period = 156;
TIM_TimeBaseStructure.TIM_Prescaler = 0;
TIM_TimeBaseStructure.TIM_ClockDivision = 0;
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
TIM_TimeBaseInit(TRANSPONDER_TIMER, &TIM_TimeBaseStructure);
/* PWM1 Mode configuration: Channel1 */
TIM_OCStructInit(&TIM_OCInitStructure);
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
TIM_OCInitStructure.TIM_Pulse = 0;
#ifdef TRANSPONDER_INVERTED
TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_Low;
#else
TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
#endif
TIM_OC1Init(TRANSPONDER_TIMER, &TIM_OCInitStructure);
TIM_OC1PreloadConfig(TRANSPONDER_TIMER, TIM_OCPreload_Enable);
TIM_CtrlPWMOutputs(TRANSPONDER_TIMER, ENABLE);
/* configure DMA */
/* DMA clock enable */
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
/* DMA1 Channel6 Config */
DMA_DeInit(TRANSPONDER_DMA_CHANNEL);
DMA_StructInit(&DMA_InitStructure);
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&TRANSPONDER_TIMER->CCR1;
DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)transponderIrDMABuffer;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
DMA_InitStructure.DMA_BufferSize = TRANSPONDER_DMA_BUFFER_SIZE;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
DMA_Init(TRANSPONDER_DMA_CHANNEL, &DMA_InitStructure);
TIM_DMACmd(TRANSPONDER_TIMER, TIM_DMA_CC1, ENABLE);
DMA_ITConfig(TRANSPONDER_DMA_CHANNEL, DMA_IT_TC, ENABLE);
NVIC_InitTypeDef NVIC_InitStructure;
NVIC_InitStructure.NVIC_IRQChannel = TRANSPONDER_IRQ;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = NVIC_PRIORITY_BASE(NVIC_PRIO_TRANSPONDER_DMA);
NVIC_InitStructure.NVIC_IRQChannelSubPriority = NVIC_PRIORITY_SUB(NVIC_PRIO_TRANSPONDER_DMA);
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
}
void uart_init(void)
{
USART_InitTypeDef USART_InitStructure;
GPIO_InitTypeDef GPIO_InitStructure;
NVIC_InitTypeDef NVIC_InitStructure;
DMA_InitTypeDef DMA_InitStructure;
NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
//开启GPIOA,UART1时钟
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA | RCC_AHBPeriph_DMA1, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
GPIO_PinAFConfig(GPIOA, GPIO_PinSource9, GPIO_AF_1);
GPIO_PinAFConfig(GPIOA, GPIO_PinSource10, GPIO_AF_1);
/* Configure USART Tx and Rx as alternate function push-pull */
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_Level_3;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
GPIO_Init(GPIOA, &GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
GPIO_Init(GPIOA, &GPIO_InitStructure);
/* USART1 TX DMA1 Channel (triggered by USART1 Tx event) Config */
DMA_DeInit(DMA1_Channel2);
DMA_InitStructure.DMA_PeripheralBaseAddr = 0x40013828;
DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)send_buf;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
DMA_InitStructure.DMA_BufferSize = 8;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
DMA_InitStructure.DMA_Priority = DMA_Priority_Medium;
DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
DMA_Init(DMA1_Channel2, &DMA_InitStructure);
DMA_ITConfig(DMA1_Channel2, DMA_IT_TC, ENABLE);
USART_InitStructure.USART_BaudRate = 9600;
USART_InitStructure.USART_WordLength = USART_WordLength_8b;
USART_InitStructure.USART_StopBits = USART_StopBits_1;
USART_InitStructure.USART_Parity = USART_Parity_No;
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
USART_Init(USART1, &USART_InitStructure);
USART_ITConfig(USART1, USART_IT_RXNE, ENABLE);
USART_DMACmd(USART1, USART_DMAReq_Tx, ENABLE);
USART_Cmd(USART1, ENABLE);
DMA_ClearITPendingBit(DMA1_IT_TC2);
//使能TX DMA中断，优先级为1
NVIC_InitStructure.NVIC_IRQChannel = DMA1_Channel2_3_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPriority = 2;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
}
static void I2C_Initialize1()
{
I2C_InitTypeDef I2C_InitStructure;
GPIO_InitTypeDef GPIO_InitStructure;
NVIC_InitTypeDef NVIC_InitStructure;
RCC_AHB1PeriphClockCmd(I2C1_DMA_CLK, ENABLE);
RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2C1, ENABLE);
RCC_AHB1PeriphClockCmd(I2C1_GPIO_CLK, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, ENABLE);
RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, DISABLE);
I2C_StructInit(&I2C_InitStructure);
I2C_InitStructure.I2C_Mode = I2C_Mode_I2C;
I2C_InitStructure.I2C_DutyCycle = I2C_DutyCycle_2;
I2C_InitStructure.I2C_OwnAddress1 = I2C1_OWN_ADDRESS;
I2C_InitStructure.I2C_Ack = I2C_Ack_Enable;
I2C_InitStructure.I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit;
I2C_InitStructure.I2C_ClockSpeed = 100000;
I2C_Cmd(I2C1, ENABLE);
I2C_Init(I2C1, &I2C_InitStructure);
/* Initialize I2C1 on PB8 and PB9 */
GPIO_PinAFConfig(I2C1_SCL_PORT, I2C1_SCL_PIN_SOURCE, GPIO_AF_I2C1);
GPIO_PinAFConfig(I2C1_SDA_PORT, I2C1_SDA_PIN_SOURCE, GPIO_AF_I2C1);
GPIO_InitStructure.GPIO_Pin = I2C1_SCL_PIN;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
GPIO_Init(GPIOB, &GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pin = I2C1_SDA_PIN;
GPIO_Init(GPIOB, &GPIO_InitStructure);
DMA_ClearFlag(I2C1_DMA_STREAM_RX, I2C1_DMA_RX_FLAG_FEIF | I2C1_DMA_RX_FLAG_DMEIF | I2C1_DMA_RX_FLAG_TEIF |
I2C1_DMA_RX_FLAG_HTIF | I2C1_DMA_RX_FLAG_TCIF);
DMA_Cmd(I2C1_DMA_STREAM_RX, DISABLE);
DMA_DeInit(I2C1_DMA_STREAM_RX);
DMA_StructInit(&I2C1_DMA_InitStructure);
I2C1_DMA_InitStructure.DMA_Channel = I2C1_DMA_CHANNEL_RX;
I2C1_DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t) &(I2C1->DR);
I2C1_DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)0; /* This parameter will be configured durig communication */;
I2C1_DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral; /* This parameter will be configured durig communication */
I2C1_DMA_InitStructure.DMA_BufferSize = 0xFFFF; /* This parameter will be configured durig communication */
I2C1_DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
I2C1_DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
I2C1_DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
I2C1_DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
I2C1_DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
I2C1_DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
I2C1_DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Enable;
I2C1_DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
I2C1_DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
I2C1_DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(I2C1_DMA_STREAM_RX, &I2C1_DMA_InitStructure);
DMA_ClearFlag(I2C1_DMA_STREAM_TX, I2C1_DMA_TX_FLAG_FEIF | I2C1_DMA_TX_FLAG_DMEIF | I2C1_DMA_TX_FLAG_TEIF |
I2C1_DMA_TX_FLAG_HTIF | I2C1_DMA_TX_FLAG_TCIF);
DMA_Cmd(I2C1_DMA_STREAM_TX, DISABLE);
DMA_DeInit(I2C1_DMA_STREAM_TX);
I2C1_DMA_InitStructure.DMA_Channel = I2C1_DMA_CHANNEL_TX;
DMA_Init(I2C1_DMA_STREAM_TX, &I2C1_DMA_InitStructure);
/* Setup interrupts */
NVIC_InitStructure.NVIC_IRQChannel = I2C1_DMA_RX_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = I2C1_DMA_PREPRIO;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = I2C1_DMA_SUBPRIO;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
NVIC_InitStructure.NVIC_IRQChannel = I2C1_DMA_TX_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = I2C1_DMA_PREPRIO;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = I2C1_DMA_SUBPRIO;
NVIC_Init(&NVIC_InitStructure);
/* Enable TC Interrupts */
DMA_ITConfig(I2C1_DMA_STREAM_TX, DMA_IT_TC, ENABLE);
DMA_ITConfig(I2C1_DMA_STREAM_RX, DMA_IT_TC, ENABLE);
I2C1_DMA_RX_Semaphore = 0;
I2C1_DMA_TX_Semaphore = 0;
}
/**
* @brief Initializes peripherals used by the I2C EEPROM driver.
* @param None
* @retval None
*/
static void i2c_lowLevel_init(i2c_dev *dev)
{
GPIO_InitTypeDef GPIO_I2C1_InitStructure;
GPIO_InitTypeDef GPIO_I2C2_InitStructure;
/* Enable the i2c */
RCC_APB1PeriphClockCmd(dev->clk, ENABLE);
/* Reset the Peripheral */
RCC_APB1PeriphResetCmd(dev->clk, ENABLE);
RCC_APB1PeriphResetCmd(dev->clk, DISABLE);
/* Enable the GPIOs for the SCL/SDA Pins */
RCC_AHB1PeriphClockCmd(dev->gpio_port->clk, ENABLE);
if(dev->I2Cx == I2C1) {
/* GPIO configuration */
/* Configure SCL */
GPIO_I2C1_InitStructure.GPIO_Pin = BIT(dev->scl_pin);
GPIO_I2C1_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_I2C1_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
GPIO_I2C1_InitStructure.GPIO_OType = GPIO_OType_OD;
GPIO_I2C1_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
GPIO_Init(dev->gpio_port->GPIOx, &GPIO_I2C1_InitStructure);
/* Configure SDA */
GPIO_I2C1_InitStructure.GPIO_Pin = BIT(dev->sda_pin);
GPIO_Init(dev->gpio_port->GPIOx, &GPIO_I2C1_InitStructure);
/* Connect GPIO pins to peripheral */
GPIO_PinAFConfig(dev->gpio_port->GPIOx, dev->scl_pin, dev->gpio_af);
GPIO_PinAFConfig(dev->gpio_port->GPIOx, dev->sda_pin, dev->gpio_af);
NVIC_InitTypeDef NVIC_InitStructure;
/* Configure and enable I2C DMA TX Channel interrupt */
NVIC_InitStructure.NVIC_IRQChannel = sEE_I2C1_DMA_TX_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
/* Configure and enable I2C DMA RX Channel interrupt */
NVIC_InitStructure.NVIC_IRQChannel = sEE_I2C1_DMA_RX_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_Init(&NVIC_InitStructure);
/*!< I2C DMA TX and RX channels configuration */
/* Enable the DMA clock */
RCC_AHB1PeriphClockCmd(sEE_I2C1_DMA_CLK, ENABLE);
/* Clear any pending flag on Rx Stream */
DMA_ClearFlag(sEE_I2C1_DMA_STREAM_TX,
sEE1_TX_DMA_FLAG_FEIF | sEE1_TX_DMA_FLAG_DMEIF | sEE1_TX_DMA_FLAG_TEIF
| sEE1_TX_DMA_FLAG_HTIF | sEE1_TX_DMA_FLAG_TCIF );
/* Disable the EE I2C Tx DMA stream */
DMA_Cmd(sEE_I2C1_DMA_STREAM_TX, DISABLE);
/* Configure the DMA stream for the EE I2C peripheral TX direction */
DMA_DeInit(sEE_I2C1_DMA_STREAM_TX );
I2C1DMA_InitStructure.DMA_Channel = sEE_I2C1_DMA_CHANNEL;
I2C1DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&I2C1->DR;
I2C1DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t) 0; /* This parameter will be configured durig communication */
I2C1DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral; /* This parameter will be configured durig communication */
I2C1DMA_InitStructure.DMA_BufferSize = 0xFFFF; /* This parameter will be configured durig communication */
I2C1DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
I2C1DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
I2C1DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
I2C1DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
I2C1DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
I2C1DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
I2C1DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Enable;
I2C1DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
I2C1DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
I2C1DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(sEE_I2C1_DMA_STREAM_TX, &I2C1DMA_InitStructure);
/* Clear any pending flag on Rx Stream */
DMA_ClearFlag(sEE_I2C1_DMA_STREAM_RX,
sEE1_RX_DMA_FLAG_FEIF | sEE1_RX_DMA_FLAG_DMEIF | sEE1_RX_DMA_FLAG_TEIF
| sEE1_RX_DMA_FLAG_HTIF | sEE1_RX_DMA_FLAG_TCIF );
/* Disable the EE I2C DMA Rx stream */
DMA_Cmd(sEE_I2C1_DMA_STREAM_RX, DISABLE);
/* Configure the DMA stream for the EE I2C peripheral RX direction */
DMA_DeInit(sEE_I2C1_DMA_STREAM_RX );
DMA_Init(sEE_I2C1_DMA_STREAM_RX, &I2C1DMA_InitStructure);
/* Enable the DMA Channels Interrupts */
DMA_ITConfig(sEE_I2C1_DMA_STREAM_TX, DMA_IT_TC, ENABLE);
DMA_ITConfig(sEE_I2C1_DMA_STREAM_RX, DMA_IT_TC, ENABLE);
} else if (dev->I2Cx == I2C2) {
/* GPIO configuration */
/* Configure SCL */
GPIO_I2C2_InitStructure.GPIO_Pin = BIT(dev->scl_pin);
GPIO_I2C2_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_I2C2_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
GPIO_I2C2_InitStructure.GPIO_OType = GPIO_OType_OD;
GPIO_I2C2_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
GPIO_Init(dev->gpio_port->GPIOx, &GPIO_I2C2_InitStructure);
/* Configure SDA */
GPIO_I2C2_InitStructure.GPIO_Pin = BIT(dev->sda_pin);
GPIO_Init(dev->gpio_port->GPIOx, &GPIO_I2C2_InitStructure);
/* Connect GPIO pins to peripheral */
GPIO_PinAFConfig(dev->gpio_port->GPIOx, dev->scl_pin, dev->gpio_af);
GPIO_PinAFConfig(dev->gpio_port->GPIOx, dev->sda_pin, dev->gpio_af);
NVIC_InitTypeDef NVIC_InitStructure;
/* Configure and enable I2C DMA TX Channel interrupt */
NVIC_InitStructure.NVIC_IRQChannel = sEE_I2C2_DMA_TX_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
/* Configure and enable I2C DMA RX Channel interrupt */
NVIC_InitStructure.NVIC_IRQChannel = sEE_I2C2_DMA_RX_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_Init(&NVIC_InitStructure);
/*!< I2C DMA TX and RX channels configuration */
/* Enable the DMA clock */
RCC_AHB1PeriphClockCmd(sEE_I2C2_DMA_CLK, ENABLE);
/* Clear any pending flag on Rx Stream */
DMA_ClearFlag(sEE_I2C2_DMA_STREAM_TX,
sEE2_TX_DMA_FLAG_FEIF | sEE2_TX_DMA_FLAG_DMEIF | sEE2_TX_DMA_FLAG_TEIF
| sEE2_TX_DMA_FLAG_HTIF | sEE2_TX_DMA_FLAG_TCIF );
/* Disable the EE I2C Tx DMA stream */
DMA_Cmd(sEE_I2C2_DMA_STREAM_TX, DISABLE);
/* Configure the DMA stream for the EE I2C peripheral TX direction */
DMA_DeInit(sEE_I2C2_DMA_STREAM_TX );
I2C2DMA_InitStructure.DMA_Channel = sEE_I2C2_DMA_CHANNEL;
I2C2DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&I2C2->DR;
I2C2DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t) 0; /* This parameter will be configured durig communication */
I2C2DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral; /* This parameter will be configured durig communication */
I2C2DMA_InitStructure.DMA_BufferSize = 0xFFFF; /* This parameter will be configured durig communication */
I2C2DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
I2C2DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
I2C2DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
I2C2DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
I2C2DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
I2C2DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
I2C2DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Enable;
I2C2DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
I2C2DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
I2C2DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(sEE_I2C2_DMA_STREAM_TX, &I2C2DMA_InitStructure);
/* Clear any pending flag on Rx Stream */
DMA_ClearFlag(sEE_I2C2_DMA_STREAM_RX,
sEE2_RX_DMA_FLAG_FEIF | sEE2_RX_DMA_FLAG_DMEIF | sEE2_RX_DMA_FLAG_TEIF
| sEE2_RX_DMA_FLAG_HTIF | sEE2_RX_DMA_FLAG_TCIF );
/* Disable the EE I2C DMA Rx stream */
DMA_Cmd(sEE_I2C2_DMA_STREAM_RX, DISABLE);
/* Configure the DMA stream for the EE I2C peripheral RX direction */
DMA_DeInit(sEE_I2C2_DMA_STREAM_RX );
DMA_Init(sEE_I2C2_DMA_STREAM_RX, &I2C2DMA_InitStructure);
/* Enable the DMA Channels Interrupts */
DMA_ITConfig(sEE_I2C2_DMA_STREAM_TX, DMA_IT_TC, ENABLE);
DMA_ITConfig(sEE_I2C2_DMA_STREAM_RX, DMA_IT_TC, ENABLE);
}
}
static void dac1_config(void)
{
DAC_InitTypeDef DAC_InitStructure;
DMA_InitTypeDef DMA_InitStructure;
NVIC_InitTypeDef NVIC_InitStructure;
/* DAC channel 1 Configuration */
/*
This line fixed a bug that cost me 5 days, bad wave amplitude
value, and some STM32F4 periph library bugs caused triangle wave
geneartion to be enable resulting in a low level tone on the
SM1000, that we thought was caused by analog issues like layour
or power supply biasing
*/
DAC_StructInit(&DAC_InitStructure);
DAC_InitStructure.DAC_Trigger = DAC_Trigger_T6_TRGO;
DAC_InitStructure.DAC_WaveGeneration = DAC_WaveGeneration_None;
DAC_InitStructure.DAC_OutputBuffer = DAC_OutputBuffer_Enable;
DAC_Init(DAC_Channel_1, &DAC_InitStructure);
/* DMA1_Stream5 channel7 configuration **************************************/
/* Table 35 page 219 of the monster data sheet */
DMA_DeInit(DMA1_Stream5);
DMA_InitStructure.DMA_Channel = DMA_Channel_7;
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)DAC_DHR12R1_ADDRESS;
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)dac1_buf;
DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
DMA_InitStructure.DMA_BufferSize = DAC_BUF_SZ;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(DMA1_Stream5, &DMA_InitStructure);
/* Enable DMA Half & Complete interrupts */
DMA_ITConfig(DMA1_Stream5, DMA_IT_TC | DMA_IT_HT, ENABLE);
/* Enable the DMA Stream IRQ Channel */
NVIC_InitStructure.NVIC_IRQChannel = DMA1_Stream5_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
/* Enable DMA1_Stream5 */
DMA_Cmd(DMA1_Stream5, ENABLE);
/* Enable DAC Channel 1 */
DAC_Cmd(DAC_Channel_1, ENABLE);
/* Enable DMA for DAC Channel 1 */
DAC_DMACmd(DAC_Channel_1, ENABLE);
}
/**
* @brief Initializes peripherals used by the I2C EEPROM driver.
* @param None
* @retval None
*/
void sEE_LowLevel_Init(void)
{
GPIO_InitTypeDef GPIO_InitStructure;
NVIC_InitTypeDef NVIC_InitStructure;
/*!< sEE_I2C_SCL_GPIO_CLK and sEE_I2C_SDA_GPIO_CLK Periph clock enable */
RCC_APB2PeriphClockCmd(sEE_I2C_SCL_GPIO_CLK | sEE_I2C_SDA_GPIO_CLK, ENABLE);
/*!< sEE_I2C Periph clock enable */
RCC_APB1PeriphClockCmd(sEE_I2C_CLK, ENABLE);
/*!< GPIO configuration */
/*!< Configure sEE_I2C pins: SCL */
GPIO_InitStructure.GPIO_Pin = sEE_I2C_SCL_PIN;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_OD;
GPIO_Init(sEE_I2C_SCL_GPIO_PORT, &GPIO_InitStructure);
/*!< Configure sEE_I2C pins: SDA */
GPIO_InitStructure.GPIO_Pin = sEE_I2C_SDA_PIN;
GPIO_Init(sEE_I2C_SDA_GPIO_PORT, &GPIO_InitStructure);
/* Configure and enable I2C DMA TX Channel interrupt */
NVIC_InitStructure.NVIC_IRQChannel = sEE_I2C_DMA_TX_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = sEE_I2C_DMA_PREPRIO;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = sEE_I2C_DMA_SUBPRIO;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
/* Configure and enable I2C DMA RX Channel interrupt */
NVIC_InitStructure.NVIC_IRQChannel = sEE_I2C_DMA_RX_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = sEE_I2C_DMA_PREPRIO;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = sEE_I2C_DMA_SUBPRIO;
NVIC_Init(&NVIC_InitStructure);
/*!< I2C DMA TX and RX channels configuration */
/* Enable the DMA clock */
RCC_AHBPeriphClockCmd(sEE_I2C_DMA_CLK, ENABLE);
/* I2C TX DMA Channel configuration */
DMA_DeInit(sEE_I2C_DMA_CHANNEL_TX);
sEEDMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)sEE_I2C_DR_Address;
sEEDMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)0; /* This parameter will be configured durig communication */
sEEDMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST; /* This parameter will be configured durig communication */
sEEDMA_InitStructure.DMA_BufferSize = 0xFFFF; /* This parameter will be configured durig communication */
sEEDMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
sEEDMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
sEEDMA_InitStructure.DMA_PeripheralDataSize = DMA_MemoryDataSize_Byte;
sEEDMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
sEEDMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
sEEDMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
sEEDMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
DMA_Init(sEE_I2C_DMA_CHANNEL_TX, &sEEDMA_InitStructure);
/* I2C RX DMA Channel configuration */
DMA_DeInit(sEE_I2C_DMA_CHANNEL_RX);
DMA_Init(sEE_I2C_DMA_CHANNEL_RX, &sEEDMA_InitStructure);
/* Enable the DMA Channels Interrupts */
DMA_ITConfig(sEE_I2C_DMA_CHANNEL_TX, DMA_IT_TC, ENABLE);
DMA_ITConfig(sEE_I2C_DMA_CHANNEL_RX, DMA_IT_TC, ENABLE);
}
OSStatus internal_uart_init( mico_uart_t uart, const mico_uart_config_t* config, ring_buffer_t* optional_rx_buffer )
{
GPIO_InitTypeDef gpio_init_structure;
USART_InitTypeDef usart_init_structure;
NVIC_InitTypeDef nvic_init_structure;
DMA_InitTypeDef dma_init_structure;
#ifndef NO_MICO_RTOS
mico_rtos_init_semaphore(&uart_interfaces[uart].tx_complete, 1);
mico_rtos_init_semaphore(&uart_interfaces[uart].rx_complete, 1);
#else
uart_interfaces[uart].tx_complete = false;
uart_interfaces[uart].rx_complete = false;
#endif
MicoMcuPowerSaveConfig(false);
/* Enable GPIO peripheral clocks for TX and RX pins */
RCC_AHB1PeriphClockCmd( uart_mapping[uart].pin_rx->peripheral_clock |
uart_mapping[uart].pin_tx->peripheral_clock, ENABLE );
/* Configure USART TX Pin */
gpio_init_structure.GPIO_Pin = (uint32_t) ( 1 << uart_mapping[uart].pin_tx->number );
gpio_init_structure.GPIO_Mode = GPIO_Mode_AF;
gpio_init_structure.GPIO_OType = GPIO_OType_PP;
gpio_init_structure.GPIO_PuPd = GPIO_PuPd_NOPULL;
gpio_init_structure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init( uart_mapping[uart].pin_tx->bank, &gpio_init_structure );
GPIO_PinAFConfig( uart_mapping[uart].pin_tx->bank, uart_mapping[uart].pin_tx->number, uart_mapping[uart].gpio_af );
/* Configure USART RX Pin */
gpio_init_structure.GPIO_Pin = (uint32_t) ( 1 << uart_mapping[uart].pin_rx->number );
gpio_init_structure.GPIO_Mode = GPIO_Mode_AF;
gpio_init_structure.GPIO_OType = GPIO_OType_OD;
gpio_init_structure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init( uart_mapping[uart].pin_rx->bank, &gpio_init_structure );
GPIO_PinAFConfig( uart_mapping[uart].pin_rx->bank, uart_mapping[uart].pin_rx->number, uart_mapping[uart].gpio_af );
#ifndef NO_MICO_RTOS
if(config->flags & UART_WAKEUP_ENABLE){
current_uart = uart;
mico_rtos_init_semaphore( &uart_interfaces[uart].sem_wakeup, 1 );
mico_rtos_create_thread(NULL, MICO_APPLICATION_PRIORITY, "UART_WAKEUP", thread_wakeup, 0x100, ¤t_uart);
}
#endif
/* Check if any of the flow control is enabled */
if ( uart_mapping[uart].pin_cts && (config->flow_control == FLOW_CONTROL_CTS || config->flow_control == FLOW_CONTROL_CTS_RTS) )
{
/* Enable peripheral clock */
RCC_AHB1PeriphClockCmd( uart_mapping[uart].pin_cts->peripheral_clock, ENABLE );
/* Configure CTS Pin */
gpio_init_structure.GPIO_Pin = (uint32_t) ( 1 << uart_mapping[uart].pin_cts->number );
gpio_init_structure.GPIO_Mode = GPIO_Mode_AF;
gpio_init_structure.GPIO_OType = GPIO_OType_OD;
gpio_init_structure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init( uart_mapping[uart].pin_cts->bank, &gpio_init_structure );
GPIO_PinAFConfig( uart_mapping[uart].pin_cts->bank, uart_mapping[uart].pin_cts->number, uart_mapping[uart].gpio_af );
}
if ( uart_mapping[uart].pin_cts && (config->flow_control == FLOW_CONTROL_RTS || config->flow_control == FLOW_CONTROL_CTS_RTS) )
{
/* Enable peripheral clock */
RCC_AHB1PeriphClockCmd( uart_mapping[uart].pin_rts->peripheral_clock, ENABLE );
/* Configure RTS Pin */
gpio_init_structure.GPIO_Pin = (uint32_t) ( 1 << uart_mapping[uart].pin_rts->number );
gpio_init_structure.GPIO_Mode = GPIO_Mode_AF;
gpio_init_structure.GPIO_OType = GPIO_OType_OD;
gpio_init_structure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init( uart_mapping[uart].pin_rts->bank, &gpio_init_structure );
GPIO_PinAFConfig( uart_mapping[uart].pin_rts->bank, uart_mapping[uart].pin_rts->number, uart_mapping[uart].gpio_af );
}
/* Enable UART peripheral clock */
uart_mapping[uart].usart_peripheral_clock_func( uart_mapping[uart].usart_peripheral_clock, ENABLE );
/**************************************************************************
* Initialise STM32 USART registers
* NOTE:
* - Both transmitter and receiver are disabled until usart_enable_transmitter/receiver is called.
* - Only 1 and 2 stop bits are implemented at the moment.
**************************************************************************/
usart_init_structure.USART_Mode = 0;
usart_init_structure.USART_BaudRate = config->baud_rate;
usart_init_structure.USART_WordLength = ( ( config->data_width == DATA_WIDTH_9BIT ) ||
( ( config->data_width == DATA_WIDTH_8BIT ) && ( config->parity != NO_PARITY ) ) ) ? USART_WordLength_9b : USART_WordLength_8b;
usart_init_structure.USART_StopBits = ( config->stop_bits == STOP_BITS_1 ) ? USART_StopBits_1 : USART_StopBits_2;
switch ( config->parity )
{
case NO_PARITY:
usart_init_structure.USART_Parity = USART_Parity_No;
break;
case EVEN_PARITY:
usart_init_structure.USART_Parity = USART_Parity_Even;
break;
case ODD_PARITY:
usart_init_structure.USART_Parity = USART_Parity_Odd;
break;
default:
return kParamErr;
}
switch ( config->flow_control )
{
case FLOW_CONTROL_DISABLED:
usart_init_structure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
break;
case FLOW_CONTROL_CTS:
usart_init_structure.USART_HardwareFlowControl = USART_HardwareFlowControl_CTS;
break;
case FLOW_CONTROL_RTS:
usart_init_structure.USART_HardwareFlowControl = USART_HardwareFlowControl_RTS;
break;
case FLOW_CONTROL_CTS_RTS:
usart_init_structure.USART_HardwareFlowControl = USART_HardwareFlowControl_RTS_CTS;
break;
default:
return kParamErr;
}
/* Initialise USART peripheral */
USART_Init( uart_mapping[uart].usart, &usart_init_structure );
/**************************************************************************
* Initialise STM32 DMA registers
* Note: If DMA is used, USART interrupt isn't enabled.
**************************************************************************/
/* Enable DMA peripheral clock */
uart_mapping[uart].tx_dma_peripheral_clock_func( uart_mapping[uart].tx_dma_peripheral_clock, ENABLE );
uart_mapping[uart].rx_dma_peripheral_clock_func( uart_mapping[uart].rx_dma_peripheral_clock, ENABLE );
/* Fill init structure with common DMA settings */
dma_init_structure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
dma_init_structure.DMA_MemoryInc = DMA_MemoryInc_Enable;
dma_init_structure.DMA_Priority = DMA_Priority_VeryHigh;
dma_init_structure.DMA_FIFOMode = DMA_FIFOMode_Disable;
dma_init_structure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
dma_init_structure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
dma_init_structure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
if ( config->data_width == DATA_WIDTH_9BIT )
{
dma_init_structure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
dma_init_structure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
}
else
{
dma_init_structure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
dma_init_structure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
}
/* Initialise TX DMA */
DMA_DeInit( uart_mapping[uart].tx_dma_stream );
dma_init_structure.DMA_Channel = uart_mapping[uart].tx_dma_channel;
dma_init_structure.DMA_PeripheralBaseAddr = (uint32_t) &uart_mapping[uart].usart->DR;
dma_init_structure.DMA_Memory0BaseAddr = (uint32_t) 0;
dma_init_structure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
dma_init_structure.DMA_BufferSize = 0;
dma_init_structure.DMA_Mode = DMA_Mode_Normal;
DMA_Init( uart_mapping[uart].tx_dma_stream, &dma_init_structure );
/* Initialise RX DMA */
DMA_DeInit( uart_mapping[uart].rx_dma_stream );
dma_init_structure.DMA_Channel = uart_mapping[uart].rx_dma_channel;
dma_init_structure.DMA_PeripheralBaseAddr = (uint32_t) &uart_mapping[uart].usart->DR;
dma_init_structure.DMA_Memory0BaseAddr = 0;
dma_init_structure.DMA_DIR = DMA_DIR_PeripheralToMemory;
dma_init_structure.DMA_BufferSize = 0;
dma_init_structure.DMA_Mode = DMA_Mode_Normal;
DMA_Init( uart_mapping[uart].rx_dma_stream, &dma_init_structure );
/**************************************************************************
* Initialise STM32 DMA interrupts
* Note: Only TX DMA interrupt is enabled.
**************************************************************************/
/* Configure TX DMA interrupt on Cortex-M3 */
nvic_init_structure.NVIC_IRQChannel = uart_mapping[uart].tx_dma_irq;
nvic_init_structure.NVIC_IRQChannelPreemptionPriority = (uint8_t) 0x5;
nvic_init_structure.NVIC_IRQChannelSubPriority = 0x8;
nvic_init_structure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init( &nvic_init_structure );
/* Enable TC (transfer complete) and TE (transfer error) interrupts on source */
DMA_ITConfig( uart_mapping[uart].tx_dma_stream, DMA_IT_TC | DMA_IT_TE | DMA_IT_DME | DMA_IT_FE, ENABLE );
/* Enable USART's RX DMA interfaces */
USART_DMACmd( uart_mapping[uart].usart, USART_DMAReq_Rx, ENABLE );
/**************************************************************************
* Initialise STM32 USART interrupt
**************************************************************************/
nvic_init_structure.NVIC_IRQChannel = uart_mapping[uart].usart_irq;
nvic_init_structure.NVIC_IRQChannelPreemptionPriority = (uint8_t) 0x6;
nvic_init_structure.NVIC_IRQChannelSubPriority = 0x7;
nvic_init_structure.NVIC_IRQChannelCmd = ENABLE;
/* Enable USART interrupt vector in Cortex-M3 */
NVIC_Init( &nvic_init_structure );
/* Enable USART */
USART_Cmd( uart_mapping[uart].usart, ENABLE );
/* Enable both transmit and receive */
uart_mapping[uart].usart->CR1 |= USART_CR1_TE;
uart_mapping[uart].usart->CR1 |= USART_CR1_RE;
/* Setup ring buffer */
if (optional_rx_buffer != NULL)
{
/* Note that the ring_buffer should've been initialised first */
uart_interfaces[uart].rx_buffer = optional_rx_buffer;
uart_interfaces[uart].rx_size = 0;
platform_uart_receive_bytes( uart, optional_rx_buffer->buffer, optional_rx_buffer->size, 0 );
}
else
{
/* Not using ring buffer. Configure RX DMA interrupt on Cortex-M3 */
nvic_init_structure.NVIC_IRQChannel = uart_mapping[uart].rx_dma_irq;
nvic_init_structure.NVIC_IRQChannelPreemptionPriority = (uint8_t) 0x5;
nvic_init_structure.NVIC_IRQChannelSubPriority = 0x8;
nvic_init_structure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init( &nvic_init_structure );
/* Enable TC (transfer complete) and TE (transfer error) interrupts on source */
DMA_ITConfig( uart_mapping[uart].rx_dma_stream, DMA_IT_TC | DMA_IT_TE | DMA_IT_DME | DMA_IT_FE, ENABLE );
}
MicoMcuPowerSaveConfig(true);
return kNoErr;
}
/**
* @brief Configures the DCMI/DMA to capture image from the OV9655 camera.
* @param ImageFormat: Image format BMP or JPEG
* @param BMPImageSize: BMP Image size
* @retval None
*/
void OV9655_Init(ImageFormat_TypeDef ImageFormat)
{
DCMI_InitTypeDef DCMI_InitStructure;
DMA_InitTypeDef DMA_InitStructure;
NVIC_InitTypeDef NVIC_InitStructure;
/*** Configures the DCMI to interface with the OV9655 camera module ***/
/* Enable DCMI clock */
RCC_AHB2PeriphClockCmd(RCC_AHB2Periph_DCMI, ENABLE);
/* DCMI configuration */
DCMI_InitStructure.DCMI_CaptureMode = DCMI_CaptureMode_Continuous;
DCMI_InitStructure.DCMI_SynchroMode = DCMI_SynchroMode_Hardware;
DCMI_InitStructure.DCMI_PCKPolarity = DCMI_PCKPolarity_Falling;
DCMI_InitStructure.DCMI_VSPolarity = DCMI_VSPolarity_High;
DCMI_InitStructure.DCMI_HSPolarity = DCMI_HSPolarity_High;
DCMI_InitStructure.DCMI_CaptureRate = DCMI_CaptureRate_All_Frame;
DCMI_InitStructure.DCMI_ExtendedDataMode = DCMI_ExtendedDataMode_8b;
/* Configures the DMA2 to transfer Data from DCMI */
/* Enable DMA2 clock */
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE);
/* DMA2 Stream1 Configuration */
DMA_DeInit(DMA2_Stream1);
DMA_InitStructure.DMA_Channel = DMA_Channel_1;
DMA_InitStructure.DMA_PeripheralBaseAddr = DCMI_DR_ADDRESS;
DMA_InitStructure.DMA_Memory0BaseAddr = 0x20000000;//FSMC_LCD_ADDRESS;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
DMA_InitStructure.DMA_BufferSize = (320 * 240 * 2 / 4) / 16;//1
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;//DMA_MemoryInc_Disable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;//DMA_Mode_Circular;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Enable;
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_1);
NVIC_InitStructure.NVIC_IRQChannel = DMA2_Stream1_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 2;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
//NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
NVIC_InitStructure.NVIC_IRQChannel = DCMI_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 2;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
switch(ImageFormat)
{
case BMP_QQVGA:
{
/* DCMI configuration */
DCMI_Init(&DCMI_InitStructure);
/* DMA2 IRQ channel Configuration */
DMA_Init(DMA2_Stream1, &DMA_InitStructure);
DMA_ITConfig( DMA2_Stream1, DMA_IT_TC, ENABLE);
break;
}
case BMP_QVGA:
{
/* DCMI configuration */
DCMI_Init(&DCMI_InitStructure);
/* DMA2 IRQ channel Configuration */
DMA_Init(DMA2_Stream1, &DMA_InitStructure);
DMA_ITConfig( DMA2_Stream1, DMA_IT_TC, ENABLE);
break;
}
default:
{
/* DCMI configuration */
DCMI_Init(&DCMI_InitStructure);
/* DMA2 IRQ channel Configuration */
DMA_Init(DMA2_Stream1, &DMA_InitStructure);
break;
}
}
DCMI_ITConfig(DCMI_IT_FRAME, ENABLE);
DCMI_ITConfig(DCMI_IT_OVF, ENABLE);
DCMI_ITConfig(DCMI_IT_ERR, ENABLE);
DCMI_ITConfig(DCMI_IT_VSYNC, ENABLE);
}
static void max7456_send_dma(void* tx_buffer, void* rx_buffer, uint16_t buffer_size) {
DMA_InitTypeDef DMA_InitStructure;
#ifdef MAX7456_DMA_CHANNEL_RX
static uint16_t dummy[] = {0xffff};
#else
UNUSED(rx_buffer);
#endif
while (dma_transaction_in_progress); // Wait for prev DMA transaction
DMA_DeInit(MAX7456_DMA_CHANNEL_TX);
#ifdef MAX7456_DMA_CHANNEL_RX
DMA_DeInit(MAX7456_DMA_CHANNEL_RX);
#endif
// Common to both channels
DMA_StructInit(&DMA_InitStructure);
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)(&(MAX7456_SPI_INSTANCE->DR));
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_BufferSize = buffer_size;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
DMA_InitStructure.DMA_Priority = DMA_Priority_Low;
#ifdef MAX7456_DMA_CHANNEL_RX
// Rx Channel
#ifdef STM32F4
DMA_InitStructure.DMA_Memory0BaseAddr = rx_buffer ? (uint32_t)rx_buffer : (uint32_t)(dummy);
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
#else
DMA_InitStructure.DMA_MemoryBaseAddr = rx_buffer ? (uint32_t)rx_buffer : (uint32_t)(dummy);
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
#endif
DMA_InitStructure.DMA_MemoryInc = rx_buffer ? DMA_MemoryInc_Enable : DMA_MemoryInc_Disable;
DMA_Init(MAX7456_DMA_CHANNEL_RX, &DMA_InitStructure);
DMA_Cmd(MAX7456_DMA_CHANNEL_RX, ENABLE);
#endif
// Tx channel
#ifdef STM32F4
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)tx_buffer; //max7456_screen;
DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
#else
DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)tx_buffer; //max7456_screen;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
#endif
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_Init(MAX7456_DMA_CHANNEL_TX, &DMA_InitStructure);
DMA_Cmd(MAX7456_DMA_CHANNEL_TX, ENABLE);
#ifdef MAX7456_DMA_CHANNEL_RX
DMA_ITConfig(MAX7456_DMA_CHANNEL_RX, DMA_IT_TC, ENABLE);
#else
DMA_ITConfig(MAX7456_DMA_CHANNEL_TX, DMA_IT_TC, ENABLE);
#endif
// Enable SPI TX/RX request
ENABLE_MAX7456;
dma_transaction_in_progress = 1;
SPI_I2S_DMACmd(MAX7456_SPI_INSTANCE,
#ifdef MAX7456_DMA_CHANNEL_RX
SPI_I2S_DMAReq_Rx |
#endif
SPI_I2S_DMAReq_Tx, ENABLE);
}
void adc_configure(){
ADC_InitTypeDef ADC_init_structure;
GPIO_InitTypeDef GPIO_initStructre;
DMA_InitTypeDef DMA_InitStructure;
NVIC_InitTypeDef NVIC_InitStructure;
// Clock configuration
RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1,ENABLE);
RCC_AHB1PeriphClockCmd(RCC_AHB1ENR_GPIOCEN,ENABLE);
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE);
// Analog pin configuration
GPIO_initStructre.GPIO_Pin = GPIO_Pin_0; // ADC Channel 10 is connected to PC0
GPIO_initStructre.GPIO_Mode = GPIO_Mode_AN;
GPIO_initStructre.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init(GPIOC,&GPIO_initStructre);
// ADC structure configuration
ADC_DeInit();
ADC_init_structure.ADC_DataAlign = ADC_DataAlign_Left;
ADC_init_structure.ADC_Resolution = ADC_Resolution_12b;
ADC_init_structure.ADC_ContinuousConvMode = DISABLE;
ADC_init_structure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC3;
ADC_init_structure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_Rising;
ADC_init_structure.ADC_NbrOfConversion = 1;
ADC_init_structure.ADC_ScanConvMode = DISABLE;
ADC_Init(ADCx,&ADC_init_structure);
// Select the channel to be read from
ADC_RegularChannelConfig(ADCx,ADC_Channel_10,1,ADC_SampleTime_144Cycles);
/* DMA configuration **************************************/
DMA_DeInit(DMA_STREAMx);
DMA_InitStructure.DMA_Channel = DMA_CHANNELx;
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)ADCx_DR_ADDRESS;
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)adc_buf;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
DMA_InitStructure.DMA_BufferSize = ADC_BUF_SZ;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(DMA_STREAMx, &DMA_InitStructure);
/* Enable DMA request after last transfer (Single-ADC mode) */
ADC_DMARequestAfterLastTransferCmd(ADCx, ENABLE);
/* Enable ADC1 DMA */
ADC_DMACmd(ADCx, ENABLE);
/* DMA2_Stream0 enable */
DMA_Cmd(DMA_STREAMx, ENABLE);
/* Enable DMA Half & Complete interrupts */
DMA_ITConfig(DMA2_Stream0, DMA_IT_TC | DMA_IT_HT, ENABLE);
/* Enable the DMA Stream IRQ Channel */
NVIC_InitStructure.NVIC_IRQChannel = DMA2_Stream0_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
// Enable ADC conversion
ADC_Cmd(ADC1,ENABLE);
}
void USART_DMA_Config(USART_TypeDef *USARTx, u32 SendBuff)
{
DMA_Channel_TypeDef *DMAy_Channelx;
// uint8_t DMAy_Channelx_IRQn;
DMA_InitTypeDef DMA_InitStructure;
//NVIC_InitTypeDef NVIC_InitStructure;
assert_param(IS_USART_ALL_PERIPH(USARTx));
if (USARTx == USART1)
{
DMAy_Channelx = DMA1_Channel4;
// DMAy_Channelx_IRQn = DMA1_Channel4_IRQn;
}
else if (USARTx == USART2)
{
DMAy_Channelx = DMA1_Channel7;
// DMAy_Channelx_IRQn = DMA1_Channel7_IRQn;
}
else if (USARTx == USART3)
{
DMAy_Channelx = DMA1_Channel2;
// DMAy_Channelx_IRQn = DMA1_Channel2_IRQn;
}
DMA_DeInit(DMAy_Channelx); //½«DMAµÄͨµÀ1¼Ä´æÆ÷ÖØÉèΪȱʡֵ
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE); //开启DMA时钟
//NVIC_Config(); //配置DMA中断
// NVIC_InitStructure.NVIC_IRQChannel = DMAy_Channelx_IRQn;
// NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
// NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
// NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
// NVIC_Init(&NVIC_InitStructure);
/*设置DMA源：内存地址&串口数据寄存器地址*/
//DMA_InitStructure.DMA_PeripheralBaseAddr = USART1_DR_Base;
DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)&USARTx->DR;
/*内存地址(要传输的变量的指针)*/
DMA_InitStructure.DMA_MemoryBaseAddr = (u32)SendBuff;
/*方向：从内存到外设*/
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
/*传输大小DMA_BufferSize=SENDBUFF_SIZE*/
DMA_InitStructure.DMA_BufferSize = sizeof(SendBuff);//SENDBUFF_SIZE;
/*外设地址不增*/
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
/*内存地址自增*/
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
/*外设数据单位*/
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
/*内存数据单位 8bit*/
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
/*DMA模式：一次传输，循环*/
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal ;
/*优先级：中*/
DMA_InitStructure.DMA_Priority = DMA_Priority_Medium;
/*禁止内存到内存的传输 */
DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
/*配置DMA1的4通道*/
DMA_Init(DMAy_Channelx, &DMA_InitStructure);
//DMA_Cmd (DMAy_Channelx, ENABLE); //使能DMA
DMA_ITConfig(DMAy_Channelx, DMA_IT_TC, ENABLE); //配置DMA发送完成后产生中断
USART_DMACmd(USARTx, USART_DMAReq_Tx, ENABLE); //使能串口1的DMA发送
}
void dma_usart2_irq_enable(){
DMA_ITConfig(DMA1_Channel4,DMA_IT_TC,ENABLE);
}
