void spi_screenreg_param(u8 Param) { u32 i; u32 control_bit; CS_CLR(); control_bit = 0x0100; Param = (control_bit | Param); //printk("data0 is 0x%x \n", Data); for(i = 0; i < 9; i++) //data { if(Param &(1<<(8-i))) TXD_SET(); else TXD_CLR(); // \u6a21\u62dfCLK CLK_SET(); DRVDelayUs(2); CLK_CLR(); DRVDelayUs(2); } CS_SET(); CLK_CLR(); TXD_CLR(); DRVDelayUs(10); }
void spi_screenreg_set(u32 Addr, u32 Data) { u32 i; TXD_OUT(); CLK_OUT(); CS_OUT(); DRVDelayUs(2); DRVDelayUs(2); CS_SET(); TXD_CLR(); CLK_CLR(); DRVDelayUs(2); CS_CLR(); for(i = 0; i < 7; i++) //reg { if(Addr &(1<<(6-i))) TXD_SET(); else TXD_CLR(); // \u6a21\u62dfCLK CLK_CLR(); DRVDelayUs(2); CLK_SET(); DRVDelayUs(2); } TXD_CLR(); //write // \u6a21\u62dfCLK CLK_CLR(); DRVDelayUs(2); CLK_SET(); DRVDelayUs(2); for(i = 0; i < 8; i++) //data { if(Data &(1<<(7-i))) TXD_SET(); else TXD_CLR(); // \u6a21\u62dfCLK CLK_CLR(); DRVDelayUs(2); CLK_SET(); DRVDelayUs(2); } CS_SET(); CLK_CLR(); TXD_CLR(); DRVDelayUs(2); }
/* 固定GPIOA_0口作为烧写检测口,系统部分不能使用该口 */ int GetPortState(key_config *key) { #ifndef RK_LOADER_FOR_FT uint32 tt; uint32 hCnt = 0; gpio_conf* gpio = &key->key.gpio; adc_conf* adc = &key->key.adc; if(key->type == KEY_GPIO) { // TODO: 按键没有处理 #if 1 // set direction as input write_XDATA32( gpio->io_dir_conf, (read_XDATA32(gpio->io_dir_conf)&(~(1ul<<gpio->index)))); // enable debounce write_XDATA32((gpio->io_debounce), (read_XDATA32(gpio->io_debounce)|((1ul<<gpio->index)))); for(tt = 0; tt < 100; tt++) { // read special gpio port value. uint32 value = read_XDATA32(gpio->io_read); if( ((value>>gpio->index)&0x01) == gpio->valid ) hCnt++; DRVDelayUs(1); } return (hCnt>80); #endif }
void spi_screenreg_cmd(u8 Addr) { u32 i; u32 control_bit; TXD_OUT(); CLK_OUT(); CS_OUT(); DRVDelayUs(2); DRVDelayUs(2); CS_SET(); TXD_SET(); CLK_CLR(); DRVDelayUs(30); CS_CLR(); control_bit = 0x0000; Addr = (control_bit | Addr);//spi_screenreg_set(0x36, 0x0000, 0xffff); //printk("addr is 0x%x \n", Addr); for(i = 0; i < 9; i++) //reg { if(Addr &(1<<(8-i))) TXD_SET(); else TXD_CLR(); // \u6a21\u62dfCLK CLK_SET(); DRVDelayUs(2); CLK_CLR(); DRVDelayUs(2); } CS_SET(); TXD_SET(); CLK_CLR(); DRVDelayUs(10); }
/*************************************************************************** 函数描述:延时 入口参数:ms数 出口参数: 调用函数: ***************************************************************************/ void DRVDelayMs(uint32 count) { DRVDelayUs(1000*count); }
void spi_screenreg_set(u32 Addr, u32 Data) { #define DRVDelayUs(i) udelay(i*2) u32 i; TXD_OUT(); CLK_OUT(); CS_OUT(); DRVDelayUs(2); DRVDelayUs(2); CS_SET(); TXD_SET(); CLK_SET(); DRVDelayUs(2); CS_CLR(); for(i = 0; i < 6; i++) //reg { if(Addr &(1<<(5-i))) TXD_SET(); else TXD_CLR(); // \u6a21\u62dfCLK CLK_CLR(); DRVDelayUs(2); CLK_SET(); DRVDelayUs(2); } TXD_CLR(); //write // \u6a21\u62dfCLK CLK_CLR(); DRVDelayUs(2); CLK_SET(); DRVDelayUs(2); TXD_SET(); //highz // \u6a21\u62dfCLK CLK_CLR(); DRVDelayUs(2); CLK_SET(); DRVDelayUs(2); for(i = 0; i < 8; i++) //data { if(Data &(1<<(7-i))) TXD_SET(); else TXD_CLR(); // \u6a21\u62dfCLK CLK_CLR(); DRVDelayUs(2); CLK_SET(); DRVDelayUs(2); } CS_SET(); CLK_CLR(); TXD_CLR(); DRVDelayUs(2); }
void spi_screenreg_set(u32 Addr, u32 Data) { #define DRVDelayUs(i) udelay(i*2) u32 i; u32 control_bit; TXD_OUT(); CLK_OUT(); CS_OUT(); DRVDelayUs(2); DRVDelayUs(2); CS_SET(); TXD_SET(); CLK_SET(); DRVDelayUs(2); CS_CLR(); control_bit = 0x70<<8; Addr = (control_bit | Addr); //printk("addr is 0x%x \n", Addr); for(i = 0; i < 16; i++) //reg { if(Addr &(1<<(15-i))) TXD_SET(); else TXD_CLR(); // \u6a21\u62dfCLK CLK_CLR(); DRVDelayUs(2); CLK_SET(); DRVDelayUs(2); } CS_SET(); TXD_SET(); CLK_SET(); DRVDelayUs(2); CS_CLR(); control_bit = 0x72<<8; Data = (control_bit | Data); //printk("data is 0x%x \n", Data); for(i = 0; i < 16; i++) //data { if(Data &(1<<(15-i))) TXD_SET(); else TXD_CLR(); // \u6a21\u62dfCLK CLK_CLR(); DRVDelayUs(2); CLK_SET(); DRVDelayUs(2); } CS_SET(); CLK_CLR(); TXD_CLR(); DRVDelayUs(2); }
void spi_screenreg_set(uint32 Addr, uint32 Data) { #define CS_OUT() GPIOSetPinDirection(GPIOPortB_Pin3, GPIO_OUT) #define CS_SET() GPIOSetPinLevel(GPIOPortB_Pin3, GPIO_HIGH) #define CS_CLR() GPIOSetPinLevel(GPIOPortB_Pin3, GPIO_LOW) #define CLK_OUT() GPIOSetPinDirection(GPIOPortE_Pin5, GPIO_OUT) //I2C0_SCL #define CLK_SET() GPIOSetPinLevel(GPIOPortE_Pin5, GPIO_HIGH) #define CLK_CLR() GPIOSetPinLevel(GPIOPortE_Pin5, GPIO_LOW) #define TXD_OUT() GPIOSetPinDirection(GPIOPortE_Pin4, GPIO_OUT) //I2C0_SDA #define TXD_SET() GPIOSetPinLevel(GPIOPortE_Pin4, GPIO_HIGH) #define TXD_CLR() GPIOSetPinLevel(GPIOPortE_Pin4, GPIO_LOW) #define DRVDelayUs(i) udelay(i*2) uint32 i; TXD_OUT(); CLK_OUT(); CS_OUT(); DRVDelayUs(2); DRVDelayUs(2); CS_SET(); TXD_CLR(); CLK_CLR(); DRVDelayUs(2); CS_CLR(); for(i = 0; i < 7; i++) //reg { if(Addr &(1<<(6-i))) TXD_SET(); else TXD_CLR(); // \u6a21\u62dfCLK CLK_CLR(); DRVDelayUs(2); CLK_SET(); DRVDelayUs(2); } TXD_CLR(); //write // \u6a21\u62dfCLK CLK_CLR(); DRVDelayUs(2); CLK_SET(); DRVDelayUs(2); for(i = 0; i < 8; i++) //data { if(Data &(1<<(7-i))) TXD_SET(); else TXD_CLR(); // \u6a21\u62dfCLK CLK_CLR(); DRVDelayUs(2); CLK_SET(); DRVDelayUs(2); } CS_SET(); CLK_CLR(); TXD_CLR(); DRVDelayUs(2); }
//void spi_screenreg_set(uint32 Addr, uint32 Data) void spi_screenreg_set(u32 Data) { u32 i; TXD_OUT(); CLK_OUT(); CS_OUT(); DRVDelayUs(2); DRVDelayUs(2); CS_SET(); TXD_SET(); CLK_SET(); DRVDelayUs(2); CS_CLR(); for(i = 0; i < 16; i++) //reg { if(Data &(1<<(15-i))) TXD_SET(); else TXD_CLR(); // \u6a21\u62dfCLK CLK_CLR(); DRVDelayUs(2); CLK_SET(); DRVDelayUs(2); } /* TXD_CLR(); //write // \u6a21\u62dfCLK CLK_CLR(); DRVDelayUs(2); CLK_SET(); DRVDelayUs(2); TXD_SET(); //highz // \u6a21\u62dfCLK CLK_CLR(); DRVDelayUs(2); CLK_SET(); DRVDelayUs(2); //for(i = 0; i < 8; i++) //data for(i = 0; i < 16; i++) { if(Data &(1<<(15-i))) TXD_SET(); else TXD_CLR(); // \u6a21\u62dfCLK CLK_CLR(); DRVDelayUs(2); CLK_SET(); DRVDelayUs(2); } */ CS_SET(); CLK_CLR(); TXD_CLR(); DRVDelayUs(2); }