void dsim_reg_set_porch(struct decon_lcd *lcd)
{
	u32 val, mask, width, height;

	if (lcd->mode == VIDEO_MODE) {
		val = DSIM_MVPORCH_CMD_ALLOW(DSIM_CMD_ALLOW_VALUE) |
			DSIM_MVPORCH_STABLE_VFP(DSIM_STABLE_VFP_VALUE) |
			DSIM_MVPORCH_VBP(lcd->vbp);
		mask = DSIM_MVPORCH_CMD_ALLOW_MASK | DSIM_MVPORCH_VBP_MASK |
			DSIM_MVPORCH_STABLE_VFP_MASK;
		dsim_write_mask(DSIM_MVPORCH, val, mask);

		val = DSIM_MHPORCH_HFP(lcd->hfp) | DSIM_MHPORCH_HBP(lcd->hbp);
		dsim_write(DSIM_MHPORCH, val);

		val = DSIM_MSYNC_VSA(lcd->vsa) | DSIM_MSYNC_HSA(lcd->hsa);
		mask = DSIM_MSYNC_VSA_MASK | DSIM_MSYNC_HSA_MASK;
		dsim_write_mask(DSIM_MSYNC, val, mask);
	}

	width = GET_W(lcd->hsync_2h_cycle, lcd->xres);
	height = GET_H(lcd->hsync_2h_cycle, lcd->yres);

	val = DSIM_MDRESOL_VRESOL(height) | DSIM_MDRESOL_HRESOL(width);
	mask = DSIM_MDRESOL_VRESOL_MASK | DSIM_MDRESOL_HRESOL_MASK;
	dsim_write_mask(DSIM_MDRESOL, val, mask);
}
Ejemplo n.º 2
0
void dsim_reg_set_porch(u32 id, struct decon_lcd *lcd)
{
	u32 val, mask, width;

	if (lcd->mode == DECON_VIDEO_MODE) {
		val = DSIM_MVPORCH_CMD_ALLOW(DSIM_CMD_ALLOW_VALUE) |
			DSIM_MVPORCH_STABLE_VFP(DSIM_STABLE_VFP_VALUE) |
			DSIM_MVPORCH_VBP(lcd->vbp);
		mask = DSIM_MVPORCH_CMD_ALLOW_MASK | DSIM_MVPORCH_VBP_MASK |
			DSIM_MVPORCH_STABLE_VFP_MASK;
		dsim_write_mask(id, DSIM_MVPORCH, val, mask);

		val = DSIM_MHPORCH_HFP(lcd->hfp) | DSIM_MHPORCH_HBP(lcd->hbp);
		dsim_write(id, DSIM_MHPORCH, val);

		val = DSIM_MSYNC_VSA(lcd->vsa) | DSIM_MSYNC_HSA(lcd->hsa);
		mask = DSIM_MSYNC_VSA_MASK | DSIM_MSYNC_HSA_MASK;
		dsim_write_mask(id, DSIM_MSYNC, val, mask);
	}

	if (lcd->mic_enabled)
		width = (lcd->xres/3) + (lcd->xres % 4);
	else
		width = lcd->xres;

	/* TODO: will be added SHADOW_EN in EVT1 */
	val = DSIM_MDRESOL_VRESOL(lcd->yres) | DSIM_MDRESOL_HRESOL(width);
	mask = DSIM_MDRESOL_VRESOL_MASK | DSIM_MDRESOL_HRESOL_MASK;
	dsim_write_mask(id, DSIM_MDRESOL, val, mask);
}
Ejemplo n.º 3
0
void dsim_reg_set_porch(u32 id, struct decon_lcd *lcd)
{
	u32 val, mask, width;

	if (lcd->mode == DECON_VIDEO_MODE) {
		val = DSIM_MVPORCH_CMD_ALLOW(DSIM_CMD_ALLOW_VALUE) |
			DSIM_MVPORCH_STABLE_VFP(DSIM_STABLE_VFP_VALUE) |
			DSIM_MVPORCH_VBP(lcd->vbp);
		mask = DSIM_MVPORCH_CMD_ALLOW_MASK | DSIM_MVPORCH_VBP_MASK |
			DSIM_MVPORCH_STABLE_VFP_MASK;
		dsim_write_mask(id, DSIM_MVPORCH, val, mask);

		val = DSIM_MHPORCH_HFP(lcd->hfp) | DSIM_MHPORCH_HBP(lcd->hbp);
		dsim_write(id, DSIM_MHPORCH, val);

		val = DSIM_MSYNC_VSA(lcd->vsa) | DSIM_MSYNC_HSA(lcd->hsa);
		mask = DSIM_MSYNC_VSA_MASK | DSIM_MSYNC_HSA_MASK;
		dsim_write_mask(id, DSIM_MSYNC, val, mask);
	}

	if (lcd->mic_enabled)
		width = (lcd->xres >> 1) + (lcd->xres % 4);
	else