void SaveGains(){
uint8_t calibrationFlags;
uint16_t j = GAINS_START;
float_u outFloat;
j = GAINS_START;
for (uint16_t i = KP_PITCH_RATE_; i <= FC_CT_; i++) {
outFloat.val = *floatPointerArray[i];
EEPROMWrite(j++, outFloat.buffer[0]);
EEPROMWrite(j++, outFloat.buffer[1]);
EEPROMWrite(j++, outFloat.buffer[2]);
EEPROMWrite(j++, outFloat.buffer[3]);
}
j = DEC_START;
outFloat.val = *floatPointerArray[MAG_DEC_];
EEPROMWrite(j++, outFloat.buffer[0]);
EEPROMWrite(j++, outFloat.buffer[1]);
EEPROMWrite(j++, outFloat.buffer[2]);
EEPROMWrite(j++, outFloat.buffer[3]);
cosDec = cos(declination);
sinDec = sin(declination);
calibrationFlags = EEPROMRead(CAL_FLAGS);
calibrationFlags &= ~(1<<GAINS_FLAG);
EEPROMWrite(CAL_FLAGS,calibrationFlags);
RCFailSafeCounter = 0;
groundFSCount = 0;
GPSFailSafeCounter = 0;
baroFSCount = 0;
watchDogFailSafeCounter = 0;
}
void __fastcall korokoroWriteByte(UINT32 sekAddress, UINT8 byteValue)
{
switch (sekAddress) {
case 0x240001:
YMZ280BSelectRegister(byteValue);
break;
case 0x240003:
YMZ280BWriteRegister(byteValue);
break;
case 0x280008:
case 0x280009:
// leds
break;
case 0x28000a:
korokoro_hopper = byteValue & 0x01;
EEPROMWrite(byteValue & 0x20, byteValue & 0x10, byteValue & 0x40);
break;
// default:
// bprintf(PRINT_NORMAL, "Attempt to write byte value %x to location %x\n", byteValue, sekAddress);
}
}
void SaveEstiamtorGains(){
float_u outFloat;
uint16_t j = EST_GAIN_START;
for(uint16_t i = KP_ACC; i <= K_P_B_BARO; i++){
outFloat.val = *floatPointerArray[i];
EEPROMWrite(j++, outFloat.buffer[0]);
EEPROMWrite(j++, outFloat.buffer[1]);
EEPROMWrite(j++, outFloat.buffer[2]);
EEPROMWrite(j++, outFloat.buffer[3]);
}
RCFailSafeCounter = 0;
groundFSCount = 0;
GPSFailSafeCounter = 0;
baroFSCount = 0;
watchDogFailSafeCounter = 0;
}
void add_TM_key(uint8_t id[8]){
if (tm_key_number < MAX_TM){
led_on(4);
#ifdef DEBUG
send_string_to_UART3("TM: Add key: #");
send_int_to_UART3(tm_key_number);
send_string_to_UART3("\n\r");
#endif
tm_key_number++;
EEPROMWrite(EEPROM_tms_numbers,tm_key_number,1);
int i;
for (i = 0;i<8;i++){
TM_KEY[tm_key_number-1].id[i] = id[i];
EEPROMWrite((EEPROM_tms_id + ((tm_key_number-1)*8) + i),id[i],1);
}
}
}
void SetRCControlESCCalFlag(){
delay(100);//wait for new frame
newRC = false;
while(newRC == false){
}
ProcessChannels();
if (RCValue[THRO] > 1900){
EEPROMWrite(HS_FLAG,0xFF);//clear the handshake flag
EEPROMWrite(ESC_CAL_FLAG,0xAA);
LEDPatternSet(6,6,0,1);
while(1){
}
}
}
void lasat_write_eeprom_info(void)
{
unsigned long crc;
/* Generate the CRC */
crc = EEPROM_CRC((unsigned char *)(&lasat_board_info.li_eeprom_info),
sizeof(struct lasat_eeprom_struct) - 4);
lasat_board_info.li_eeprom_info.crc32 = crc;
/* Write the EEPROM info */
EEPROMWrite(0, (unsigned char *)&lasat_board_info.li_eeprom_info,
sizeof(struct lasat_eeprom_struct));
}
static void OthunderInputBypassWrite(int Offset, unsigned short Data)
{
switch (Offset) {
case 0x03: {
EEPROMWrite(Data & 0x20, Data & 0x10, Data & 0x40);
return;
}
default: {
TC0220IOCWrite(Offset, Data & 0xff);
}
}
}
static void OthunderInputBypassWrite(INT32 Offset, UINT16 Data)
{
switch (Offset) {
case 0x03: {
EEPROMWrite(Data & 0x20, Data & 0x10, Data & 0x40);
return;
}
default: {
TC0220IOCWrite(Offset, Data & 0xff);
}
}
}
void __fastcall korokoroWriteWord(UINT32 sekAddress, UINT16 wordValue)
{
switch (sekAddress) {
case 0x140000:
CaveTileReg[0][0] = wordValue;
break;
case 0x140002:
CaveTileReg[0][1] = wordValue;
break;
case 0x140004:
CaveTileReg[0][2] = wordValue;
break;
case 0x1c0000:
case 0x300000:
nCaveXOffset = wordValue;
return;
case 0x1c0002:
case 0x300002:
nCaveYOffset = wordValue;
return;
case 0x1c0008:
case 0x300008:
CaveSpriteBuffer();
nCaveSpriteBank = wordValue;
return;
case 0x240000:
YMZ280BSelectRegister(wordValue & 0xff);
break;
case 0x240002:
YMZ280BWriteRegister(wordValue & 0xff);
break;
case 0x280008:
return;
case 0x28000a: {
wordValue >>= 8;
korokoro_hopper = wordValue & 0x01;
EEPROMWrite(wordValue & 0x20, wordValue & 0x10, wordValue & 0x40);
break;
}
// default:
// bprintf(PRINT_NORMAL, "Attempt to write word value %x to location %x\n", wordValue, sekAddress);
}
}
void __fastcall hotdogstWriteByte(UINT32 sekAddress, UINT8 byteValue)
{
switch (sekAddress) {
if (~byteValue & 0x0100) {
case 0xd00000:
EEPROMWrite(byteValue & 0x04, byteValue & 0x02, byteValue & 0x08);
break;
}
default: {
bprintf(PRINT_NORMAL, _T("Attempt to write byte value %x to location %x\n"), byteValue, sekAddress);
}
}
}
void process_eeprom_write(void){
WORD packet_length,i,c;
if( !( EP2468STAT & 0x01 )){// EP2 FIFO NOT empty, host sent packet
FIFORESET = 0x80; SYNCDELAY;
packet_length = (EP2BCH << 8) | EP2BCL;
i = 0;
while(i < packet_length){
if((packet_length - i) >= 32){
EEPROMWrite(eeprom_addr, 32, &EP2FIFOBUF[i]);
i += 32;
eeprom_addr += 32;
}
else {
c = packet_length - i;
EEPROMWrite(eeprom_addr, (BYTE)c, &EP2FIFOBUF[i]);
i += c;
eeprom_addr += c;
}
}
FIFORESET = 0x00; SYNCDELAY;
OUTPKTEND = 0x82; // SKIP=1, do NOT pass buffer on to master
}
}
void __fastcall ps5_write_byte(unsigned int address, unsigned char data)
{
address &= 0xc7ffffff;
if ((address & 0xfffffe00) == 0x4050000) {
address ^= 3;
DrvZoomRAM[address & 0x1ff] = data;
return;
}
if ((address & 0xffffffe0) == 0x405ffe0) {
address ^= 3;
DrvVidRegs[address & 0x1f] = data;
DrvZoomRAM[address & 0xffff] = data;
if ((address & 0x1c) == 0x10) {
graphics_bank();
}
return;
}
switch (address)
{
case 0x405ffdd:
if (!(data & 0xc0)) Sh2SetIRQLine(4, SH2_IRQSTATUS_NONE);
return;
case 0x3100000:
case 0x3100002:
case 0x3100004:
case 0x3100006:
BurnYMF278BSelectRegister((address >> 1) & 3, data);
return;
case 0x3100001:
case 0x3100003:
case 0x3100005:
case 0x3100007:
BurnYMF278BWriteRegister((address >> 1) & 3, data);
return;
case 0x3000004:
EEPROMWrite((data & 0x40), (data & 0x80), (data & 0x20));
return;
}
}
//
// SetupInit - Initialize setup at system start
//
// Inputs: None.
//
// Outputs: None.
//
void SetupInit(void) {
EEPROMInit();
//
// If uninitialized, or if version mismatch (we're the newer version), initialize
// with defaults
//
if( EEPROM.Version != EEPROM_CURR_VERSION ) {
for( CurrSetup = 0; CurrSetup < MAX_SETUPS; CurrSetup++ )
memcpy_P(&EEPROM.Setups[CurrSetup],&SetupDefaults,sizeof(SetupDefaults));
EEPROM.Version = EEPROM_CURR_VERSION;
EEPROMWrite();
}
LoadSetup(0);
}
void CompleteESCCalibration(){
DDRE |= B00111000;
DDRH |= B00111000;
DDRB |= B01100000;
TCCR3A = (1<<WGM31)|(1<<COM3A1)|(1<<COM3B1)|(1<<COM3C1);
TCCR3B = (1<<WGM33)|(1<<WGM32)|(1<<CS31);
ICR3 = PERIOD;
TCCR4A = (1<<WGM41)|(1<<COM4A1)|(1<<COM4B1)|(1<<COM4C1);
TCCR4B = (1<<WGM43)|(1<<WGM42)|(1<<CS41);
ICR4 = PERIOD;
TCCR1A = (1<<WGM11)|(1<<COM1A1)|(1<<COM1B1);
TCCR1B = (1<<WGM13)|(1<<WGM12)|(1<<CS11);
ICR1 = PERIOD;
Motor1WriteMicros(pwmHigh);//set the output compare value
Motor2WriteMicros(pwmHigh);
Motor3WriteMicros(pwmHigh);
Motor4WriteMicros(pwmHigh);
Motor5WriteMicros(pwmHigh);
Motor6WriteMicros(pwmHigh);
Motor7WriteMicros(pwmHigh);
Motor8WriteMicros(pwmHigh);
delay(ESC_CALIBRATION_DELAY);
Motor1WriteMicros(pwmLow);//set the output compare value
Motor2WriteMicros(pwmLow);
Motor3WriteMicros(pwmLow);
Motor4WriteMicros(pwmLow);
Motor5WriteMicros(pwmLow);
Motor6WriteMicros(pwmLow);
Motor7WriteMicros(pwmLow);
Motor8WriteMicros(pwmLow);
EEPROMWrite(ESC_CAL_FLAG,0xFF);
LEDPatternSet(1,2,2,0);
while(1){
}
}
void __fastcall ddonpachWriteByte(UINT32 sekAddress, UINT8 byteValue)
{
switch (sekAddress) {
case 0x300001:
YMZ280BSelectRegister(byteValue);
return;
case 0x300003:
YMZ280BWriteRegister(byteValue);
return;
case 0xE00000:
EEPROMWrite(byteValue & 0x04, byteValue & 0x02, byteValue & 0x08);
return;
default: {
// bprintf(PRINT_NORMAL, "Attempt to write byte value %x to location %x\n", byteValue, sekAddress);
}
}
}
void CheckESCFlag(){
int16_u outInt16;
uint32_t timeOutTimer = 0;
uint8_t LEDPatternArray[4];
if (EEPROMRead(PWM_FLAG) != 0xAA){
pwmHigh = PWM_HIGH_MAX;
pwmLow = PWM_LOW_MIN;
outInt16.val = pwmHigh;
EEPROMWrite(PWM_LIM_HIGH_START,outInt16.buffer[0]);
EEPROMWrite(PWM_LIM_HIGH_END,outInt16.buffer[1]);
outInt16.val = pwmLow;
EEPROMWrite(PWM_LIM_LOW_START,outInt16.buffer[0]);
EEPROMWrite(PWM_LIM_LOW_END,outInt16.buffer[1]);
EEPROMWrite(PWM_FLAG,0xAA);
}
outInt16.buffer[0] = EEPROMRead(PWM_LIM_HIGH_START);
outInt16.buffer[1] = EEPROMRead(PWM_LIM_HIGH_END);
pwmHigh = outInt16.val;
if (pwmHigh > PWM_HIGH_MAX){
pwmHigh = PWM_HIGH_MAX;
}
if (pwmHigh < PWM_HIGH_MIN){
pwmHigh = PWM_HIGH_MIN;
}
outInt16.buffer[0] = EEPROMRead(PWM_LIM_LOW_START);
outInt16.buffer[1] = EEPROMRead(PWM_LIM_LOW_END);
pwmLow = outInt16.val;
if (pwmLow < PWM_LOW_MIN){
pwmLow = PWM_LOW_MIN;
}
if (pwmLow > PWM_LOW_MAX){
pwmLow = PWM_LOW_MAX;
}
timeOutTimer = millis();
if (EEPROMRead(ESC_CAL_FLAG) == 0xAA){
calibrationMode = false;
if (rcDetected == false){
LEDPatternSet(1,1,0,1);
while(1){
}
}
else{
newRC = false;
while(newRC == false){
}
ProcessChannels();
newRC = false;
}
while(RCValue[THRO] > 1100 || RCValue[AILE] > 1100 || RCValue[ELEV] > 1100 || RCValue[RUDD] > 1100){
if (millis() - timeOutTimer > 60000){
EEPROMWrite(ESC_CAL_FLAG,0xFF);
LEDPatternSet(3,3,3,1);
while(1){
}
}
if (newRC == true){
newRC = false;
ProcessChannels();
if (RCValue[THRO] > 1100 ){
LEDPatternArray[0] = 5;
}
else{
LEDPatternArray[0] = 1;
}
if (RCValue[AILE] > 1100 ){
LEDPatternArray[1] = 5;
}
else{
LEDPatternArray[1] = 1;
}
if (RCValue[ELEV] > 1100 ){
LEDPatternArray[2] = 5;
}
else{
LEDPatternArray[2] = 1;
}
if (RCValue[RUDD] > 1100 ){
LEDPatternArray[3] = 5;
}
else{
LEDPatternArray[3] = 1;
}
LEDPatternSet(LEDPatternArray[0],LEDPatternArray[1],LEDPatternArray[2],LEDPatternArray[3]);
}
}
CompleteESCCalibration();
}
if (EEPROMRead(ESC_CAL_FLAG) == 0xBB){
calibrationMode = false;
calibrateESCs = false;
TryHandShake();
if (handShake == false || calibrationModeESCs == false){
EEPROMWrite(ESC_CAL_FLAG,0xFF);
LEDPatternSet(4,4,4,1);
while(1){
}
}
while(calibrateESCs == false){
if (millis() - timeOutTimer > 60000){
EEPROMWrite(ESC_CAL_FLAG,0xFF);
LEDPatternSet(3,3,3,1);
while(1){
}
}
LEDPatternSet(6,1,1,1);
Radio();
}
if (calibrateESCs == true){
CompleteESCCalibration();
}
}
}
/*******************************************************************************
* Pull EP1 data
*******************************************************************************/
void ep1_pool(void){
BYTE i;
WORD adr;
BYTE new_data = 0;
// Test data for internal test
if(FPGA_INT0 && FPGA_DONE && !prev_done && !cmd_cnt){
EP8FIFOCFG = 0x00; SYNCDELAY;
FIFORESET = 0x08; SYNCDELAY;
FIFORESET = 0x00; SYNCDELAY;
EP8FIFOBUF[0] = 0x12;
EP8FIFOBUF[1] = 0x34;
EP8FIFOBUF[2] = 0x56;
EP8FIFOBUF[3] = 0x78;
EP8FIFOBUF[4] = 0x90;
EP8FIFOBUF[5] = 0xAB;
EP8FIFOBUF[6] = 0xCD;
EP8FIFOBUF[7] = 0xEF;
EP8BCH = 0;
EP8BCL = 8;
EP8FIFOCFG = 0x10; SYNCDELAY;
prev_done = 1;
}
if( !( EP1OUTCS & 0x02) ){ // Got something
cmd_cnt++;
for (i = 0; i < 0x40; i++)
EP1INBUF[i] = 0xFF; // fill output buffer
switch(EP1OUTBUF[0]){ // Decode command
//-----------------------------------------------------------------
default:
case CMD_READ_VERSION:
EP1INBUF[0] = fx2_ver_maj_;
EP1INBUF[1] = fx2_ver_min_;
EP1INBUF[2] = fx2_tip_maj_;
EP1INBUF[3] = fx2_tip_min_;
new_data = 1;
break;
//-----------------------------------------------------------------
case CMD_SET_AUTORESPONSE:
sts_int_auto_configured = 1;
iar_adress = EP1OUTBUF[1];
iar_count = EP1OUTBUF[2];
iar_int_idx = 0;
new_data = 1;
break;
//-----------------------------------------------------------------
case CMD_GET_AUTORESPONSE:
EP1INBUF[0] = iar_int_idx;
for(i = 0; i < 32; i++)
EP1INBUF[i+1] = auto_response_data[i];
iar_int_idx = 0;
new_data = 1;
break;
//-----------------------------------------------------------------
case CMD_SWITCH_MODE:
sts_current_mode = 1;
new_data = 1;
EP1INBUF[0] = EP1OUTBUF[1];
break;
//-----------------------------------------------------------------
case CMD_READ_STATUS:
sts_flash_busy = get_flash_busy();
sts_booting = FPGA_DONE;
sts_fpga_prog = 0xaa;
sts_high_speed_mode = (USBCS & bmHSM) ? 1 : 255;
new_data = 1;
EP1INBUF[0] = sts_fifo_error;
EP1INBUF[1] = sts_current_mode;
EP1INBUF[2] = sts_flash_busy;
EP1INBUF[3] = sts_fpga_prog;
EP1INBUF[4] = sts_booting;
EP1INBUF[5] = sts_i2c_new_data;
EP1INBUF[6] = sts_int_auto_configured;
EP1INBUF[7] = sts_high_speed_mode;
sts_i2c_new_data = 0;
break;
//-----------------------------------------------------------------
case CMD_RESET_FIFO_STATUS:
sts_fifo_error = 0;
FIFORESET = 0x80; SYNCDELAY; // NAK all requests from host.
switch(EP1OUTBUF[1]){
case 2:
EP2FIFOCFG = 0x48; SYNCDELAY;
FIFORESET = 0x02; SYNCDELAY;
break;
case 4:
EP4FIFOCFG = 0x48; SYNCDELAY;
FIFORESET = 0x04; SYNCDELAY;
break;
case 6:
EP6FIFOCFG = 0x48; SYNCDELAY;
FIFORESET = 0x06; SYNCDELAY;
break;
default: // 0
EP2FIFOCFG = 0x48; SYNCDELAY;
EP4FIFOCFG = 0x48; SYNCDELAY;
EP6FIFOCFG = 0x48; SYNCDELAY;
EP8FIFOCFG = 0x10; SYNCDELAY;
FIFORESET = 0x02; SYNCDELAY;
FIFORESET = 0x04; SYNCDELAY;
FIFORESET = 0x06; SYNCDELAY;
}
FIFORESET = 0x00; SYNCDELAY; // Resume normal operation.
new_data = 1;
break;
//-----------------------------------------------------------------
case CMD_FLASH_WRITE:
if (EP1OUTBUF[4] > 59) EP1OUTBUF[4] = 59;
page_write(EP1OUTBUF[1], EP1OUTBUF[2], EP1OUTBUF[3], &EP1OUTBUF[5], EP1OUTBUF[4]); //highest, high, low adr, read_ptr, size
//-----------------------------------------------------------------
case CMD_FLASH_READ:
if (EP1OUTBUF[4] > 64) EP1OUTBUF[4] = 64;
page_read(EP1OUTBUF[1], EP1OUTBUF[2], EP1OUTBUF[3], &EP1INBUF[0], EP1OUTBUF[4]); //highest, high, low adr, read_ptr, size
new_data = 1;
break;
//-----------------------------------------------------------------
case CMD_FLASH_ERASE:
// busy_polling();
// On some modules it cause API error - better to do it from software side
bulk_erase();
new_data = 1;
sts_flash_busy = 1;
break;
//-----------------------------------------------------------------
case CMD_SECTOR_ERASE:
sector_erase(EP1OUTBUF[1]);
new_data = 1;
sts_flash_busy = 1;
break;
//-----------------------------------------------------------------
case CMD_FLASH_WRITE_COMMAND:
EP1INBUF[0] = 0x55;
spi_command(EP1OUTBUF[1], &EP1OUTBUF[3], EP1OUTBUF[2], &EP1INBUF[1]);
new_data = 1;
break;
//-----------------------------------------------------------------
case CMD_EEPROM_WRITE:
adr = EP1OUTBUF[1];
adr = (adr << 8) + EP1OUTBUF[2];
if (EP1OUTBUF[3] > 32) EP1OUTBUF[3] = 32;
EEPROMWrite(adr, EP1OUTBUF[3], &EP1OUTBUF[4]); // adress, size, data
//-----------------------------------------------------------------
case CMD_EEPROM_READ:
adr = EP1OUTBUF[1];
adr = (adr << 8) + EP1OUTBUF[2];
EEPROMRead(adr, EP1OUTBUF[3], &EP1INBUF[0]); // adress, size, data
new_data = 1;
break;
//-----------------------------------------------------------------
case CMD_GET_FIFO_STATUS:
EP1INBUF[0] = EP2CS;
EP1INBUF[1] = EP4CS;
EP1INBUF[2] = EP6CS;
EP1INBUF[3] = EP8CS;
EP1INBUF[4] = EP2FIFOBCH;
EP1INBUF[5] = EP4FIFOBCH;
EP1INBUF[6] = EP6FIFOBCH;
EP1INBUF[7] = EP8FIFOBCH;
EP1INBUF[8] = EP2FIFOBCL;
EP1INBUF[9] = EP4FIFOBCL;
EP1INBUF[10] = EP6FIFOBCL;
EP1INBUF[11] = EP8FIFOBCL;
EP1INBUF[12] = EP2FIFOFLGS;
EP1INBUF[13] = EP4FIFOFLGS;
EP1INBUF[14] = EP6FIFOFLGS;
EP1INBUF[15] = EP8FIFOFLGS;
new_data = 1;
break;
//-----------------------------------------------------------------
case CMD_I2C_WRITE:
I2CWrite(EP1OUTBUF[1], EP1OUTBUF[2], &EP1OUTBUF[3]); // adress, size, data
new_data = 1;
break;
//-----------------------------------------------------------------
case CMD_I2C_READ:
I2CRead(EP1OUTBUF[1], EP1OUTBUF[2], &EP1INBUF[0]); // adress, size, data
new_data = 1;
break;
//-----------------------------------------------------------------
/*
case CMD_I2C_WRITE_READ:
i = EP1OUTBUF[1];
I2CWrite(i, EP1OUTBUF[2], &EP1OUTBUF[4]); // adress, size, data
delaycnt = 0;
while (INT0_PIN == 0){
EZUSB_Delay1ms();
delaycnt++;
if (delaycnt > 800)
break;
continue;
}
I2CRead(i, EP1OUTBUF[3], &EP1INBUF[0]); // adress, size, data
new_data = 1;
break;
*/
//-----------------------------------------------------------------
case CMD_FPGA_POWER:
if (EP1OUTBUF[1] == 0){
FPGA_POWER = 0;
sts_int_auto_configured = 0;
}
else{
IOD = 0x03; // Enable Power and disable Reset
OED = 0x03; // PROG_B and POWER
FPGA_POWER = 1;
}
EP1INBUF[0] = (FPGA_POWER) ? 1 : 0;
EP1INBUF[1] = 0xAA;
new_data = 1;
break;
//-----------------------------------------------------------------
case CMD_FPGA_RESET:
FPGA_INT1 = (EP1OUTBUF[1]) ? 1 : 0;
EP1INBUF[0] = FPGA_INT1;
EP1INBUF[1] = 0xAA;
new_data = 1;
break;
//-----------------------------------------------------------------
case CMD_DEV_LOCK:
if(EP1OUTBUF[1] == 0x01){ // Driver trying to lock device
if(lock == 0){ // Device is free
EP1INBUF[0] = 0x22; // Sucessfull lock
lock = 1;
}
else // Device is locked
EP1INBUF[0] = 0x00; // Already locked
}
else{ // Driver trying to unlock device
if(lock == 1){ // Device is locked
EP1INBUF[0] = 0x33; // Sucessfull unlock
lock = 0;
}
else // Device is unlocked
EP1INBUF[0] = 0x00; // Got problem
}
new_data = 1;
break;
//-----------------------------------------------------------------
}
EP1OUTBC = EP1DATA_COUNT; // Free input buffer
}
if(new_data){ // Have something to send
if ( !(EP1INCS & 0x02)){ // Can send ?
EP1INBC = EP1DATA_COUNT; // Send
new_data = 0;
}
}
}
BOOL DR_VendorCmnd(void)
{
WORD addr, len, bc; // xdata used here to conserve data ram; if not EEPROM writes don't work anymore
WORD i;
// char *dscrRAM;
unsigned char xdata JTAGdata[400];
// we don't actually process the command here, we process it in the main loop
// here we just do the handshaking and ensure if it is a command that is implemented
switch (SETUPDAT[1]){
case VR_ENABLE_AE_IN: // enable IN transfers
{
startMonitor();
break; // handshake phase triggered below
}
case VR_DISABLE_AE_IN: // disable IN transfers
{
stopMonitor();
break;
}
case VR_RESET_FIFOS: // reset in and out fifo
{
SYNCDELAY;
EP6FIFOCFG = 0x01; //0000_0001 disable auto-in
SYNCDELAY;
FIFORESET = 0x80;
SYNCDELAY;
FIFORESET = 0x06;
SYNCDELAY;
FIFORESET = 0x00;
SYNCDELAY;
EP6FIFOCFG = 0x09 ; //0000_1001 reenable auto-in
break;
}
case VR_DOWNLOAD_CPLD_CODE:
{
if (SETUPDAT[0]==VR_DOWNLOAD) {
if (JTAGinit)
{
IOC=0x00;
OEC = 0xBD; // configure TDO (bit 6) and TSmaster as input : 1011_1101
xsvfInitialize();
JTAGinit=FALSE;
}
len = SETUPDAT[6];
len |= SETUPDAT[7] << 8;
if (len>400)
{
xsvfReturn=10;
OEC = 0x0D; // configure JTAG pins to float : 0000_1111
JTAGinit=TRUE;
break;
}
addr=0;
resetReadCounter(JTAGdata);
while(len) // Move new data through EP0OUT
{ // one packet at a time.
// Arm endpoint - do it here to clear (after sud avail)
EP0BCH = 0;
EP0BCL = 0; // Clear bytecount to allow new data in; also stops NAKing
while(EP0CS & bmEPBUSY);
bc = EP0BCL; // Get the new bytecount
for(i=0; i<bc; i++)
JTAGdata[addr+i] = EP0BUF[i];
addr += bc;
len -= bc;
}
if (SETUPDAT[2]==0x00) //complete
{
OEC = 0x0D; // configure JTAG pins to float : 0000_1111
JTAGinit=TRUE;
} else
{
xsvfReturn=xsvfRun();
if (xsvfReturn>0) // returns true if error
{
OEC = 0x0D; // configure JTAG pins to float : 0000_1101
JTAGinit=TRUE;
// return TRUE;
}
}
/* EP0BUF[0] = SETUPDAT[1];
EP0BCH = 0;
EP0BCL = 1;
EP0CS |= bmHSNAK;
return(FALSE); */
break;
}
else //case VR_XSVF_ERROR_CODE:
{
EP0BUF[0] = SETUPDAT[1];
EP0BUF[1]= xsvfReturn;
EP0BCH = 0;
EP0BCL = 2;
EP0CS |= bmHSNAK;
return(FALSE);
}
}
/* case VR_SET_DEVICE_NAME:
{
*EP0BUF = SETUPDAT[1];
EP0BCH = 0;
EP0BCL = 1;
EP0CS |= bmHSNAK;
while(EP0CS & bmEPBUSY); //wait for the data packet to arrive
dscrRAM = (char*)EZUSB_GetStringDscr(3); // get address of serial number descriptor-string in RAM
if (EP0BCL > MAX_NAME_LENGTH)
{
len=MAX_NAME_LENGTH;
} else
{
len=EP0BCL;
}
for (i=0;i<len;i++)
{
EEPROMWriteBYTE(STRING_ADDRESS+i, EP0BUF[i]); // write string to EEPROM
dscrRAM[2+i*2] = EP0BUF[i]; // write string to RAM
}
for (i=len; i<MAX_NAME_LENGTH; i++) // fill the rest with stop characters
{
EEPROMWriteBYTE(STRING_ADDRESS+i, ' '); // write string to EEPROM
dscrRAM[2+i*2] = ' '; // write string to RAM
}
EP0BCH = 0;
EP0BCL = 0;
return(FALSE);
}*/
case VR_RESETTIMESTAMPS:
{
RESET_TS=1; // assert RESET_TS pin for one instruction cycle (four clock cycles)
RESET_TS=0;
// reset dvs statemachines
IOE= IOE & ~DVS_nReset;
_nop_();
_nop_();
_nop_();
IOE = IOE | DVS_nReset; //start dvs statemachines
break;
}
case VR_WRITE_BIASGEN: // write bytes to SPI interface
case VR_EEPROM_BIASGEN_BYTES: // falls through and actual command is tested below
{
SYNCDELAY;
addr = SETUPDAT[2]; // Get address and length
addr |= SETUPDAT[3] << 8;
len = SETUPDAT[6];
len |= SETUPDAT[7] << 8;
numBiasBytes=len;
while(len){ // Move new data through EP0OUT, one packet at a time
// Arm endpoint - do it here to clear (after sud avail)
EP0BCH = 0;
EP0BCL = 0; // Clear bytecount to allow new data in; also stops NAKing
while(EP0CS & bmEPBUSY); // spin here until data arrives
bc = EP0BCL; // Get the new bytecount
// Is this a download to biasgen shift register?
if(SETUPDAT[1] == VR_WRITE_BIASGEN){
for(i=0; i<bc; i++){
spiwritebyte(EP0BUF[i]);
biasBytes[i]=EP0BUF[i]; // not sure why these are saved...
}
}else{ // we write EEProm starting at addr with bc bytes from EP0BUF
// EEPROMWrite(addr,bc,(WORD)EP0BUF);
}
addr += bc; // inc eeprom addr to write to, in case that's what we're doing
len -= bc; // dec total byte count
}
if(SETUPDAT[1]==VR_WRITE_BIASGEN) {
latchNewBiases();
//setLatchTransparent(); // let values pass through latch from shift register -- these are new values
//setLatchOpaque();
}
EP0BCH = 0;
EP0BCL = 0; // Arm endpoint with 0 byte to transfer
LED=!LED;
return(FALSE); // very important, otherwise get stall
}
case VR_SET_POWERDOWN: // control powerDown output bit
{
if (SETUPDAT[2])
{
setPowerDownBit();
} else
{
releasePowerDownBit();
}
*EP0BUF=VR_SET_POWERDOWN;
SYNCDELAY;
EP0BCH = 0;
EP0BCL = 1; // Arm endpoint with 1 byte to transfer
EP0CS |= bmHSNAK; // Acknowledge handshake phase of device request
break; // very important, otherwise get stall
}
/* TCVS320 doesn't have global array reset */
/*
case VR_SETARRAYRESET: // set array reset, based on lsb of argument
{
if (SETUPDAT[2]&0x01)
{
IOE|=arrayReset;
} else
{
IOE&=~arrayReset;
}
*EP0BUF=VR_SETARRAYRESET;
SYNCDELAY;
EP0BCH = 0;
EP0BCL = 1; // Arm endpoint with 1 byte to transfer
EP0CS |= bmHSNAK; // Acknowledge handshake phase of device request
return(FALSE); // very important, otherwise get stall
}
case VR_DOARRAYRESET: // reset array for fixed reset time
{
IOE&=~arrayReset;
_nop_();
_nop_();
_nop_();
_nop_();
_nop_();
_nop_();
_nop_();
_nop_(); // a few us
_nop_();
_nop_();
_nop_();
_nop_();
_nop_();
_nop_();
IOE|=arrayReset;
*EP0BUF=VR_DOARRAYRESET;
SYNCDELAY;
EP0BCH = 0;
EP0BCL = 1; // Arm endpoint with 1 byte to transfer
EP0CS |= bmHSNAK; // Acknowledge handshake phase of device request
return (FALSE); // very important, otherwise get stall
}
*/
/* case VR_DOWNLOAD_CPLD_CODE:
{
break;
} */
case VR_IS_TS_MASTER:
{
EP0BUF[0] = SETUPDAT[1];
EP0BUF[1]= TIMESTAMP_MASTER;
EP0BCH = 0;
EP0BCL = 2;
EP0CS |= bmHSNAK;
return(FALSE);
}
case VR_RAM:
case VR_EEPROM:
{
addr = SETUPDAT[2]; // Get address and length
addr |= SETUPDAT[3] << 8;
len = SETUPDAT[6];
len |= SETUPDAT[7] << 8;
// Is this an upload command ?
if(SETUPDAT[0] == VR_UPLOAD) // this is automatically defined on host from direction of vendor request
{
while(len) // Move requested data through EP0IN
{ // one packet at a time.
while(EP0CS & bmEPBUSY);
if(len < EP0BUFF_SIZE)
bc = len;
else
bc = EP0BUFF_SIZE;
// Is this a RAM upload ?
if(SETUPDAT[1] == VR_RAM)
{
for(i=0; i<bc; i++)
*(EP0BUF+i) = *((BYTE xdata *)addr+i);
}
else
{
for(i=0; i<bc; i++)
*(EP0BUF+i) = 0xcd;
EEPROMRead(addr,(WORD)bc,(WORD)EP0BUF);
}
EP0BCH = 0;
EP0BCL = (BYTE)bc; // Arm endpoint with # bytes to transfer
addr += bc;
len -= bc;
}
}
// Is this a download command ?
else if(SETUPDAT[0] == VR_DOWNLOAD) // this is automatically defined on host from direction of vendor request
{
while(len) // Move new data through EP0OUT
{ // one packet at a time.
// Arm endpoint - do it here to clear (after sud avail)
EP0BCH = 0;
EP0BCL = 0; // Clear bytecount to allow new data in; also stops NAKing
while(EP0CS & bmEPBUSY);
bc = EP0BCL; // Get the new bytecount
// Is this a RAM download ?
if(SETUPDAT[1] == VR_RAM)
{
for(i=0; i<bc; i++)
*((BYTE xdata *)addr+i) = *(EP0BUF+i);
}
else
EEPROMWrite(addr,bc,(WORD)EP0BUF);
addr += bc;
len -= bc;
}
}
return(FALSE);
}
default:
{ // we received an invalid command
return(TRUE);
}
}
*EP0BUF = SETUPDAT[1];
EP0BCH = 0;
EP0BCL = 1;
EP0CS |= bmHSNAK;
return(FALSE);
}
void __fastcall hotdogstWriteWord(UINT32 sekAddress, UINT16 wordValue)
{
switch (sekAddress) {
case 0xa80000:
nCaveXOffset = wordValue;
return;
case 0xa80002:
nCaveYOffset = wordValue;
return;
case 0xa80008:
CaveSpriteBuffer();
nCaveSpriteBank = wordValue;
return;
case 0xa8006e: {
DrvSoundLatch = wordValue;
ZetNmi();
return;
}
case 0xb00000:
CaveTileReg[0][0] = wordValue;
break;
case 0xb00002:
CaveTileReg[0][1] = wordValue;
break;
case 0xb00004:
CaveTileReg[0][2] = wordValue;
break;
case 0xb80000:
CaveTileReg[1][0] = wordValue;
break;
case 0xb80002:
CaveTileReg[1][1] = wordValue;
break;
case 0xb80004:
CaveTileReg[1][2] = wordValue;
break;
case 0xc00000:
CaveTileReg[2][0] = wordValue;
break;
case 0xc00002:
CaveTileReg[2][1] = wordValue;
break;
case 0xc00004:
CaveTileReg[2][2] = wordValue;
break;
case 0xd00000:
if (~wordValue & 0x0100) {
wordValue >>= 8;
EEPROMWrite(wordValue & 0x04, wordValue & 0x02, wordValue & 0x08);
break;
}
case 0xd00002: {
//nop
return;
}
default: {
bprintf(PRINT_NORMAL, _T("Attempt to write word value %x to location %x\n"), wordValue, sekAddress);
}
}
void SaveSetup(uint8_t Setup) {
EEPROM.Setups[Setup].Setup = TransducerSet;
EEPROMWrite();
}
void __fastcall metmqstrWriteWord(UINT32 sekAddress, UINT16 wordValue)
{
if (sekAddress >= 0xa8000a && sekAddress <= 0xa80068) return;
if (sekAddress >= 0xa8006a && sekAddress <= 0xa8006c) return;
if (sekAddress >= 0xa80004 && sekAddress <= 0xa80006) return;
switch (sekAddress) {
case 0xa80000:
nCaveXOffset = wordValue;
return;
case 0xa80002:
nCaveYOffset = wordValue;
return;
case 0xa80008:
CaveSpriteBuffer();
nCaveSpriteBank = wordValue;
return;
case 0xa8006E:
SoundLatch = wordValue;
SoundLatchStatus |= 0x0C;
ZetNmi();
nCyclesDone[1] += ZetRun(0x0400);
return;
case 0xb00000:
CaveTileReg[2][0] = wordValue;
break;
case 0xb00002:
CaveTileReg[2][1] = wordValue;
break;
case 0xb00004:
CaveTileReg[2][2] = wordValue;
break;
case 0xb80000:
CaveTileReg[1][0] = wordValue;
break;
case 0xb80002:
CaveTileReg[1][1] = wordValue;
break;
case 0xb80004:
CaveTileReg[1][2] = wordValue;
break;
case 0xc00000:
CaveTileReg[0][0] = wordValue;
break;
case 0xc00002:
CaveTileReg[0][1] = wordValue;
break;
case 0xc00004:
CaveTileReg[0][2] = wordValue;
break;
case 0xd00000:
if (~wordValue & 0x0100) {
wordValue >>= 8;
EEPROMWrite(wordValue & 0x04, wordValue & 0x02, wordValue & 0x08);
break;
}
default: {
bprintf(PRINT_NORMAL, _T("Attempt to write word value %x to location %x\n"), wordValue, sekAddress);
}
}
void __fastcall donpachiWriteByte(unsigned int sekAddress, unsigned char byteValue)
{
switch (sekAddress) {
case 0xB00000:
case 0xB00001:
case 0xB00002:
case 0xB00003:
MSM6295Command(0, byteValue);
break;
case 0xB00010:
case 0xB00011:
case 0xB00012:
case 0xB00013:
MSM6295Command(1, byteValue);
break;
case 0xB00020:
case 0xB00021:
case 0xB00022:
case 0xB00023:
case 0xB00024:
case 0xB00025:
case 0xB00026:
case 0xB00027:
case 0xB00028:
case 0xB00029:
case 0xB0002A:
case 0xB0002B:
case 0xB0002C:
case 0xB0002D:
case 0xB0002E:
case 0xB0002F: {
int nBank = (sekAddress >> 1) & 3;
int nChip = (sekAddress >> 3) & 1;
int nAddress = byteValue << 16;
while (nAddress > nBankSize[nChip]) {
nAddress -= nBankSize[nChip];
}
if (nChip == 1) {
MSM6295SampleData[1][nBank] = MSM6295ROM + nAddress;
MSM6295SampleInfo[1][nBank] = MSM6295ROM + nAddress + (nBank << 8);
} else {
MSM6295SampleData[0][nBank] = MSM6295ROM + 0x100000 + nAddress;
if (nBank == 0) {
MSM6295SampleInfo[0][0] = MSM6295ROM + 0x100000 + nAddress + 0x0000;
MSM6295SampleInfo[0][1] = MSM6295ROM + 0x100000 + nAddress + 0x0100;
MSM6295SampleInfo[0][2] = MSM6295ROM + 0x100000 + nAddress + 0x0200;
MSM6295SampleInfo[0][3] = MSM6295ROM + 0x100000 + nAddress + 0x0300;
}
}
break;
}
case 0xD00000:
EEPROMWrite(byteValue & 0x04, byteValue & 0x02, byteValue & 0x08);
break;
default: {
// bprintf(PRINT_NORMAL, "Attempt to write byte value %x to location %x\n", byteValue, sekAddress);
}
}
}
void __fastcall ddonpachWriteWord(UINT32 sekAddress, UINT16 wordValue)
{
switch (sekAddress) {
case 0x300000:
YMZ280BSelectRegister(wordValue);
return;
case 0x300002:
YMZ280BWriteRegister(wordValue);
return;
case 0x800000:
nCaveXOffset = wordValue;
return;
case 0x800002:
nCaveYOffset = wordValue;
return;
case 0x800008:
CaveSpriteBuffer();
nCaveSpriteBank = wordValue;
return;
case 0x900000:
CaveTileReg[0][0] = wordValue;
return;
case 0x900002:
CaveTileReg[0][1] = wordValue;
return;
case 0x900004:
CaveTileReg[0][2] = wordValue;
return;
case 0xA00000:
CaveTileReg[1][0] = wordValue;
return;
case 0xA00002:
CaveTileReg[1][1] = wordValue;
return;
case 0xA00004:
CaveTileReg[1][2] = wordValue;
return;
case 0xB00000:
CaveTileReg[2][0] = wordValue;
return;
case 0xB00002:
CaveTileReg[2][1] = wordValue;
return;
case 0xB00004:
CaveTileReg[2][2] = wordValue;
return;
case 0xE00000:
wordValue >>= 8;
EEPROMWrite(wordValue & 0x04, wordValue & 0x02, wordValue & 0x08);
return;
default: {
// bprintf(PRINT_NORMAL, "Attempt to write word value %x to location %x\n", wordValue, sekAddress);
}
}
}
void __fastcall donpachiWriteWord(unsigned int sekAddress, unsigned short wordValue)
{
switch (sekAddress) {
case 0x600000:
CaveTileReg[1][0] = wordValue;
break;
case 0x600002:
CaveTileReg[1][1] = wordValue;
break;
case 0x600004:
CaveTileReg[1][2] = wordValue;
break;
case 0x700000:
CaveTileReg[0][0] = wordValue;
break;
case 0x700002:
CaveTileReg[0][1] = wordValue;
break;
case 0x700004:
CaveTileReg[0][2] = wordValue;
break;
case 0x800000:
CaveTileReg[2][0] = wordValue;
break;
case 0x800002:
CaveTileReg[2][1] = wordValue;
break;
case 0x800004:
CaveTileReg[2][2] = wordValue;
break;
case 0x900000:
nCaveXOffset = wordValue;
return;
case 0x900002:
nCaveYOffset = wordValue;
return;
case 0x900008:
CaveSpriteBuffer();
nCaveSpriteBank = wordValue;
return;
case 0xB00000:
case 0xB00002:
MSM6295Command(0, wordValue);
break;
case 0xB00010:
case 0xB00012:
MSM6295Command(1, wordValue);
break;
case 0xB00020:
case 0xB00021:
case 0xB00022:
case 0xB00023:
case 0xB00024:
case 0xB00025:
case 0xB00026:
case 0xB00027:
case 0xB00028:
case 0xB00029:
case 0xB0002A:
case 0xB0002B:
case 0xB0002C:
case 0xB0002D:
case 0xB0002E:
case 0xB0002F: {
int nBank = (sekAddress >> 1) & 3;
int nChip = (sekAddress >> 3) & 1;
int nAddress = wordValue << 16;
while (nAddress > nBankSize[nChip]) {
nAddress -= nBankSize[nChip];
}
if (nChip == 1) {
MSM6295SampleData[1][nBank] = MSM6295ROM + nAddress;
MSM6295SampleInfo[1][nBank] = MSM6295ROM + nAddress + (nBank << 8);
} else {
MSM6295SampleData[0][nBank] = MSM6295ROM + 0x100000 + nAddress;
if (nBank == 0) {
MSM6295SampleInfo[0][0] = MSM6295ROM + 0x100000 + nAddress + 0x0000;
MSM6295SampleInfo[0][1] = MSM6295ROM + 0x100000 + nAddress + 0x0100;
MSM6295SampleInfo[0][2] = MSM6295ROM + 0x100000 + nAddress + 0x0200;
MSM6295SampleInfo[0][3] = MSM6295ROM + 0x100000 + nAddress + 0x0300;
}
}
break;
}
case 0xD00000:
wordValue >>= 8;
EEPROMWrite(wordValue & 0x04, wordValue & 0x02, wordValue & 0x08);
break;
default: {
// bprintf(PRINT_NORMAL, "Attempt to write word value %x to location %x\n", wordValue, sekAddress);
}
}
}
BOOL DR_VendorCmnd(void)
{
WORD value;
WORD len,ind, bc; // xdata used here to conserve data ram; if not EEPROM writes don't work anymore
/*
union {
unsigned short ushort;
unsigned msb,lsb;
unsigned bytes[2]; // big endian, bytes[0] is MSB as far as C51 is concerned
} length;
*/
WORD i;
char *dscrRAM;
unsigned char xdata JTAGdata[400];
switch (SETUPDAT[1]){
case VR_ENABLE_AE_IN: // enable IN transfers
{
startMonitor();
break; // handshake phase triggered below
}
case VR_DISABLE_AE_IN: // disable IN transfers
{
stopMonitor();
break;
}
case VR_RESET_FIFOS: // reset in and out fifo
{
SYNCDELAY;
EP6FIFOCFG = 0x00; //0000_0000 disable auto-in
SYNCDELAY;
FIFORESET = 0x80;
SYNCDELAY;
FIFORESET = 0x06;
SYNCDELAY;
FIFORESET = 0x00;
SYNCDELAY;
EP6FIFOCFG = 0x08 ; //0000_1000 reenable auto-in
break;
}
case VR_DOWNLOAD_CPLD_CODE:
{
if (SETUPDAT[0]==VR_DOWNLOAD) {
if (JTAGinit)
{
IOC=0x00;
OEC = 0xBD; // configure TDO (bit 6) and TSmaster as input : 1011_1101
xsvfInitialize();
JTAGinit=FALSE;
}
len = SETUPDAT[6];
len |= SETUPDAT[7] << 8;
if (len>400)
{
xsvfReturn=10;
OEC = 0x0D; // configure JTAG pins to float : 0000_1111
JTAGinit=TRUE;
break;
}
value=0;
resetReadCounter(JTAGdata);
while(len) // Move new data through EP0OUT
{ // one packet at a time.
// Arm endpoint - do it here to clear (after sud avail)
EP0BCH = 0;
EP0BCL = 0; // Clear bytecount to allow new data in; also stops NAKing
while(EP0CS & bmEPBUSY);
bc = EP0BCL; // Get the new bytecount
for(i=0; i<bc; i++)
JTAGdata[value+i] = EP0BUF[i];
value += bc;
len -= bc;
}
if (SETUPDAT[2]==0x00) //complete
{
OEC = 0x0D; // configure JTAG pins to float : 0000_1111
JTAGinit=TRUE;
} else
{
xsvfReturn=xsvfRun();
if (xsvfReturn>0) // returns true if error
{
OEC = 0x0D; // configure JTAG pins to float : 0000_1101
JTAGinit=TRUE;
// return TRUE;
}
}
/* EP0BUF[0] = SETUPDAT[1];
EP0BCH = 0;
EP0BCL = 1;
EP0CS |= bmHSNAK;
return(FALSE); */
break;
}
else //case VR_XSVF_ERROR_CODE:
{
EP0BUF[0] = SETUPDAT[1];
EP0BUF[1]= xsvfReturn;
EP0BCH = 0;
EP0BCL = 2;
EP0CS |= bmHSNAK;
return(FALSE);
}
}
case VR_SET_DEVICE_NAME:
{
*EP0BUF = SETUPDAT[1];
EP0BCH = 0;
EP0BCL = 1;
EP0CS |= bmHSNAK;
while(EP0CS & bmEPBUSY); //wait for the data packet to arrive
dscrRAM = (char*)EZUSB_GetStringDscr(3); // get address of serial number descriptor-string in RAM
if (EP0BCL > MAX_NAME_LENGTH)
{
len=MAX_NAME_LENGTH;
} else
{
len=EP0BCL;
}
for (i=0;i<len;i++)
{
EEPROMWriteBYTE(STRING_ADDRESS+i, EP0BUF[i]); // write string to EEPROM
dscrRAM[2+i*2] = EP0BUF[i]; // write string to RAM
}
for (i=len; i<MAX_NAME_LENGTH; i++) // fill the rest with stop characters
{
EEPROMWriteBYTE(STRING_ADDRESS+i, ' '); // write string to EEPROM
dscrRAM[2+i*2] = ' '; // write string to RAM
}
EP0BCH = 0;
EP0BCL = 0;
return(FALSE);
}
case VR_RESETTIMESTAMPS:
{
tsReset=1; // RESET_TS=1; // assert RESET_TS pin for one instruction cycle (four clock cycles)
tsReset=0; // RESET_TS=0;
break;
}
case VR_CONFIG: // write bytes to SPI interface
case VR_EEPROM_BIASGEN_BYTES: // falls through and actual command is tested below
{
// the value bytes are the specific config command
// the index bytes are the arguments
// more data comes in the setupdat
SYNCDELAY;
value = SETUPDAT[2]; // Get request value
value |= SETUPDAT[3] << 8; // data comes little endian
ind = SETUPDAT[4]; // Get index
ind |= SETUPDAT[5] << 8;
len = SETUPDAT[6]; // length for data phase
len |= SETUPDAT[7] << 8;
switch(value&0xFF){ // take LSB for specific setup command because equalizer uses MSB for channel
// final short CMD_IPOT = 1, CMD_RESET_EQUALIZER = 2, CMD_SCANNER = 3, CMD_EQUALIZER = 4, CMD_SETBIT = 5, CMD_VDAC = 6;
#define CMD_IPOT 1
#define CMD_RESET_EQUALIZER 2
#define CMD_SCANNER 3
#define CMD_EQUALIZER 4
#define CMD_SETBIT 5
#define CMD_VDAC 6
#define CMD_INITDAC 7
case CMD_IPOT:
selectIPots;
numBiasBytes=len;
while(len){ // Move new data through EP0OUT, one packet at a time,
// eventually will get len down to zero by bc=64,64,15 (for example)
// Arm endpoint - do it here to clear (after sud avail)
EP0BCH = 0;
EP0BCL = 0; // Clear bytecount to allow new data in; also stops NAKing
SYNCDELAY;
while(EP0CS & bmEPBUSY); // spin here until data arrives
bc = EP0BCL; // Get the new bytecount
for(i=0; i<bc; i++){
sendConfigByte(EP0BUF[i]);
}
// value += bc; // inc eeprom value to write to, in case that's what we're doing
len -= bc; // dec total byte count
}
toggleLatch();
selectNone;
LED=!LED;
break;
case CMD_VDAC:
// EP0BUF has b0=channel (same for each DAC), b1=DAC1 MSB, b2=DAC1 LSB, b3=DAC0 MSB, b4=DAC0 LSB
if(len!=6) return TRUE; // error, should have 6 bytes which are just written out to DACs surrounded by dacNSync=0
EP0BCH = 0;
EP0BCL = 0; // Clear bytecount to allow new data in; also stops NAKing
SYNCDELAY;
while(EP0CS & bmEPBUSY); // spin here until data arrives
startDACSync();
for(i=0;i<6;i++){
sendDACByte(EP0BUF[i]);
}
endDACSync();
//toggleLDAC();
LED=!LED;
break;
case CMD_INITDAC:
initDAC();
LED=!LED;
break;
case CMD_SETBIT:
EP0BCH = 0;
EP0BCL = 0; // Clear bytecount to allow new data in; also stops NAKing
SYNCDELAY;
while(EP0CS & bmEPBUSY); // spin here until data arrives
// sends value=CMD_SETBIT, index=portbit with (port(b=0,d=1,e=2)<<8)|bitmask(e.g. 00001000) in MSB/LSB, byte[0]=value (1,0)
// also if button is tristable type in GUI, then byte[0] has tristate in bit1
{
bit bitval=(EP0BUF[0]&1); // 1=set, 0=clear
bit tristate=(EP0BUF[0]&2?1:0); // 1=tristate, 0=drive
unsigned char bitmask=SETUPDAT[4]; // bitmaskit mask, LSB of ind
switch(SETUPDAT[5]){ // this is port, MSB of ind
case 0: // port c
if(bitval) IOC|=bitmask; else IOC&= ~bitmask;
if(tristate) OEC&= ~bitmask; else OEC|=bitmask;
break;
case 1: // port d
if(bitval) IOD|=bitmask; else IOD&= ~bitmask;
if(tristate) OED&= ~bitmask; else OED|=bitmask;
break;
case 2: // port e
if(bitval) IOE|=bitmask; else IOE&= ~bitmask;
if(tristate) OEE&= ~bitmask; else OEE|=bitmask;
break;
default:
return TRUE; // error
}
LED=!LED;
}
break;
case CMD_SCANNER:
// index=1, continuous, index=0 go to channel
// Arm endpoint - do it here to clear (after sud avail) and get the data for channel to scan to if there is one. in any case must read data
// or subsequent requests will fail.
EP0BCH = 0;
EP0BCL = 0; // Clear bytecount to allow new data in; also stops NAKing
SYNCDELAY;
while(EP0CS & bmEPBUSY); // spin here until data arrives
if(ind==0){ // go to channel
ET2=0; // disable timer2 interrupt - IE.5
TR2=0; // stop timer2
i=255; // timeout on scanner clear
while(IOE&ScanSync && i-->0){ // clock scanner to end and timeout if there is no chip there
scanClock=1; // sync happens on falling edge
_nop_();_nop_();_nop_();_nop_();_nop_();_nop_();_nop_();_nop_();_nop_();_nop_();
scanClock=0;
_nop_();_nop_();_nop_();_nop_();_nop_();_nop_();_nop_();_nop_();_nop_();_nop_();
}
if(i==0) return TRUE; // scan to start failed
bc = EP0BUF[0]; // Get the channel number to scan to
for(i=0; i<bc; i++){
scanClock=1; _nop_();_nop_();_nop_();_nop_();_nop_();_nop_();_nop_();_nop_();_nop_();
scanClock=0; _nop_();_nop_();_nop_();_nop_();_nop_();_nop_();_nop_();_nop_();_nop_();
}
}else{ // continuous scanning
RCAP2L=0xff-EP0BUF[0]; // load timer 2 low byte reload register with 0xff-period. period=0 reload is 0xff00 (255 counts), period=255, reload is 0x0000, period=64k
ET2=1; // enable timer2 interrupt - this is IE.5 bit addressable
TR2=1; // run timer2
}
LED=!LED;
break;
case CMD_EQUALIZER:
/*
the scheme right now for loading the AERKillBit and the local Vq's go as follows,
start with AddSel, which has 7 bits, RX0 to RX6, toggle bitlatch low/high - this signal
latches the bits for the decoder.
The output of the decoder is not activated till DataSel is chosen, the 10 bits are loaded, 5 bits
for Vq of SOS and 5bits for Iq of bpf, then when bitlatch is toggled low/high, then the
output of the decoder is released.
During this toggle of latch, the selected channel will also latch in the value on AERKillBit.
The only thing that I'm worrying about right now is that this value has to be remembered somewhere,
i.e. if I choose channels 10, 15 neurons to be inactivated, then even if I choose
new values for Vq and Iq, this information has to be stored somewhere. The
AERKillBit in essence is like an additional bit to the bits for the DataSel.
*/
// value has cmd in LSB, channel in MSB
// index has b11=bpfkilled, b10=lpfkilled, b9-5=qbpf, b4-0=qsos
/*All other 16-bit and 32-bit values are stored, contrary to other Intel
processors, in big endian format, with the high-order byte stored first. For
example, the LJMP and LCALL instructions expect 16-bit addresses that are
in big endian format.
*/
// index is channel address, bytes={gain,quality,killed (1=killed,0=active)}
selectAddr;
sendConfigBits(SETUPDAT[3],7); // send 7 bit address
toggleLatch();
_nop_();_nop_();_nop_();_nop_();_nop_();_nop_();_nop_();
selectNone;
_nop_();_nop_();_nop_();_nop_();_nop_();_nop_();_nop_();
selectData;
sendConfigBits(SETUPDAT[4]&0x1f,5); // what is this for?
sendConfigBits((SETUPDAT[4]>>5)|(SETUPDAT[5]<<3),5);
/* commented out because of bug in cochleaams1b where select of a single kill bit is inverted so everybody but the one you want
is selected. however, the equalizer DAC current splitters still work
// set each killbit
selectLPFKill; // clears ybit
if(SETUPDAT[5]&4){ // kill LPF
aerKillBit=0; // hack
}else{
aerKillBit=0;
}
toggleLatch();
selectBPFKill; // sets ybit
if(SETUPDAT[5]&8){ // kill BPF
aerKillBit=0; // hack
}else{
aerKillBit=0;
}
*/
toggleLatch();
selectNone;
LED=!LED;
break;
case CMD_RESET_EQUALIZER:
return TRUE; // not yet implmented
LED=!LED;
break;
default:
return(TRUE); // don't recognize command
}
EP0BCH = 0;
EP0BCL = 0; // Arm endpoint with 0 byte to transfer
return(FALSE); // very important, otherwise get stall
}
case VR_SET_POWERDOWN: // control powerDown output bit
{
if (SETUPDAT[2])
{
powerDown=1;
} else
{
powerDown=0;
}
*EP0BUF=VR_SET_POWERDOWN;
SYNCDELAY;
EP0BCH = 0;
EP0BCL = 1; // Arm endpoint with 1 byte to transfer
SYNCDELAY;
EP0CS |= bmHSNAK; // Acknowledge handshake phase of device request
break; // very important, otherwise get stall
}
/*
case VR_SETARRAYRESET: // set array reset, based on lsb of argument
{
if (SETUPDAT[2]&0x01)
{
IOE=IOE|ARRAY_RESET_MASK; //IOE|=arrayReset;
} else
{
IOE=IOE&NOT_ARRAY_RESET_MASK;
}
*EP0BUF=VR_SETARRAYRESET;
SYNCDELAY;
EP0BCH = 0;
EP0BCL = 1; // Arm endpoint with 1 byte to transfer
EP0CS |= bmHSNAK; // Acknowledge handshake phase of device request
return(FALSE); // very important, otherwise get stall
}
case VR_DOARRAYRESET: // reset array for fixed reset time
{
IOE=IOE&NOT_ARRAY_RESET_MASK;
_nop_();
_nop_();
_nop_();
_nop_();
_nop_();
_nop_();
_nop_();
_nop_(); // a few us
_nop_();
_nop_();
_nop_();
_nop_();
_nop_();
_nop_();
IOE=IOE|ARRAY_RESET_MASK; //IOE|=arrayReset;
*EP0BUF=VR_DOARRAYRESET;
SYNCDELAY;
EP0BCH = 0;
EP0BCL = 1; // Arm endpoint with 1 byte to transfer
EP0CS |= bmHSNAK; // Acknowledge handshake phase of device request
return (FALSE); // very important, otherwise get stall
}
*/
/* case VR_TIMESTAMP_TICK:
{
if (SETUPDAT[0]==VR_UPLOAD) //1010_0000 :vendor request to device, direction IN
{
EP0BUF[0] = SETUPDAT[1];
EP0BUF[1]= operationMode;
EP0BCH = 0;
EP0BCL = 2;
EP0CS |= bmHSNAK;
} else
{
operationMode=SETUPDAT[2];
if (operationMode==0)
{
TIMESTAMP_MODE = 0;
CFG_TIMESTAMP_COUNTER = 0;
}else if (operationMode==1)
{
CFG_TIMESTAMP_COUNTER = 1;
TIMESTAMP_MODE = 0;
}else if (operationMode==2)
{
CFG_TIMESTAMP_COUNTER = 0;
TIMESTAMP_MODE = 1;
}else if (operationMode==3)
{
CFG_TIMESTAMP_COUNTER = 1;
TIMESTAMP_MODE = 1;
}
*EP0BUF = SETUPDAT[1];
EP0BCH = 0;
EP0BCL = 1;
EP0CS |= bmHSNAK;
}
return(FALSE);
}*/
case VR_IS_TS_MASTER:
{
EP0BUF[0] = SETUPDAT[1];
EP0BUF[1]= TIMESTAMP_MASTER;
EP0BCH = 0;
EP0BCL = 2;
EP0CS |= bmHSNAK;
return(FALSE);
}
/* case VR_MISSED_EVENTS:
{
EX1=0;
EP0BUF[0] = SETUPDAT[1];
EP0BUF[4]= (missedEvents & 0xFF000000) >> 24;
EP0BUF[3]= (missedEvents & 0x00FF0000) >> 16;
EP0BUF[2]= (missedEvents & 0x0000FF00) >> 8;
EP0BUF[1]= missedEvents & 0x000000FF;
EP0BCH = 0;
EP0BCL = 5;
EP0CS |= bmHSNAK;
missedEvents=0;
EX1=1;
return(FALSE);
}*/
case VR_RAM:
case VR_EEPROM:
{
value = SETUPDAT[2]; // Get address and length
value |= SETUPDAT[3] << 8;
len = SETUPDAT[6];
len |= SETUPDAT[7] << 8;
// Is this an upload command ?
if(SETUPDAT[0] == VR_UPLOAD) // this is automatically defined on host from direction of vendor request
{
while(len) // Move requested data through EP0IN
{ // one packet at a time.
while(EP0CS & bmEPBUSY);
if(len < EP0BUFF_SIZE)
bc = len;
else
bc = EP0BUFF_SIZE;
// Is this a RAM upload ?
if(SETUPDAT[1] == VR_RAM)
{
for(i=0; i<bc; i++)
*(EP0BUF+i) = *((BYTE xdata *)value+i);
}
else
{
for(i=0; i<bc; i++)
*(EP0BUF+i) = 0xcd;
EEPROMRead(value,(WORD)bc,(WORD)EP0BUF);
}
EP0BCH = 0;
EP0BCL = (BYTE)bc; // Arm endpoint with # bytes to transfer
value += bc;
len -= bc;
}
}
// Is this a download command ?
else if(SETUPDAT[0] == VR_DOWNLOAD) // this is automatically defined on host from direction of vendor request
{
while(len) // Move new data through EP0OUT
{ // one packet at a time.
// Arm endpoint - do it here to clear (after sud avail)
EP0BCH = 0;
EP0BCL = 0; // Clear bytecount to allow new data in; also stops NAKing
while(EP0CS & bmEPBUSY);
bc = EP0BCL; // Get the new bytecount
// Is this a RAM download ?
if(SETUPDAT[1] == VR_RAM)
{
for(i=0; i<bc; i++)
*((BYTE xdata *)value+i) = *(EP0BUF+i);
}
else
EEPROMWrite(value,bc,(WORD)EP0BUF);
value += bc;
len -= bc;
}
}
return(FALSE);
}
default:
{ // we received an invalid command
return(TRUE);
}
}
*EP0BUF = SETUPDAT[1];
EP0BCH = 0;
EP0BCL = 1;
EP0CS |= bmHSNAK;
return(FALSE);
}
