uint32_t nrf_drv_ppi_channels_include_in_group(uint32_t channel_mask,
nrf_ppi_channel_group_t group)
{
ret_code_t err_code = NRF_SUCCESS;
if (!is_app_group(group))
{
err_code = NRF_ERROR_INVALID_PARAM;
}
else if (!is_allocated_group(group))
{
err_code = NRF_ERROR_INVALID_STATE;
}
else if (!are_app_channels(channel_mask))
{
err_code = NRF_ERROR_INVALID_PARAM;
}
else
{
CRITICAL_REGION_ENTER();
nrf_ppi_channels_include_in_group(channel_mask, group);
CRITICAL_REGION_EXIT();
}
NRF_LOG_INFO("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
}
// Prepare IDeckLinkDeckControl to export to tape
bool ETTHelper::setupDeckControl()
{
BMDDeckControlError err;
bool result = false;
// set callback
m_deckControl->SetCallback(this);
pthread_mutex_lock(&m_mutex);
// open connection to deck
if (m_deckControl->Open(m_timeScale, m_frameDuration, TCISDROPFRAME, &err) != S_OK)
{
pthread_mutex_unlock(&m_mutex);
printf("Could not open serial port (%s)\n", ERR_TO_STR(err));
goto bail;
}
// wait for a deck to be connected
m_waitingForDeckConnected = true;
pthread_cond_wait(&m_condition, &m_mutex);
m_waitingForDeckConnected = false;
pthread_mutex_unlock(&m_mutex);
// set deck preroll and offset
m_deckControl->SetPreroll(5);
m_deckControl->SetExportOffset(0);
result = true;
bail:
return result;
}
// Prepare IDeckLinkDeckControl to capture
bool CaptureHelper::setupDeckControl()
{
BMDDeckControlError err;
bool result = false;
// set callback, preroll and offset
m_deckControl->SetCallback(this);
m_deckControl->SetPreroll(2);
m_deckControl->SetCaptureOffset(CAPTURE_OFFSET*2); // offset must be given in fields (not frames)
pthread_mutex_lock(&m_mutex);
// open connection to deck
if (m_deckControl->Open(m_timeScale, m_frameDuration, TCISDROPFRAME, &err) == S_OK)
{
// wait for a deck to be connected
m_waitingForDeckConnected = true;
pthread_cond_wait(&m_condition, &m_mutex);
m_waitingForDeckConnected = false;
result = true;
}
else
printf("Could not open serial port (%s)\n", ERR_TO_STR(err));
pthread_mutex_unlock(&m_mutex);
return result;
}
// Start a capture operation
void CaptureHelper::doCapture()
{
BMDDeckControlError err;
// setup DeckLink Input interface
if (! setupDeckLinkInput())
goto bail;
// setup DeckControl interface
if (! setupDeckControl())
goto bail;
pthread_mutex_lock(&m_mutex);
// start capture
if (m_deckControl->StartCapture(true, START_TC, STOP_TC, &err) == S_OK)
{
// wait for capture to finish or error to occur
m_waitingForCaptureEnd = true;
pthread_cond_wait(&m_condition, &m_mutex);
m_waitingForCaptureEnd = false;
}
else
printf("Could not start capture (%s)\n", ERR_TO_STR(err));
pthread_mutex_unlock(&m_mutex);
bail:
cleanupDeckControl();
cleanupDeckLinkInput();
}
uint32_t nrf_drv_ppi_channel_alloc(nrf_ppi_channel_t * p_channel)
{
uint32_t err_code = NRF_SUCCESS;
nrf_ppi_channel_t channel;
uint32_t mask = 0;
err_code = NRF_ERROR_NO_MEM;
mask = NRF_PPI_PROG_APP_CHANNELS_MASK;
for (channel = NRF_PPI_CHANNEL0; mask != 0; mask &= ~nrf_drv_ppi_channel_to_mask(channel), channel++)
{
CRITICAL_REGION_ENTER();
if ((mask & nrf_drv_ppi_channel_to_mask(channel)) && (!is_allocated_channel(channel)))
{
channel_allocated_set(channel);
*p_channel = channel;
err_code = NRF_SUCCESS;
}
CRITICAL_REGION_EXIT();
if (err_code == NRF_SUCCESS)
{
NRF_LOG_INFO("Allocated channel: %d.\r\n", channel);
break;
}
}
NRF_LOG_INFO("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
}
uint32_t nrf_drv_ppi_uninit(void)
{
ret_code_t err_code = NRF_SUCCESS;
uint32_t mask = NRF_PPI_ALL_APP_GROUPS_MASK;
nrf_ppi_channel_group_t group;
if (m_drv_state == NRF_DRV_STATE_UNINITIALIZED)
{
err_code = NRF_ERROR_INVALID_STATE;
NRF_LOG_WARNING("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
}
m_drv_state = NRF_DRV_STATE_UNINITIALIZED;
// Disable all channels and groups
nrf_ppi_channels_disable(NRF_PPI_ALL_APP_CHANNELS_MASK);
for (group = NRF_PPI_CHANNEL_GROUP0; mask != 0; mask &= ~group_to_mask(group), group++)
{
if (mask & group_to_mask(group))
{
nrf_ppi_channel_group_clear(group);
}
}
channel_allocated_clr_all();
group_allocated_clr_all();
NRF_LOG_INFO("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
}
uint32_t nrf_drv_ppi_group_alloc(nrf_ppi_channel_group_t * p_group)
{
uint32_t err_code;
uint32_t mask = 0;
nrf_ppi_channel_group_t group;
err_code = NRF_ERROR_NO_MEM;
mask = NRF_PPI_ALL_APP_GROUPS_MASK;
for (group = NRF_PPI_CHANNEL_GROUP0; mask != 0; mask &= ~group_to_mask(group), group++)
{
CRITICAL_REGION_ENTER();
if ((mask & group_to_mask(group)) && (!is_allocated_group(group)))
{
group_allocated_set(group);
*p_group = group;
err_code = NRF_SUCCESS;
}
CRITICAL_REGION_EXIT();
if (err_code == NRF_SUCCESS)
{
NRF_LOG_INFO("Allocated group: %d.\r\n", group);
break;
}
}
NRF_LOG_INFO("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
}
uint32_t nrf_drv_ppi_channel_fork_assign(nrf_ppi_channel_t channel, uint32_t fork_tep)
{
ret_code_t err_code = NRF_SUCCESS;
#ifdef PPI_FEATURE_FORKS_PRESENT
if (!is_programmable_app_channel(channel))
{
err_code = NRF_ERROR_INVALID_PARAM;
}
else if (!is_allocated_channel(channel))
{
err_code = NRF_ERROR_INVALID_STATE;
}
else
{
nrf_ppi_fork_endpoint_setup(channel, fork_tep);
NRF_LOG_INFO("Fork assigned channel: %d, task end point: %d.\r\n", channel, fork_tep);
}
NRF_LOG_INFO("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
#else
err_code = NRF_ERROR_NOT_SUPPORTED;
NRF_LOG_WARNING("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
#endif
}
ret_code_t nrf_drv_clock_calibration_abort(void)
{
ret_code_t err_code = NRF_SUCCESS;
#if CALIBRATION_SUPPORT
CRITICAL_REGION_ENTER();
switch (m_clock_cb.cal_state)
{
case CAL_STATE_CT:
nrf_clock_int_disable(NRF_CLOCK_INT_CTTO_MASK);
nrf_clock_task_trigger(NRF_CLOCK_TASK_CTSTOP);
m_clock_cb.cal_state = CAL_STATE_IDLE;
if (m_clock_cb.cal_done_handler)
{
m_clock_cb.cal_done_handler(NRF_DRV_CLOCK_EVT_CAL_ABORTED);
}
break;
case CAL_STATE_HFCLK_REQ:
/* fall through. */
case CAL_STATE_CAL:
m_clock_cb.cal_state = CAL_STATE_ABORT;
break;
default:
break;
}
CRITICAL_REGION_EXIT();
NRF_LOG_INFO("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
#else
err_code = NRF_ERROR_FORBIDDEN;
NRF_LOG_WARNING("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
#endif // CALIBRATION_SUPPORT
}
ret_code_t nrf_drv_clock_init(void)
{
ret_code_t err_code = NRF_SUCCESS;
if (m_clock_cb.module_initialized)
{
err_code = NRF_ERROR_MODULE_ALREADY_INITIALIZED;
}
else
{
m_clock_cb.p_hf_head = NULL;
m_clock_cb.hfclk_requests = 0;
m_clock_cb.p_lf_head = NULL;
m_clock_cb.lfclk_requests = 0;
nrf_drv_common_power_clock_irq_init();
#ifdef SOFTDEVICE_PRESENT
if (!softdevice_handler_is_enabled())
#endif
{
nrf_clock_lf_src_set((nrf_clock_lfclk_t)CLOCK_CONFIG_LF_SRC);
}
#if CALIBRATION_SUPPORT
m_clock_cb.cal_state = CAL_STATE_IDLE;
#endif
m_clock_cb.module_initialized = true;
}
NRF_LOG_INFO("Function: %s, error code: %s.\r\n",
(uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
}
/*
* IDeckLinkDeckControlStatusCallback methods
*/
HRESULT ETTHelper::DeckControlEventReceived (/* in */ BMDDeckControlEvent event, /* in */ BMDDeckControlError error)
{
printf("\n === '%s' event (error: %s)\n", EVT_TO_STR(event), ERR_TO_STR(error));
switch (event){
case bmdDeckControlPrepareForExportEvent:
// We receive this event a few frames before the inpoint.
// At this point, we must call IDeckLinkOutput::StartScheduledPlayback()
printf("Starting playback\n");
if (m_deckLinkOutput->StartScheduledPlayback(0, m_timeScale, 1.0) == S_OK)
m_exportStarted = true;
else
printf("Error starting playback\n");
break;
case bmdDeckControlExportCompleteEvent:
// We receive this event a few frames after the out-point.
// It is now safe to unblock the main thread, close the
// connection to the deck and release the IDeckLinkDeckControl
// and IDeckLinkOutput interfaces
// fallthrough
case bmdDeckControlAbortedEvent:
m_exportStarted = false;
// unblock main thread
pthread_mutex_lock(&m_mutex);
if (m_waitingForExportEnd)
pthread_cond_signal(&m_condition);
pthread_mutex_unlock(&m_mutex);
break;
}
return S_OK;
}
// Start an export to tape operation
void ETTHelper::doExport()
{
BMDDeckControlExportModeOpsFlags exportModeOps = bmdDeckControlExportModeInsertVideo;
BMDDeckControlError err;
// setup DeckLink Output interface
if (! setupDeckLinkOutput())
goto bail;
// setup DeckControl interface
if (! setupDeckControl())
goto bail;
// preroll a few frames
if (! scheduleNextFrame(true))
goto bail;
pthread_mutex_unlock(&m_mutex);
// start export
if (m_deckControl->StartExport(START_TC, STOP_TC, exportModeOps, &err) == S_OK)
{
// wait for export to finish or error to occur
m_waitingForExportEnd = true;
pthread_cond_wait(&m_condition, &m_mutex);
m_waitingForExportEnd = false;
}
else
printf("Could not start export (%s)\n", ERR_TO_STR(err));
pthread_mutex_unlock(&m_mutex);
bail:
cleanupDeckControl();
cleanupDeckLinkOutput();
}
HRESULT CaptureHelper::DeckControlEventReceived (/* in */ BMDDeckControlEvent event, /* in */ BMDDeckControlError err)
{
printf("\n === '%s' event (%s)\n", EVT_TO_STR(event), ERR_TO_STR(err));
switch (event){
case bmdDeckControlPrepareForCaptureEvent:
// We receive this event a few frames before we reach the in-point. The serial timecode
// attached to IDeckLinkVideoFrames (received in VideoInputFrameArrived) is now
// valid and can be used to find the in- and out-points.
m_captureStarted = true;
break;
case bmdDeckControlCaptureCompleteEvent:
// we receive this event a few frames after the out-point.
// It is now safe to unblock the main thread, close the
// connection to the deck and release the IDeckLinkDeckControl
// and IDeckLinkInput interfaces
// fallthrough
case bmdDeckControlAbortedEvent:
m_captureStarted = false;
// unblock the main thread
pthread_mutex_lock(&m_mutex);
if (m_waitingForCaptureEnd)
pthread_cond_signal(&m_condition);
pthread_mutex_unlock(&m_mutex);
break;
}
return S_OK;
}
ret_code_t nrf_drv_clock_is_calibrating(bool * p_is_calibrating)
{
ret_code_t err_code = NRF_SUCCESS;
#if CALIBRATION_SUPPORT
ASSERT(m_clock_cb.module_initialized);
*p_is_calibrating = (m_clock_cb.cal_state != CAL_STATE_IDLE);
NRF_LOG_INFO("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
#else
err_code = NRF_ERROR_FORBIDDEN;
NRF_LOG_WARNING("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
#endif // CALIBRATION_SUPPORT
}
ret_code_t nrf_drv_spis_buffers_set(nrf_drv_spis_t const * const p_instance,
const uint8_t * p_tx_buffer,
uint8_t tx_buffer_length,
uint8_t * p_rx_buffer,
uint8_t rx_buffer_length)
{
spis_cb_t * p_cb = &m_cb[p_instance->instance_id];
uint32_t err_code;
VERIFY_PARAM_NOT_NULL(p_rx_buffer);
VERIFY_PARAM_NOT_NULL(p_tx_buffer);
// EasyDMA requires that transfer buffers are placed in Data RAM region;
// signal error if they are not.
if ((p_tx_buffer != NULL && !nrf_drv_is_in_RAM(p_tx_buffer)) ||
(p_rx_buffer != NULL && !nrf_drv_is_in_RAM(p_rx_buffer)))
{
err_code = NRF_ERROR_INVALID_ADDR;
NRF_LOG_WARNING("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
}
switch (p_cb->spi_state)
{
case SPIS_STATE_INIT:
case SPIS_XFER_COMPLETED:
case SPIS_BUFFER_RESOURCE_CONFIGURED:
p_cb->tx_buffer = p_tx_buffer;
p_cb->rx_buffer = p_rx_buffer;
p_cb->tx_buffer_size = tx_buffer_length;
p_cb->rx_buffer_size = rx_buffer_length;
err_code = NRF_SUCCESS;
spis_state_change(p_instance->p_reg, p_cb, SPIS_BUFFER_RESOURCE_REQUESTED);
break;
case SPIS_BUFFER_RESOURCE_REQUESTED:
err_code = NRF_ERROR_INVALID_STATE;
break;
default:
// @note: execution of this code path would imply internal error in the design.
err_code = NRF_ERROR_INTERNAL;
break;
}
NRF_LOG_INFO("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
}
uint32_t nrf_drv_ppi_group_disable(nrf_ppi_channel_group_t group)
{
ret_code_t err_code = NRF_SUCCESS;
if (!is_app_group(group))
{
err_code = NRF_ERROR_INVALID_PARAM;
}
else
{
nrf_ppi_group_disable(group);
}
NRF_LOG_INFO("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
}
uint32_t nrf_drv_ppi_init(void)
{
uint32_t err_code;
if (m_drv_state == NRF_DRV_STATE_UNINITIALIZED)
{
m_drv_state = NRF_DRV_STATE_INITIALIZED;
err_code = NRF_SUCCESS;
}
else
{
err_code = NRF_ERROR_MODULE_ALREADY_INITIALIZED;
}
NRF_LOG_INFO("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
}
uint32_t nrf_drv_ppi_channel_enable(nrf_ppi_channel_t channel)
{
ret_code_t err_code = NRF_SUCCESS;
if (!is_app_channel(channel))
{
err_code = NRF_ERROR_INVALID_PARAM;
}
else if (is_programmable_app_channel(channel) && !is_allocated_channel(channel))
{
err_code = NRF_ERROR_INVALID_STATE;
}
else
{
nrf_ppi_channel_enable(channel);
}
NRF_LOG_INFO("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
}
uint32_t nrf_drv_ppi_channel_free(nrf_ppi_channel_t channel)
{
ret_code_t err_code = NRF_SUCCESS;
if (!is_programmable_app_channel(channel))
{
err_code = NRF_ERROR_INVALID_PARAM;
}
else
{
// First disable this channel
nrf_ppi_channel_disable(channel);
CRITICAL_REGION_ENTER();
channel_allocated_clr(channel);
CRITICAL_REGION_EXIT();
}
NRF_LOG_INFO("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
}
uint32_t nrf_drv_ppi_group_free(nrf_ppi_channel_group_t group)
{
ret_code_t err_code = NRF_SUCCESS;
if (!is_app_group(group))
{
err_code = NRF_ERROR_INVALID_PARAM;
}
if (!is_allocated_group(group))
{
err_code = NRF_ERROR_INVALID_STATE;
}
else
{
nrf_ppi_group_disable(group);
CRITICAL_REGION_ENTER();
group_allocated_clr(group);
CRITICAL_REGION_EXIT();
}
NRF_LOG_INFO("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
}
ret_code_t nrf_drv_wdt_channel_alloc(nrf_drv_wdt_channel_id * p_channel_id)
{
ret_code_t result;
ASSERT(p_channel_id);
ASSERT(m_state == NRF_DRV_STATE_INITIALIZED);
CRITICAL_REGION_ENTER();
if (m_alloc_index < NRF_WDT_CHANNEL_NUMBER)
{
*p_channel_id = (nrf_drv_wdt_channel_id)(NRF_WDT_RR0 + m_alloc_index);
m_alloc_index++;
nrf_wdt_reload_request_enable(*p_channel_id);
result = NRF_SUCCESS;
}
else
{
result = NRF_ERROR_NO_MEM;
}
CRITICAL_REGION_EXIT();
NRF_LOG_INFO("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(result));
return result;
}
ret_code_t nrf_drv_wdt_init(nrf_drv_wdt_config_t const * p_config,
nrf_wdt_event_handler_t wdt_event_handler)
{
ASSERT(wdt_event_handler != NULL);
ret_code_t err_code;
m_wdt_event_handler = wdt_event_handler;
if (m_state == NRF_DRV_STATE_UNINITIALIZED)
{
m_state = NRF_DRV_STATE_INITIALIZED;
}
else
{
err_code = NRF_ERROR_INVALID_STATE;
NRF_LOG_WARNING("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
}
if (p_config == NULL)
{
p_config = &m_default_config;
}
nrf_wdt_behaviour_set(p_config->behaviour);
nrf_wdt_reload_value_set((p_config->reload_value * 32768) / 1000);
nrf_drv_common_irq_enable(WDT_IRQn, p_config->interrupt_priority);
err_code = NRF_SUCCESS;
NRF_LOG_INFO("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
}
uint32_t nrf_drv_ppi_channel_assign(nrf_ppi_channel_t channel, uint32_t eep, uint32_t tep)
{
VERIFY_PARAM_NOT_NULL((uint32_t *)eep);
VERIFY_PARAM_NOT_NULL((uint32_t *)tep);
ret_code_t err_code = NRF_SUCCESS;
if (!is_programmable_app_channel(channel))
{
err_code = NRF_ERROR_INVALID_PARAM;
}
else if (!is_allocated_channel(channel))
{
err_code = NRF_ERROR_INVALID_STATE;
}
else
{
nrf_ppi_channel_endpoint_setup(channel, eep, tep);
NRF_LOG_INFO("Assigned channel: %d, event end point: %x, task end point: %x.\r\n", channel, eep, tep);
}
NRF_LOG_INFO("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
}
ret_code_t nrf_drv_spis_init(nrf_drv_spis_t const * const p_instance,
nrf_drv_spis_config_t const * p_config,
nrf_drv_spis_event_handler_t event_handler)
{
ASSERT(p_config);
spis_cb_t * p_cb = &m_cb[p_instance->instance_id];
ret_code_t err_code;
NRF_SPIS_Type * p_spis = p_instance->p_reg;
if (p_cb->state != NRF_DRV_STATE_UNINITIALIZED)
{
err_code = NRF_ERROR_INVALID_STATE;
NRF_LOG_WARNING("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
}
if ((uint32_t)p_config->mode > (uint32_t)NRF_DRV_SPIS_MODE_3)
{
err_code = NRF_ERROR_INVALID_PARAM;
NRF_LOG_WARNING("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
}
if (!event_handler)
{
err_code = NRF_ERROR_NULL;
NRF_LOG_WARNING("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
}
#if NRF_MODULE_ENABLED(PERIPHERAL_RESOURCE_SHARING)
if (nrf_drv_common_per_res_acquire(p_spis,
m_irq_handlers[p_instance->instance_id]) != NRF_SUCCESS)
{
err_code = NRF_ERROR_BUSY;
NRF_LOG_WARNING("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
}
#endif
// Configure the SPI pins for input.
uint32_t mosi_pin;
uint32_t miso_pin;
if (p_config->miso_pin != NRF_DRV_SPIS_PIN_NOT_USED)
{
nrf_gpio_cfg(p_config->miso_pin,
NRF_GPIO_PIN_DIR_INPUT,
NRF_GPIO_PIN_INPUT_CONNECT,
NRF_GPIO_PIN_NOPULL,
p_config->miso_drive,
NRF_GPIO_PIN_NOSENSE);
miso_pin = p_config->miso_pin;
}
else
{
miso_pin = NRF_SPIS_PIN_NOT_CONNECTED;
}
if (p_config->mosi_pin != NRF_DRV_SPIS_PIN_NOT_USED)
{
nrf_gpio_cfg(p_config->mosi_pin,
NRF_GPIO_PIN_DIR_INPUT,
NRF_GPIO_PIN_INPUT_CONNECT,
NRF_GPIO_PIN_NOPULL,
NRF_GPIO_PIN_S0S1,
NRF_GPIO_PIN_NOSENSE);
mosi_pin = p_config->mosi_pin;
}
else
{
mosi_pin = NRF_SPIS_PIN_NOT_CONNECTED;
}
nrf_gpio_cfg(p_config->csn_pin,
NRF_GPIO_PIN_DIR_INPUT,
NRF_GPIO_PIN_INPUT_CONNECT,
p_config->csn_pullup,
NRF_GPIO_PIN_S0S1,
NRF_GPIO_PIN_NOSENSE);
nrf_gpio_cfg(p_config->sck_pin,
NRF_GPIO_PIN_DIR_INPUT,
NRF_GPIO_PIN_INPUT_CONNECT,
NRF_GPIO_PIN_NOPULL,
NRF_GPIO_PIN_S0S1,
NRF_GPIO_PIN_NOSENSE);
nrf_spis_pins_set(p_spis, p_config->sck_pin, mosi_pin, miso_pin, p_config->csn_pin);
nrf_spis_rx_buffer_set(p_spis, NULL, 0);
nrf_spis_tx_buffer_set(p_spis, NULL, 0);
// Configure SPI mode.
nrf_spis_configure(p_spis, (nrf_spis_mode_t) p_config->mode,
(nrf_spis_bit_order_t) p_config->bit_order);
// Configure DEF and ORC characters.
nrf_spis_def_set(p_spis, p_config->def);
nrf_spis_orc_set(p_spis, p_config->orc);
// Clear possible pending events.
nrf_spis_event_clear(p_spis, NRF_SPIS_EVENT_END);
nrf_spis_event_clear(p_spis, NRF_SPIS_EVENT_ACQUIRED);
// Enable END_ACQUIRE shortcut.
nrf_spis_shorts_enable(p_spis, NRF_SPIS_SHORT_END_ACQUIRE);
m_cb[p_instance->instance_id].spi_state = SPIS_STATE_INIT;
m_cb[p_instance->instance_id].handler = event_handler;
// Enable IRQ.
nrf_spis_int_enable(p_spis, NRF_SPIS_INT_ACQUIRED_MASK | NRF_SPIS_INT_END_MASK);
nrf_drv_common_irq_enable(p_instance->irq, p_config->irq_priority);
p_cb->state = NRF_DRV_STATE_INITIALIZED;
// Enable SPI slave device.
nrf_spis_enable(p_spis);
err_code = NRF_SUCCESS;
NRF_LOG_INFO("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
}
ret_code_t nrf_drv_clock_calibration_start(uint8_t interval, nrf_drv_clock_event_handler_t handler)
{
ret_code_t err_code = NRF_SUCCESS;
#if CALIBRATION_SUPPORT
ASSERT(m_clock_cb.cal_state == CAL_STATE_IDLE);
if (m_clock_cb.lfclk_on == false)
{
err_code = NRF_ERROR_INVALID_STATE;
}
else if (m_clock_cb.cal_state == CAL_STATE_IDLE)
{
m_clock_cb.cal_done_handler = handler;
m_clock_cb.cal_hfclk_started_handler_item.event_handler = clock_calibration_hf_started;
if (interval == 0)
{
m_clock_cb.cal_state = CAL_STATE_HFCLK_REQ;
nrf_drv_clock_hfclk_request(&m_clock_cb.cal_hfclk_started_handler_item);
}
else
{
m_clock_cb.cal_state = CAL_STATE_CT;
nrf_clock_cal_timer_timeout_set(interval);
nrf_clock_event_clear(NRF_CLOCK_EVENT_CTTO);
nrf_clock_int_enable(NRF_CLOCK_INT_CTTO_MASK);
nrf_clock_task_trigger(NRF_CLOCK_TASK_CTSTART);
}
}
else
{
err_code = NRF_ERROR_BUSY;
}
NRF_LOG_WARNING("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
#else
err_code = NRF_ERROR_FORBIDDEN;
NRF_LOG_WARNING("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
#endif // CALIBRATION_SUPPORT
}
ret_code_t nrf_drv_lpcomp_init(const nrf_drv_lpcomp_config_t * p_config,
lpcomp_events_handler_t events_handler)
{
ASSERT(p_config);
ret_code_t err_code;
if (m_state != NRF_DRV_STATE_UNINITIALIZED)
{ // LPCOMP driver is already initialized
err_code = NRF_ERROR_INVALID_STATE;
NRF_LOG_WARNING("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
}
#if NRF_MODULE_ENABLED(PERIPHERAL_RESOURCE_SHARING)
if (nrf_drv_common_per_res_acquire(NRF_LPCOMP, IRQ_HANDLER_NAME) != NRF_SUCCESS)
{
err_code = NRF_ERROR_BUSY;
NRF_LOG_WARNING("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
}
#endif
nrf_lpcomp_configure(&(p_config->hal) );
if (events_handler)
{
m_lpcomp_events_handler = events_handler;
}
else
{
err_code = NRF_ERROR_INVALID_PARAM;
NRF_LOG_WARNING("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
}
nrf_lpcomp_input_select(p_config->input);
switch (p_config->hal.detection)
{
case NRF_LPCOMP_DETECT_UP:
nrf_lpcomp_int_enable(LPCOMP_INTENSET_UP_Msk);
break;
case NRF_LPCOMP_DETECT_DOWN:
nrf_lpcomp_int_enable(LPCOMP_INTENSET_DOWN_Msk);
break;
case NRF_LPCOMP_DETECT_CROSS:
nrf_lpcomp_int_enable(LPCOMP_INTENSET_CROSS_Msk);
break;
default:
break;
}
nrf_lpcomp_shorts_enable(NRF_LPCOMP_SHORT_READY_SAMPLE_MASK);
nrf_drv_common_irq_enable(LPCOMP_IRQn, p_config->interrupt_priority);
m_state = NRF_DRV_STATE_INITIALIZED;
err_code = NRF_SUCCESS;
NRF_LOG_INFO("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
}
/******************************************************************
* WINMM_ErrorToString
*/
const char* WINMM_ErrorToString(MMRESULT error)
{
#define ERR_TO_STR(dev) case dev: return #dev
switch (error) {
ERR_TO_STR(MMSYSERR_NOERROR);
ERR_TO_STR(MMSYSERR_ERROR);
ERR_TO_STR(MMSYSERR_BADDEVICEID);
ERR_TO_STR(MMSYSERR_NOTENABLED);
ERR_TO_STR(MMSYSERR_ALLOCATED);
ERR_TO_STR(MMSYSERR_INVALHANDLE);
ERR_TO_STR(MMSYSERR_NODRIVER);
ERR_TO_STR(MMSYSERR_NOMEM);
ERR_TO_STR(MMSYSERR_NOTSUPPORTED);
ERR_TO_STR(MMSYSERR_BADERRNUM);
ERR_TO_STR(MMSYSERR_INVALFLAG);
ERR_TO_STR(MMSYSERR_INVALPARAM);
ERR_TO_STR(MMSYSERR_HANDLEBUSY);
ERR_TO_STR(MMSYSERR_INVALIDALIAS);
ERR_TO_STR(MMSYSERR_BADDB);
ERR_TO_STR(MMSYSERR_KEYNOTFOUND);
ERR_TO_STR(MMSYSERR_READERROR);
ERR_TO_STR(MMSYSERR_WRITEERROR);
ERR_TO_STR(MMSYSERR_DELETEERROR);
ERR_TO_STR(MMSYSERR_VALNOTFOUND);
ERR_TO_STR(MMSYSERR_NODRIVERCB);
ERR_TO_STR(WAVERR_BADFORMAT);
ERR_TO_STR(WAVERR_STILLPLAYING);
ERR_TO_STR(WAVERR_UNPREPARED);
ERR_TO_STR(WAVERR_SYNC);
ERR_TO_STR(MIDIERR_INVALIDSETUP);
ERR_TO_STR(MIDIERR_NODEVICE);
ERR_TO_STR(MIDIERR_STILLPLAYING);
ERR_TO_STR(MIDIERR_UNPREPARED);
}
#undef ERR_TO_STR
return wine_dbg_sprintf("Unknown(0x%08x)", error);
}
ret_code_t nrf_drv_timer_init(nrf_drv_timer_t const * const p_instance,
nrf_drv_timer_config_t const * p_config,
nrf_timer_event_handler_t timer_event_handler)
{
timer_control_block_t * p_cb = &m_cb[p_instance->instance_id];
ASSERT(((p_instance->p_reg == NRF_TIMER0) && TIMER0_ENABLED) || (p_instance->p_reg != NRF_TIMER0));
ASSERT(((p_instance->p_reg == NRF_TIMER1) && TIMER1_ENABLED) || (p_instance->p_reg != NRF_TIMER1));
ASSERT(((p_instance->p_reg == NRF_TIMER2) && TIMER2_ENABLED) || (p_instance->p_reg != NRF_TIMER2));
#if TIMER_COUNT == 5
ASSERT(((p_instance->p_reg == NRF_TIMER3) && TIMER3_ENABLED) || (p_instance->p_reg != NRF_TIMER3));
ASSERT(((p_instance->p_reg == NRF_TIMER4) && TIMER4_ENABLED) || (p_instance->p_reg != NRF_TIMER4));
#endif //TIMER_COUNT
#ifdef SOFTDEVICE_PRESENT
ASSERT(p_instance->p_reg != NRF_TIMER0);
ASSERT(p_config);
#endif
ret_code_t err_code;
if (p_cb->state != NRF_DRV_STATE_UNINITIALIZED)
{
err_code = NRF_ERROR_INVALID_STATE;
NRF_LOG_WARNING("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
}
if (timer_event_handler == NULL)
{
err_code = NRF_ERROR_INVALID_PARAM;
NRF_LOG_WARNING("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
}
/* Warning 685: Relational operator '<=' always evaluates to 'true'"
* Warning in NRF_TIMER_IS_BIT_WIDTH_VALID macro. Macro validate timers resolution.
* Not necessary in nRF52 based systems. Obligatory in nRF51 based systems.
*/
/*lint -save -e685 */
ASSERT(NRF_TIMER_IS_BIT_WIDTH_VALID(p_instance->p_reg, p_config->bit_width));
//lint -restore
p_cb->handler = timer_event_handler;
p_cb->context = p_config->p_context;
uint8_t i;
for (i = 0; i < p_instance->cc_channel_count; ++i)
{
nrf_timer_event_clear(p_instance->p_reg,
nrf_timer_compare_event_get(i));
}
nrf_drv_common_irq_enable(nrf_drv_get_IRQn(p_instance->p_reg),
p_config->interrupt_priority);
nrf_timer_mode_set(p_instance->p_reg, p_config->mode);
nrf_timer_bit_width_set(p_instance->p_reg, p_config->bit_width);
nrf_timer_frequency_set(p_instance->p_reg, p_config->frequency);
p_cb->state = NRF_DRV_STATE_INITIALIZED;
err_code = NRF_SUCCESS;
NRF_LOG_INFO("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
}
