/*=======================================================================
* 函数名称:UINT32 ETH_Interrupt_Init()
* 初稿完成:2005/1/18
* 作 者:
* 函数功能:定义ETH中断服务入口，以及可以打开中断使能
* 输入参数:无
* 输出参数:
* 返回类型: 无
* 其他说明:
* 调用函数: 建议
* 主调函数: 建议
*========================================================================*/
UINT32 ETH_Init(void)
{
UINT32 k = 0;
#ifdef HI3560_V100
// ETH_changcontrol(27,7);
ETH_changcontrol__(27);
#endif
eth_soft_reset();
/*set the phy chip extern address as 1*/
#if defined(HI3511_DEMO)||defined(HI3560_V100)
ETH_SetPHYExternAddress(0x1);
#endif
#ifdef HI3511_UMAP
ETH_SetPHYExternAddress(0x7);
#endif
/*set input and output queue extern address(input addr, output addr)*/
//ETH_SetQueueAddress (0xf2800000,0xf2900000) ;
/*set little and big endian*/
ETH_SetEndian (1, 1);
/*set post frame enable*/
ETH_SetPortPostFrameSend(1);
/*set the port mdio fetch from which root*/
/*set port work mode as 10mbps, link enable,full duplex*/
ETH_SetSpeedLinkDuplexMode(0, 1, 0);
/*half duplex work mode*/
ETH_SetFrameConfiguration(0x0,92,0x1FFF);
/*set port mode fetch from cpu*/
ETH_SetPortStatusMode(0x1);
/*enable the receive frame interrupt*/
/*include the retry interrupt and ahba error*/
//ETH_SetInterruptEnable(0x181);
//interrupt testfunction
ETH_SetInterruptEnable(0x0);
ETH_SetNormalInterruptStyle(0x0);
ETH_SetFrameQueueLength(h_num,e_num);
/*set Phy information*/
ETH_PhyWrite(0 , 0x0);
udelay(1000);
//printf("Set Phy information!!\r\n");
/*输入输出队列使用长度配置*/
ETH_SetMACFiltCtrl(0x120);//add mac file control
/*启动发包*/
for(k =0;k<h_num;k++)
*(UINT32 *) ETH_GLB_REG(14)=((UINT32)(ETH_FRAM_ADDR+(k << 11)));
return Success;
}
void phy_AutoMediaSelect() {
uint32_t data;
// auto media and auto media register selection
data = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_EXTEND_STATUS);
data &= ~PHY_BIT_AUTO_MEDIA_DISABLE;
data &= ~PHY_BIT_AUTO_MEDIA_REG_DISABLE;
ETH_PhyWrite(PHY_BASE_ADDR, PHY_REG_EXTEND_STATUS, data);
}
void phy_Reset() {
ETH_PhyWrite(PHY_BASE_ADDR, PHY_REG_CONTROL, PHY_BIT_CONTROL_RESET);
while (1) {
uint32_t ret = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_CONTROL);
if ((ret & PHY_BIT_CONTROL_RESET) == 0) {
break;
}
}
}
void phy_AutoNeg()
{
uint32_t data;
data = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_CONTROL);
data |= (PHY_BIT_CONTROL_ANEN | PHY_BIT_CONTROL_RSAN);
ETH_PhyWrite(PHY_BASE_ADDR, PHY_REG_CONTROL, data);
while (1)
{
uint32_t ret = ETH_PhyRead(PHY_BASE_ADDR, PHY_REG_STATUS);
if ((ret & PHY_BIT_STATUS_ANC) == PHY_BIT_STATUS_ANC)
{
break;
}
rt_thread_delay(1);
}
}
