static bool
enableIRQ(mrf::Object* obj, void*) {
evgMrm *evg=dynamic_cast<evgMrm*>(obj);
if(!evg)
return true;
/**
* Enable PCIe interrputs (1<<30)
*
* Change by: tslejko
* Reason: Support for cPCI EVG
*/
WRITE32(evg->getRegAddr(), IrqEnable,
EVG_IRQ_PCIIE | //PCIe interrupt enable,
EVG_IRQ_ENABLE |
EVG_IRQ_EXT_INP |
EVG_IRQ_STOP_RAM(0) |
EVG_IRQ_STOP_RAM(1) |
EVG_IRQ_START_RAM(0) |
EVG_IRQ_START_RAM(1)
);
// WRITE32(pReg, IrqEnable,
// EVG_IRQ_ENABLE |
// EVG_IRQ_STOP_RAM1 |
// EVG_IRQ_STOP_RAM0 |
// EVG_IRQ_START_RAM1 |
// EVG_IRQ_START_RAM0 |
// EVG_IRQ_EXT_INP |
// EVG_IRQ_DBUFF |
// EVG_IRQ_FIFO |
// EVG_IRQ_RXVIO
// );
return true;
}
void
evgSeqRam::dealloc() {
m_softSeq = 0;
//clear interrupt flags
BITSET32(m_pReg, IrqFlag, EVG_IRQ_STOP_RAM(m_id));
BITSET32(m_pReg, IrqFlag, EVG_IRQ_START_RAM(m_id));
}
void
evgMrm::isr(void* arg) {
evgMrm *evg = (evgMrm*)(arg);
epicsUInt32 flags = READ32(evg->m_pReg, IrqFlag);
epicsUInt32 enable = READ32(evg->m_pReg, IrqEnable);
epicsUInt32 active = flags & enable;
if(!active)
return;
if(active & EVG_IRQ_STOP_RAM(0)) {
if(evg->irqStop0_queued==0) {
callbackRequest(&evg->irqStop0_cb);
evg->irqStop0_queued=1;
} else if(evg->irqStop0_queued==1) {
WRITE32(evg->getRegAddr(), IrqEnable, enable & ~EVG_IRQ_STOP_RAM(0));
evg->irqStop0_queued=2;
}
}
if(active & EVG_IRQ_STOP_RAM(1)) {
if(evg->irqStop1_queued==0) {
callbackRequest(&evg->irqStop1_cb);
evg->irqStop1_queued=1;
} else if(evg->irqStop1_queued==1) {
WRITE32(evg->getRegAddr(), IrqEnable, enable & ~EVG_IRQ_STOP_RAM(1));
evg->irqStop1_queued=2;
}
}
if(active & EVG_IRQ_EXT_INP) {
if(evg->irqExtInp_queued==0) {
callbackRequest(&evg->irqExtInp_cb);
evg->irqExtInp_queued=1;
} else if(evg->irqExtInp_queued==1) {
WRITE32(evg->getRegAddr(), IrqEnable, enable & ~EVG_IRQ_EXT_INP);
evg->irqExtInp_queued=2;
}
}
WRITE32(evg->m_pReg, IrqFlag, flags); // Clear the interrupt causes
READ32(evg->m_pReg, IrqFlag); // Make sure the clear completes before returning
return;
}
void
evgMrm::process_eos1_cb(CALLBACK *pCallback) {
void* pVoid;
evgSeqRam* seqRam;
callbackGetUser(pVoid, pCallback);
seqRam = (evgSeqRam*)pVoid;
if(!seqRam)
return;
{
interruptLock ig;
if(seqRam->m_owner->irqStop1_queued==2)
BITSET32(seqRam->m_owner->getRegAddr(), IrqEnable, EVG_IRQ_STOP_RAM(1));
seqRam->m_owner->irqStop1_queued=0;
}
seqRam->process_eos();
}
