/*FUNCTION**********************************************************************
 *
 * Function Name : FTM_DRV_QuadDecodeStart
 * Description   : Configures the parameters needed and activates quadrature
 * decode mode.
 *
 *END**************************************************************************/
void FTM_DRV_QuadDecodeStart(uint32_t instance, ftm_phase_params_t *phaseAParams,
                                      ftm_phase_params_t *phaseBParams, ftm_quad_decode_mode_t quadMode)
{
    assert(instance < FTM_INSTANCE_COUNT);
    assert(phaseAParams);
    assert(phaseBParams);

    FTM_Type *ftmBase = g_ftmBase[instance];

    FTM_HAL_SetQuadMode(ftmBase, quadMode);
    FTM_HAL_SetQuadPhaseAFilterCmd(ftmBase, phaseAParams->kFtmPhaseInputFilter);
    if (phaseAParams->kFtmPhaseInputFilter)
    {
        /* Set Phase A filter value if phase filter is enabled */
        FTM_HAL_SetChnInputCaptureFilter(ftmBase, CHAN0_IDX, phaseAParams->kFtmPhaseFilterVal);
    }
    FTM_HAL_SetQuadPhaseBFilterCmd(ftmBase, phaseBParams->kFtmPhaseInputFilter);
    if (phaseBParams->kFtmPhaseInputFilter)
    {
        /* Set Phase B filter value if phase filter is enabled */
        FTM_HAL_SetChnInputCaptureFilter(ftmBase, CHAN1_IDX, phaseBParams->kFtmPhaseFilterVal);
    }
    FTM_HAL_SetQuadPhaseAPolarity(ftmBase, phaseAParams->kFtmPhasePolarity);
    FTM_HAL_SetQuadPhaseBPolarity(ftmBase, phaseBParams->kFtmPhasePolarity);

    FTM_HAL_SetQuadDecoderCmd(ftmBase, true);

    /* Set clock source to start the counter */
    FTM_HAL_SetClockSource(ftmBase, s_ftmClockSource);
}
Ejemplo n.º 2
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void FTM_DRV_QuadDecodeStart(uint8_t instance, ftm_phase_params_t *phaseAParams,
                                      ftm_phase_params_t *phaseBParams, ftm_quad_decode_mode_t quadMode)
{
    assert(instance < HW_FTM_INSTANCE_COUNT);
    assert(phaseAParams);
    assert(phaseBParams);

    uint32_t ftmBaseAddr = g_ftmBaseAddr[instance];

    FTM_HAL_SetQuadMode(ftmBaseAddr, quadMode);
    FTM_HAL_SetQuadPhaseAFilterCmd(ftmBaseAddr, phaseAParams->kFtmPhaseInputFilter);
    if (phaseAParams->kFtmPhaseInputFilter)
    {
        /* Set Phase A filter value if phase filter is enabled */
        FTM_HAL_SetChnInputCaptureFilter(ftmBaseAddr, HW_CHAN0, phaseAParams->kFtmPhaseFilterVal);
    }
    FTM_HAL_SetQuadPhaseBFilterCmd(ftmBaseAddr, phaseBParams->kFtmPhaseInputFilter);
    if (phaseBParams->kFtmPhaseInputFilter)
    {
        /* Set Phase B filter value if phase filter is enabled */
        FTM_HAL_SetChnInputCaptureFilter(ftmBaseAddr, HW_CHAN1, phaseBParams->kFtmPhaseFilterVal);
    }
    FTM_HAL_SetQuadPhaseAPolarity(ftmBaseAddr, phaseAParams->kFtmPhasePolarity);
    FTM_HAL_SetQuadPhaseBPolarity(ftmBaseAddr, phaseBParams->kFtmPhasePolarity);

    FTM_HAL_SetQuadDecoderCmd(ftmBaseAddr, true);

    /* Set clock source to start the counter */
    FTM_HAL_SetClockSource(ftmBaseAddr, kClock_source_FTM_SystemClk);
}
/*FUNCTION**********************************************************************
 *
 * Function Name : FTM_DRV_SetupChnDualEdgeCapture
 * Description   : Configures the Dual Edge Capture mode of the FTM
 * This function sets up the dual edge capture mode on a channel pair.
 * The capture edge for the channel pair and the capture mode (one-shot or continuous)
 * is specified in the param argument. The filter function is disabled if the
 * filterVal argument passed in is 0. The filter function is available only on
 * channels 0 and 2. The user will have to read the channel CnV registers separately
 * to get the capture values.
 *
 *END**************************************************************************/
void FTM_DRV_SetupChnDualEdgeCapture(uint32_t instance, ftm_dual_edge_capture_param_t *param,
                                                 uint8_t channel, uint8_t filterVal)
{
    assert(instance < FTM_INSTANCE_COUNT);
    assert(channel < g_ftmChannelCount[instance]);

    FTM_Type *ftmBase = g_ftmBase[instance];
    uint32_t chnlPairnum = FTM_HAL_GetChnPairIndex(channel);

    /* Stop the counter */
    FTM_HAL_SetClockSource(ftmBase, kClock_source_FTM_None);

    FTM_HAL_SetCounterInitVal(ftmBase, 0);
    FTM_HAL_SetMod(ftmBase, 0xFFFF);
    FTM_HAL_SetCpwms(ftmBase, 0);
    FTM_HAL_SetDualChnCombineCmd(ftmBase, chnlPairnum, false);
    /* Enable the DECAPEN bit */
    FTM_HAL_SetDualEdgeCaptureCmd(ftmBase, chnlPairnum, true);
    /* Setup the edge detection from channel n and n + 1 */
    FTM_HAL_SetChnEdgeLevel(ftmBase, chnlPairnum * 2, param->currChanEdgeMode);
    FTM_HAL_SetChnEdgeLevel(ftmBase, (chnlPairnum * 2) + 1, param->nextChanEdgeMode);

    FTM_HAL_ClearChnEventFlag(ftmBase, channel);
    FTM_HAL_ClearChnEventFlag(ftmBase, channel + 1);
    FTM_HAL_SetDualChnDecapCmd(ftmBase, chnlPairnum, true);
    FTM_HAL_SetChnMSnBAMode(ftmBase, chnlPairnum * 2, param->mode);

    if (channel < CHAN4_IDX)
    {
        FTM_HAL_SetChnInputCaptureFilter(ftmBase, channel, filterVal);
    }

    /* Set clock source to start the counter */
    FTM_HAL_SetClockSource(ftmBase, s_ftmClockSource);
}
/*FUNCTION**********************************************************************
 *
 * Function Name : FTM_DRV_SetupChnInputCapture
 * Description   : Enables capture of an input signal on the channel using the
 * paramters specified to this function. When the edge specified in the captureMode
 * argument occurs on the channel the FTM counter is captured into the CnV register.
 * The user will have to read the CnV register separately to get this value. The filter
 * function is disabled if the filterVal argument passed in is 0. The filter function
 * is available only on channels 0,1,2,3.
 *
 *END**************************************************************************/
void FTM_DRV_SetupChnInputCapture(uint32_t instance, ftm_input_capture_edge_mode_t captureMode,
                                            uint8_t channel, uint8_t filterVal)
{
    assert(instance < FTM_INSTANCE_COUNT);
    assert(channel < g_ftmChannelCount[instance]);

    FTM_Type *ftmBase = g_ftmBase[instance];
    uint32_t chnlPairnum = FTM_HAL_GetChnPairIndex(channel);

    FTM_HAL_SetClockSource(ftmBase, kClock_source_FTM_None);

    FTM_HAL_SetCounterInitVal(ftmBase, 0);
    FTM_HAL_SetMod(ftmBase, 0xFFFF);
    FTM_HAL_SetCpwms(ftmBase, 0);
    FTM_HAL_SetDualChnCombineCmd(ftmBase, chnlPairnum, false);
    FTM_HAL_SetDualEdgeCaptureCmd(ftmBase, chnlPairnum, false);
    FTM_HAL_SetChnEdgeLevel(ftmBase, channel, captureMode);

    if (channel < CHAN4_IDX)
    {
        FTM_HAL_SetChnInputCaptureFilter(ftmBase, channel, filterVal);
    }

    FTM_HAL_SetChnMSnBAMode(ftmBase, channel, 0);

    /* Set clock source to start the counter */
    FTM_HAL_SetClockSource(ftmBase, s_ftmClockSource);
}