/* Clear pin to GND */
void clr_pin(uint32_t p)
{
volatile uint32_t *clr_register = ADDR_OFFSET(&FIO0CLR, 0x20 * GET_PORT(p));
volatile uint32_t *mask_register = ADDR_OFFSET(&FIO0MASK, 0x20 * GET_PORT(p));
*mask_register = ~(1 << GET_PIN(p)); /* Affected pin are those whose mask is 0 */
*clr_register = (1 << GET_PIN(p)); /* Set pin to GND */
}
/* Set pin to HIGH */
void set_pin(uint32_t p)
{
volatile uint32_t *set_register = ADDR_OFFSET(&FIO0SET, 0x20 * GET_PORT(p));
volatile uint32_t *mask_register = ADDR_OFFSET(&FIO0MASK, 0x20 * GET_PORT(p));
*mask_register = ~(1 << GET_PIN(p)); /* Affected pin are those whose mask is 0 */
*set_register = (1 << GET_PIN(p)); /* Set pin to HIGH */
}
void select_gpio_out_mode(uint32_t p) {
uint32_t register_idx = 2*GET_PORT(p);
uint32_t pin = GET_PIN(p);
volatile uint32_t *dir_register;
if (pin >= 16)
{
pin -= 16;
register_idx++;
}
/* Configure function */
PINSEL[register_idx] &= ~(3 << (pin * 2)); /* Clear the two function bits -> gpio mode (p. 108) */
/* Configure mode */
PINMODE[register_idx] &= ~(3 << (pin * 2)); /* Clear the two mode bit -> pull-up resistor */
/* Configure opendrain */
PINMODE_OD[GET_PORT(p)] &= ~(1 << GET_PIN(p)); /* Clear bit -> normal (not opendrain) mode */
/* Set GPIO mode to output */
dir_register = ADDR_OFFSET(&FIO0DIR, 0x20 * GET_PORT(p));
*dir_register |= (1 << GET_PIN(p)); /* set bit to 1 -> set pin to output */
}
void gpio_set_value(uint32_t gpio, uint32_t value)
{
rt_hw_gpio_set(GET_PORT(gpio), GET_PIN(gpio), value);
}
uint32_t gpio_get_value(uint32_t gpio)
{
return rt_hw_gpio_get(GET_PORT(gpio), GET_PIN(gpio));
}
uint32_t gpio_direction_input(uint32_t gpio)
{
rt_hw_gpio_init(GET_PORT(gpio), GET_PIN(gpio),INPUT_DIRECTION);
return rt_hw_gpio_get(GET_PORT(gpio), GET_PIN(gpio));
}
void gpio_direction_output(uint32_t gpio, uint32_t value)
{
rt_hw_gpio_init(GET_PORT(gpio), GET_PIN(gpio),OUTPUT_DIRECTION);
rt_hw_gpio_set(GET_PORT(gpio), GET_PIN(gpio), value);
}
int read_pin(uint32_t p){
volatile uint32_t *pin_register = ADDR_OFFSET(&FIO0PIN, 0x20 * GET_PORT(p));
volatile uint32_t *mask_register = ADDR_OFFSET(&FIO0MASK, 0x20 * GET_PORT(p));
*mask_register = ~(1 << GET_PIN(p));
return ((*pin_register & (1 << GET_PIN(p))) ? 1 : 0);
}
