ABC_NAMESPACE_IMPL_START
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [Mark GIA nodes that feed into POs.]
Description [Returns the array of classes of remaining registers.]
SideEffects []
SeeAlso []
***********************************************************************/
void Gia_ManMarkSeqGiaWithBoxes_rec( Gia_Man_t * p, Gia_Obj_t * pObj, Vec_Int_t * vRoots )
{
Tim_Man_t * pManTime = (Tim_Man_t *)p->pManTime;
int i, iBox, nBoxIns, nBoxOuts, iShift, nRealCis;
if ( Gia_ObjIsTravIdCurrent(p, pObj) )
return;
Gia_ObjSetTravIdCurrent(p, pObj);
if ( Gia_ObjIsAnd(pObj) )
{
Gia_ManMarkSeqGiaWithBoxes_rec( p, Gia_ObjFanin0(pObj), vRoots );
Gia_ManMarkSeqGiaWithBoxes_rec( p, Gia_ObjFanin1(pObj), vRoots );
return;
}
assert( Gia_ObjIsCi(pObj) );
nRealCis = Tim_ManPiNum(pManTime);
if ( Gia_ObjCioId(pObj) < nRealCis )
{
int nRegs = Gia_ManRegBoxNum(p);
int iFlop = Gia_ObjCioId(pObj) - (nRealCis - nRegs);
assert( iFlop >= 0 && iFlop < nRegs );
pObj = Gia_ManCo( p, Gia_ManPoNum(p) - nRegs + iFlop );
Vec_IntPush( vRoots, Gia_ObjId(p, pObj) );
return;
}
// get the box
iBox = Tim_ManBoxForCi( pManTime, Gia_ObjCioId(pObj) );
nBoxIns = Tim_ManBoxInputNum(pManTime, iBox);
nBoxOuts = Tim_ManBoxOutputNum(pManTime, iBox);
// mark all outputs
iShift = Tim_ManBoxOutputFirst(pManTime, iBox);
for ( i = 0; i < nBoxOuts; i++ )
Gia_ObjSetTravIdCurrent(p, Gia_ManCi(p, iShift + i));
// traverse from inputs
iShift = Tim_ManBoxInputFirst(pManTime, iBox);
for ( i = 0; i < nBoxIns; i++ )
Gia_ObjSetTravIdCurrent(p, Gia_ManCo(p, iShift + i));
for ( i = 0; i < nBoxIns; i++ )
Gia_ManMarkSeqGiaWithBoxes_rec( p, Gia_ObjFanin0(Gia_ManCo(p, iShift + i)), vRoots );
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Cec_ManHandleSpecialCases( Gia_Man_t * p, Cec_ParCec_t * pPars )
{
Gia_Obj_t * pObj1, * pObj2;
Gia_Obj_t * pDri1, * pDri2;
int i;
abctime clk = Abc_Clock();
Gia_ManSetPhase( p );
Gia_ManForEachPo( p, pObj1, i )
{
pObj2 = Gia_ManPo( p, ++i );
// check if they different on all-0 pattern
// (for example, when they have the same driver but complemented)
if ( Gia_ObjPhase(pObj1) != Gia_ObjPhase(pObj2) )
{
Abc_Print( 1, "Networks are NOT EQUIVALENT. Output %d trivially differs (different phase). ", i/2 );
Abc_PrintTime( 1, "Time", Abc_Clock() - clk );
pPars->iOutFail = i/2;
Cec_ManTransformPattern( p, i/2, NULL );
return 0;
}
// get the drivers
pDri1 = Gia_ObjFanin0(pObj1);
pDri2 = Gia_ObjFanin0(pObj2);
// drivers are different PIs
if ( Gia_ObjIsPi(p, pDri1) && Gia_ObjIsPi(p, pDri2) && pDri1 != pDri2 )
{
Abc_Print( 1, "Networks are NOT EQUIVALENT. Output %d trivially differs (different PIs). ", i/2 );
Abc_PrintTime( 1, "Time", Abc_Clock() - clk );
pPars->iOutFail = i/2;
Cec_ManTransformPattern( p, i/2, NULL );
// if their compl attributes are the same - one should be complemented
assert( Gia_ObjFaninC0(pObj1) == Gia_ObjFaninC0(pObj2) );
Abc_InfoSetBit( p->pCexComb->pData, Gia_ObjCioId(pDri1) );
return 0;
}
// one of the drivers is a PI; another is a constant 0
if ( (Gia_ObjIsPi(p, pDri1) && Gia_ObjIsConst0(pDri2)) ||
(Gia_ObjIsPi(p, pDri2) && Gia_ObjIsConst0(pDri1)) )
{
Abc_Print( 1, "Networks are NOT EQUIVALENT. Output %d trivially differs (PI vs. constant). ", i/2 );
Abc_PrintTime( 1, "Time", Abc_Clock() - clk );
pPars->iOutFail = i/2;
Cec_ManTransformPattern( p, i/2, NULL );
// the compl attributes are the same - the PI should be complemented
assert( Gia_ObjFaninC0(pObj1) == Gia_ObjFaninC0(pObj2) );
if ( Gia_ObjIsPi(p, pDri1) )
Abc_InfoSetBit( p->pCexComb->pData, Gia_ObjCioId(pDri1) );
else
Abc_InfoSetBit( p->pCexComb->pData, Gia_ObjCioId(pDri2) );
return 0;
}
}
/**Function*************************************************************
Synopsis [Find the ordering of AIG objects.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Gia_ManOrderWithBoxes_rec( Gia_Man_t * p, Gia_Obj_t * pObj, Vec_Int_t * vNodes )
{
if ( Gia_ObjIsTravIdCurrent(p, pObj) )
return 0;
Gia_ObjSetTravIdCurrent(p, pObj);
if ( Gia_ObjIsCi(pObj) )
{
p->iData2 = Gia_ObjCioId(pObj);
return 1;
}
assert( Gia_ObjIsAnd(pObj) );
if ( Gia_ObjIsBuf(pObj) )
{
if ( Gia_ManOrderWithBoxes_rec( p, Gia_ObjFanin0(pObj), vNodes ) )
return 1;
Vec_IntPush( vNodes, Gia_ObjId(p, pObj) );
return 0;
}
if ( Gia_ObjSibl(p, Gia_ObjId(p, pObj)) )
if ( Gia_ManOrderWithBoxes_rec( p, Gia_ObjSiblObj(p, Gia_ObjId(p, pObj)), vNodes ) )
return 1;
if ( Gia_ManOrderWithBoxes_rec( p, Gia_ObjFanin0(pObj), vNodes ) )
return 1;
if ( Gia_ManOrderWithBoxes_rec( p, Gia_ObjFanin1(pObj), vNodes ) )
return 1;
Vec_IntPush( vNodes, Gia_ObjId(p, pObj) );
return 0;
}
/**Function*************************************************************
Synopsis [Saves the satisfying assignment as an array of literals.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
static inline void Cbs0_ManSaveModel( Cbs0_Man_t * p, Vec_Int_t * vCex )
{
Gia_Obj_t * pVar;
int i;
Vec_IntClear( vCex );
p->pProp.iHead = 0;
Cbs0_QueForEachEntry( p->pProp, pVar, i )
if ( Gia_ObjIsCi(pVar) )
// Vec_IntPush( vCex, Abc_Var2Lit(Gia_ObjId(p->pAig,pVar), !Cbs0_VarValue(pVar)) );
Vec_IntPush( vCex, Abc_Var2Lit(Gia_ObjCioId(pVar), !Cbs0_VarValue(pVar)) );
}
