/**
* Gnb Unified Register Access method
*
*
* @param[in] Device Standard configuration header
* @param[in] UraToken Ura token
* @param[in] Value Pointer to Context
*/
VOID
GnbUraSet (
IN DEV_OBJECT *Device,
IN URA_TOKEN UraToken,
IN VOID *Value
)
{
AGESA_STATUS Status;
GNB_URA_SERVICE *GnbUraProtocol;
URA_TOKEN_INFO TokenInfo;
URA_ENTRY *UraTable;
UINT32 UraTableAddress;
Status = GnbLibLocateService (GnbUraService, GnbGetSocketId (Device->GnbHandle), &GnbUraProtocol, Device->StdHeader);
ASSERT (Status == AGESA_SUCCESS);
GnbUraProtocol->GnbUraLocateRegTbl (Device, &UraTableAddress);
UraTable = (URA_ENTRY *) ((UINTN)UraTableAddress);
UraToken = UraTranslateToken (UraToken, UraTable, &TokenInfo);
if (UraToken == _UNUSED) {
return;
}
GnbUraProtocol->GnbUraSet (Device, &TokenInfo, Value);
}
/**
* Gnb Unified Register Access method
*
*
* @param[in] Device Standard configuration header
* @param[in, out] UraTokenRegister Register token
* @param[in] UraTuple Pointer to Context
* @param[in, out] CombinedCount Token count
*/
VOID
GnbUraCombinedSet (
IN DEV_OBJECT *Device,
IN URA_TOKEN UraTokenRegister,
IN OUT URA_TUPLE *UraTuple,
IN UINT32 CombinedCount
)
{
AGESA_STATUS Status;
GNB_URA_SERVICE *GnbUraProtocol;
URA_TOKEN_INFO TokenInfo;
URA_ENTRY *UraTable;
UINT32 UraTableAddress;
UINT32 RegValue;
UINT32 TempValue;
UINT32 FieldMask;
URA_TOKEN UraToken;
UINT32 Index;
Status = GnbLibLocateService (GnbUraService, GnbGetSocketId (Device->GnbHandle), &GnbUraProtocol, Device->StdHeader);
ASSERT (Status == AGESA_SUCCESS);
GnbUraProtocol->GnbUraLocateRegTbl (Device, &UraTableAddress);
UraTable = (URA_ENTRY *) ((UINTN)UraTableAddress);
UraTokenRegister = UraTranslateToken (UraTokenRegister, UraTable, &TokenInfo);
if (UraTokenRegister == _UNUSED) {
return;
}
if (TokenInfo.StreamSet == 1) {
GnbUraProtocol->GnbUraStreamSet (Device, &TokenInfo, UraTuple, CombinedCount);
} else {
GnbUraProtocol->GnbUraGet (Device, &TokenInfo, &RegValue);
Index = 0;
do {
UraToken = UraTuple[Index].Token;
UraToken = UraTranslateToken (UraToken, UraTable, &TokenInfo);
if (UraToken == _UNUSED) {
return;
}
FieldMask = (((UINT32)1 << TokenInfo.BfWidth) - 1);
TempValue = UraTuple[Index].Value & FieldMask;
RegValue &= ~(FieldMask << TokenInfo.BfOffset);
RegValue |= TempValue << TokenInfo.BfOffset;
Index++;
} while (Index < CombinedCount);
UraTokenRegister = UraTranslateToken (UraTokenRegister, UraTable, &TokenInfo);
GnbUraProtocol->GnbUraSet (Device, &TokenInfo, &RegValue);
}
}
VOID
GfxFmDisableController (
IN AMD_CONFIG_PARAMS *StdHeader
)
{
AGESA_STATUS Status;
GFX_FAM_SERVICES *GfxFamilyService;
GNB_HANDLE *GnbHandle;
GnbHandle = GnbGetHandle (StdHeader);
Status = GnbLibLocateService (GfxFamService, GnbGetSocketId (GnbHandle), &GfxFamilyService, StdHeader);
ASSERT (Status == AGESA_SUCCESS);
if (Status == AGESA_SUCCESS) {
GfxFamilyService->GfxDisableController (StdHeader);
}
}
/**
* Check if IOMMU unit present and enabled
*
*
*
*
* @param[in] GnbHandle Gnb handle
* @param[in] StdHeader Standard configuration header
*
*/
BOOLEAN
GnbFmCheckIommuPresent (
IN GNB_HANDLE *GnbHandle,
IN AMD_CONFIG_PARAMS *StdHeader
)
{
AGESA_STATUS Status;
GNB_FAM_IOMMU_SERVICES *GnbIommuConfigService;
Status = GnbLibLocateService (GnbIommuService, GnbGetSocketId (GnbHandle), &GnbIommuConfigService, StdHeader);
ASSERT (Status == AGESA_SUCCESS);
if (Status == AGESA_SUCCESS) {
return GnbIommuConfigService->GnbFmCheckIommuPresent (GnbHandle, StdHeader);
}
return FALSE;
}
BOOLEAN
GfxFmIsVbiosPosted (
IN GFX_PLATFORM_CONFIG *Gfx
)
{
AGESA_STATUS Status;
GFX_FAM_SERVICES *GfxFamilyService;
GNB_HANDLE *GnbHandle;
GnbHandle = GnbGetHandle (GnbLibGetHeader (Gfx));
Status = GnbLibLocateService (GfxFamService, GnbGetSocketId (GnbHandle), &GfxFamilyService, GnbLibGetHeader (Gfx));
ASSERT (Status == AGESA_SUCCESS);
if (Status == AGESA_SUCCESS) {
return GfxFamilyService->GfxIsVbiosPosted (Gfx);
}
return TRUE;
}
/**
* Build configuration
*
*
* @param[in] SocketId Socket ID.
* @param[out] Buffer Pointer to buffer to build internal complex data structure
* @param[out] StdHeader Standard configuration header.
* @retval AGESA_SUCCESS Configuration data build successfully
*/
AGESA_STATUS
PcieFmBuildComplexConfiguration (
IN UINT8 SocketId,
OUT VOID *Buffer,
IN AMD_CONFIG_PARAMS *StdHeader
)
{
AGESA_STATUS Status;
PCIe_FAM_CONFIG_SERVICES *PcieConfigService;
Status = GnbLibLocateService (GnbPcieFamConfigService, SocketId, (VOID **)&PcieConfigService, StdHeader);
ASSERT (Status == AGESA_SUCCESS);
if (Status == AGESA_SUCCESS) {
return PcieConfigService->PcieFmBuildComplexConfiguration (SocketId, Buffer, StdHeader);
}
return Status;
}
/**
* Get total number of silicons/wrappers/engines for this complex
*
*
*
* @param[in] SocketId Socket ID.
* @param[out] Length Length of configuration info block
* @param[out] StdHeader Standard Configuration Header
* @retval AGESA_SUCCESS Configuration data length is correct
*/
AGESA_STATUS
PcieFmGetComplexDataLength (
IN UINT8 SocketId,
OUT UINTN *Length,
IN AMD_CONFIG_PARAMS *StdHeader
)
{
AGESA_STATUS Status;
PCIe_FAM_CONFIG_SERVICES *PcieConfigService;
Status = GnbLibLocateService (GnbPcieFamConfigService, SocketId, (VOID **)&PcieConfigService, StdHeader);
ASSERT (Status == AGESA_SUCCESS);
if (Status == AGESA_SUCCESS) {
return PcieConfigService->PcieFmGetComplexDataLength (SocketId, Length, StdHeader);
}
return Status;
}
/**
* Get SB port info
*
*
* @param[out] SocketId Socket ID
* @param[out] SbPort Pointer to SB configuration descriptor
* @param[in] StdHeader Standard configuration header.
* @retval AGESA_SUCCESS SB configuration determined successfully
*/
AGESA_STATUS
PcieFmGetSbConfigInfo (
IN UINT8 SocketId,
OUT PCIe_PORT_DESCRIPTOR *SbPort,
IN AMD_CONFIG_PARAMS *StdHeader
)
{
AGESA_STATUS Status;
PCIe_FAM_CONFIG_SERVICES *PcieConfigService;
Status = GnbLibLocateService (GnbPcieFamConfigService, SocketId, (VOID **)&PcieConfigService, StdHeader);
ASSERT (Status == AGESA_SUCCESS);
if (Status == AGESA_SUCCESS) {
return PcieConfigService->PcieFmGetSbConfigInfo (SocketId, SbPort, StdHeader);
}
return Status;
}
AGESA_STATUS
GnbFmCreateIvrsEntry (
IN GNB_HANDLE *GnbHandle,
IN IVRS_BLOCK_TYPE Type,
IN VOID *Ivrs,
IN AMD_CONFIG_PARAMS *StdHeader
)
{
AGESA_STATUS Status;
GNB_FAM_IOMMU_SERVICES *GnbIommuConfigService;
Status = GnbLibLocateService (GnbIommuService, GnbGetSocketId (GnbHandle), &GnbIommuConfigService, StdHeader);
ASSERT (Status == AGESA_SUCCESS);
if (Status == AGESA_SUCCESS) {
return GnbIommuConfigService->GnbFmCreateIvrsEntry (GnbHandle, Type, Ivrs, StdHeader);
}
return Status;
}
UINT32
GfxFmCalculateClock (
IN UINT8 Did,
IN AMD_CONFIG_PARAMS *StdHeader
)
{
AGESA_STATUS Status;
GFX_FAM_SERVICES *GfxFamilyService;
GNB_HANDLE *GnbHandle;
GnbHandle = GnbGetHandle (StdHeader);
Status = GnbLibLocateService (GfxFamService, GnbGetSocketId (GnbHandle), &GfxFamilyService, StdHeader);
ASSERT (Status == AGESA_SUCCESS);
if (Status == AGESA_SUCCESS) {
return GfxFamilyService->GfxCalculateClock (Did, StdHeader);
}
return 200*100;
}
/**
* Set current link speed
*
*
* @param[in] LinkSpeedCapability Link Speed Capability
* @param[in] Engine Pointer to engine configuration descriptor
* @param[in] Pcie Pointer to global PCIe configuration
*
*/
VOID
PcieFmSetLinkSpeedCap (
IN PCIE_LINK_SPEED_CAP LinkSpeedCapability,
IN PCIe_ENGINE_CONFIG *Engine,
IN PCIe_PLATFORM_CONFIG *Pcie
)
{
AGESA_STATUS Status;
PCIe_COMPLEX_CONFIG *Complex;
PCIe_FAM_INIT_SERVICES *PcieInitService;
Complex = (PCIe_COMPLEX_CONFIG *) PcieConfigGetParent (DESCRIPTOR_COMPLEX, &Engine->Header);
Status = GnbLibLocateService (GnbPcieFamInitService, Complex->SocketId, (VOID **)&PcieInitService, GnbLibGetHeader (Pcie));
ASSERT (Status == AGESA_SUCCESS);
if (Status == AGESA_SUCCESS) {
PcieInitService->PcieFmSetLinkSpeedCap (LinkSpeedCapability, Engine, Pcie);
}
}
/**
* Family specific time stamp function
*
*
* @param[in] StdHeader Standard configuration header
* @retval Count
*/
UINT32
GnbFmTimeStamp (
IN AMD_CONFIG_PARAMS *StdHeader
)
{
AGESA_STATUS Status;
GNB_FAM_TS_SERVICES *GnbFamTsFunc;
GNB_HANDLE *GnbHandle;
GnbHandle = GnbGetHandle (StdHeader);
Status = GnbLibLocateService (GnbFamTsService, GnbGetSocketId (GnbHandle), &GnbFamTsFunc, StdHeader);
ASSERT (Status == AGESA_SUCCESS);
if (Status == AGESA_SUCCESS) {
return GnbFamTsFunc->GnbFmTimeStamp (StdHeader);
}
return 0;
}
/**
* Map graphics engine to display path
*
*
*
*
* @param[in] Engine Engine configuration info
* @param[out] DisplayPathList Display path list
* @param[in] Gfx Pointer to global GFX configuration
*
*/
AGESA_STATUS
GfxFmMapEngineToDisplayPath (
IN PCIe_ENGINE_CONFIG *Engine,
OUT EXT_DISPLAY_PATH *DisplayPathList,
IN GFX_PLATFORM_CONFIG *Gfx
)
{
AGESA_STATUS Status;
GFX_FAM_SERVICES *GfxFamilyService;
GNB_HANDLE *GnbHandle;
GnbHandle = GnbGetHandle (GnbLibGetHeader (Gfx));
Status = GnbLibLocateService (GfxFamService, GnbGetSocketId (GnbHandle), &GfxFamilyService, GnbLibGetHeader (Gfx));
ASSERT (Status == AGESA_SUCCESS);
if (Status == AGESA_SUCCESS) {
return GfxFamilyService->GfxMapEngineToDisplayPath (Engine, DisplayPathList, Gfx);
}
return Status;
}
CONST CHAR8*
PcieFmDebugGetWrapperNameString (
IN PCIe_WRAPPER_CONFIG *Wrapper
)
{
AGESA_STATUS Status;
PCIe_COMPLEX_CONFIG *Complex;
PCIe_PLATFORM_CONFIG *Pcie;
PCIe_FAM_DEBUG_SERVICES *PcieDebugService;
Complex = (PCIe_COMPLEX_CONFIG *) PcieConfigGetParent (DESCRIPTOR_COMPLEX, &Wrapper->Header);
Pcie = (PCIe_PLATFORM_CONFIG *) PcieConfigGetParent (DESCRIPTOR_PLATFORM, &Complex->Header);
Status = GnbLibLocateService (GnbPcieFamDebugService, Complex->SocketId, (VOID **)&PcieDebugService, GnbLibGetHeader (Pcie));
ASSERT (Status == AGESA_SUCCESS);
if (Status == AGESA_SUCCESS) {
return PcieDebugService->PcieFmDebugGetWrapperNameString (Wrapper);
}
return " !!! Something Wrong !!!";
}
AGESA_STATUS
PcieFmMapPortPciAddress (
IN PCIe_ENGINE_CONFIG *Engine
)
{
AGESA_STATUS Status;
PCIe_COMPLEX_CONFIG *Complex;
PCIe_PLATFORM_CONFIG *Pcie;
PCIe_FAM_CONFIG_SERVICES *PcieConfigService;
Complex = (PCIe_COMPLEX_CONFIG *) PcieConfigGetParent (DESCRIPTOR_COMPLEX, &Engine->Header);
Pcie = (PCIe_PLATFORM_CONFIG *) PcieConfigGetParent (DESCRIPTOR_PLATFORM, &Complex->Header);
Status = GnbLibLocateService (GnbPcieFamConfigService, Complex->SocketId, (VOID **)&PcieConfigService, GnbLibGetHeader (Pcie));
ASSERT (Status == AGESA_SUCCESS);
if (Status == AGESA_SUCCESS) {
return PcieConfigService->PcieFmMapPortPciAddress (Engine);
}
return AGESA_ERROR;
}
/**
* Get native PHY lane bitmap
*
*
* @param[in] PhyLaneBitmap Package PHY lane bitmap
* @param[in] Engine Standard configuration header.
* @retval Native PHY lane bitmap
*/
UINT32
PcieFmGetNativePhyLaneBitmap (
IN UINT32 PhyLaneBitmap,
IN PCIe_ENGINE_CONFIG *Engine
)
{
AGESA_STATUS Status;
PCIe_COMPLEX_CONFIG *Complex;
PCIe_PLATFORM_CONFIG *Pcie;
PCIe_FAM_INIT_SERVICES *PcieInitService;
Complex = (PCIe_COMPLEX_CONFIG *) PcieConfigGetParent (DESCRIPTOR_COMPLEX, &Engine->Header);
Pcie = (PCIe_PLATFORM_CONFIG *) PcieConfigGetParent (DESCRIPTOR_PLATFORM, &Complex->Header);
Status = GnbLibLocateService (GnbPcieFamInitService, Complex->SocketId, (VOID **)&PcieInitService, GnbLibGetHeader (Pcie));
ASSERT (Status == AGESA_SUCCESS);
if (Status == AGESA_SUCCESS) {
return PcieInitService->PcieFmGetNativePhyLaneBitmap (PhyLaneBitmap, Engine);
}
return 0x0;
}
/**
* Get register address name
*
* Debug function for logging register trace
*
* @param[in] Silicon Silicon config descriptor
* @param[in] AddressFrame Address Frame
* @retval Register address name
*/
CONST CHAR8*
PcieFmDebugGetHostRegAddressSpaceString (
IN PCIe_SILICON_CONFIG *Silicon,
IN UINT16 AddressFrame
)
{
AGESA_STATUS Status;
PCIe_COMPLEX_CONFIG *Complex;
PCIe_PLATFORM_CONFIG *Pcie;
PCIe_FAM_DEBUG_SERVICES *PcieDebugService;
Complex = (PCIe_COMPLEX_CONFIG *) PcieConfigGetParent (DESCRIPTOR_COMPLEX, &Silicon->Header);
Pcie = (PCIe_PLATFORM_CONFIG *) PcieConfigGetParent (DESCRIPTOR_PLATFORM, &Complex->Header);
Status = GnbLibLocateService (GnbPcieFamDebugService, Complex->SocketId, (VOID **)&PcieDebugService, GnbLibGetHeader (Pcie));
ASSERT (Status == AGESA_SUCCESS);
if (Status == AGESA_SUCCESS) {
return PcieDebugService->PcieFmDebugGetHostRegAddressSpaceString (Silicon, AddressFrame);
}
return " !!! Something Wrong !!!";
}
BOOLEAN
PcieFmCheckPortPcieLaneCanBeMuxed (
IN PCIe_PORT_DESCRIPTOR *PortDescriptor,
IN PCIe_ENGINE_CONFIG *Engine
)
{
AGESA_STATUS Status;
PCIe_COMPLEX_CONFIG *Complex;
PCIe_PLATFORM_CONFIG *Pcie;
PCIe_FAM_CONFIG_SERVICES *PcieConfigService;
Complex = (PCIe_COMPLEX_CONFIG *) PcieConfigGetParent (DESCRIPTOR_COMPLEX, &Engine->Header);
Pcie = (PCIe_PLATFORM_CONFIG *) PcieConfigGetParent (DESCRIPTOR_PLATFORM, &Complex->Header);
Status = GnbLibLocateService (GnbPcieFamConfigService, Complex->SocketId, (VOID **)&PcieConfigService, GnbLibGetHeader (Pcie));
ASSERT (Status == AGESA_SUCCESS);
if (Status == AGESA_SUCCESS) {
return PcieConfigService->PcieFmCheckPortPcieLaneCanBeMuxed (PortDescriptor, Engine);
}
return FALSE;
}
/**
* Get max link speed capability supported by this port
*
*
*
* @param[in] Flags See Flags PCIE_PORT_GEN_CAP_BOOT / PCIE_PORT_GEN_CAP_MAX
* @param[in] Engine Pointer to engine config descriptor
* @retval PcieGen1/PcieGen2 Max supported link gen capability
*/
PCIE_LINK_SPEED_CAP
PcieFmGetLinkSpeedCap (
IN UINT32 Flags,
IN PCIe_ENGINE_CONFIG *Engine
)
{
AGESA_STATUS Status;
PCIe_COMPLEX_CONFIG *Complex;
PCIe_PLATFORM_CONFIG *Pcie;
PCIe_FAM_INIT_SERVICES *PcieInitService;
Complex = (PCIe_COMPLEX_CONFIG *) PcieConfigGetParent (DESCRIPTOR_COMPLEX, &Engine->Header);
Pcie = (PCIe_PLATFORM_CONFIG *) PcieConfigGetParent (DESCRIPTOR_PLATFORM, &Complex->Header);
Status = GnbLibLocateService (GnbPcieFamInitService, Complex->SocketId, (VOID **)&PcieInitService, GnbLibGetHeader (Pcie));
ASSERT (Status == AGESA_SUCCESS);
if (Status == AGESA_SUCCESS) {
return PcieInitService->PcieFmGetLinkSpeedCap (Flags, Engine);
}
return PcieGen1;
}
CONST CHAR8*
PcieFmDebugGetCoreConfigurationString (
IN PCIe_WRAPPER_CONFIG *Wrapper,
IN UINT8 ConfigurationValue
)
{
AGESA_STATUS Status;
PCIe_COMPLEX_CONFIG *Complex;
PCIe_PLATFORM_CONFIG *Pcie;
PCIe_FAM_DEBUG_SERVICES *PcieDebugService;
Complex = (PCIe_COMPLEX_CONFIG *) PcieConfigGetParent (DESCRIPTOR_COMPLEX, &Wrapper->Header);
Pcie = (PCIe_PLATFORM_CONFIG *) PcieConfigGetParent (DESCRIPTOR_PLATFORM, &Complex->Header);
Status = GnbLibLocateService (GnbPcieFamDebugService, Complex->SocketId, &PcieDebugService, GnbLibGetHeader (Pcie));
ASSERT (Status == AGESA_SUCCESS);
if (Status == AGESA_SUCCESS) {
return PcieDebugService->PcieFmDebugGetCoreConfigurationString (Wrapper, ConfigurationValue);
}
return " !!! Unsupported Core Configuration !!!";
}
/**
* Get base SSDT table
*
*
*
* @param[in] StdHeader Standard Configuration Header
* @retval pointer to SSTD table
*/
VOID *
GnbFmAlibGetBaseTable (
IN AMD_CONFIG_PARAMS *StdHeader
)
{
AGESA_STATUS Status;
GNB_FAM_ALIB_SERVICES *GnbFamilyAlibService;
GNB_HANDLE *GnbHandle;
VOID *AlibSsdtTable;
AlibSsdtTable = NULL;
GnbHandle = GnbGetHandle (StdHeader);
Status = GnbLibLocateService (GnbFamAlibService, GnbGetSocketId (GnbHandle), &GnbFamilyAlibService, StdHeader);
ASSERT (Status == AGESA_SUCCESS);
if (Status == AGESA_SUCCESS) {
AlibSsdtTable = GnbFamilyAlibService->GnbFmAlibGetBaseTable (StdHeader);
}
return AlibSsdtTable;
}
/**
* Get GnbBuildOptionsCommon Structure
*
*
*
* @param[in] StdHeader Standard Configuration Header
* @retval pointer to SSTD table
*/
VOID *
GnbFmGnbBuildOptions (
IN AMD_CONFIG_PARAMS *StdHeader
)
{
AGESA_STATUS Status;
GNB_FAM_BUILDOPTIONS_POINTERS *GnbFamilyBuildOptionsService;
GNB_HANDLE *GnbHandle;
VOID *GnbBuildOptionsPtr;
GnbBuildOptionsPtr = NULL;
GnbHandle = GnbGetHandle (StdHeader);
Status = GnbLibLocateService (GnbFamBuildOptionPointer, GnbGetSocketId (GnbHandle), &GnbFamilyBuildOptionsService, StdHeader);
ASSERT (Status == AGESA_SUCCESS);
if (Status == AGESA_SUCCESS) {
GnbBuildOptionsPtr = GnbFamilyBuildOptionsService->GnbFmGetBuildOptions (StdHeader);
}
return GnbBuildOptionsPtr;
}
/**
* Configure engine list to support lane allocation according to configuration ID.
*
*
*
* @param[in] Wrapper Pointer to wrapper config descriptor
* @param[in] EngineType Engine Type
* @param[in] ConfigurationId Configuration ID
* @retval AGESA_SUCCESS Configuration successfully applied
* @retval AGESA_UNSUPPORTED No more configuration available for given engine type
* @retval AGESA_ERROR Requested configuration not supported
*/
AGESA_STATUS
PcieFmConfigureEnginesLaneAllocation (
IN PCIe_WRAPPER_CONFIG *Wrapper,
IN PCIE_ENGINE_TYPE EngineType,
IN UINT8 ConfigurationId
)
{
AGESA_STATUS Status;
PCIe_COMPLEX_CONFIG *Complex;
PCIe_PLATFORM_CONFIG *Pcie;
PCIe_FAM_CONFIG_SERVICES *PcieConfigService;
Complex = (PCIe_COMPLEX_CONFIG *) PcieConfigGetParent (DESCRIPTOR_COMPLEX, &Wrapper->Header);
Pcie = (PCIe_PLATFORM_CONFIG *) PcieConfigGetParent (DESCRIPTOR_PLATFORM, &Wrapper->Header);
Status = GnbLibLocateService (GnbPcieFamConfigService, Complex->SocketId, (VOID **)&PcieConfigService, GnbLibGetHeader (Pcie));
ASSERT (Status == AGESA_SUCCESS);
if (Status == AGESA_SUCCESS) {
return PcieConfigService->PcieFmConfigureEnginesLaneAllocation (Wrapper, EngineType, ConfigurationId);
}
return AGESA_ERROR;
}
/**
* Get core configuration value
*
*
*
* @param[in] Wrapper Pointer to internal configuration data area
* @param[in] CoreId Core ID
* @param[in] ConfigurationSignature Configuration signature
* @param[out] ConfigurationValue Configuration value (for core configuration)
* @retval AGESA_SUCCESS Configuration successfully applied
* @retval AGESA_ERROR Core configuration value can not be determined
*/
AGESA_STATUS
PcieFmGetCoreConfigurationValue (
IN PCIe_WRAPPER_CONFIG *Wrapper,
IN UINT8 CoreId,
IN UINT64 ConfigurationSignature,
IN UINT8 *ConfigurationValue
)
{
AGESA_STATUS Status;
PCIe_COMPLEX_CONFIG *Complex;
PCIe_PLATFORM_CONFIG *Pcie;
PCIe_FAM_INIT_SERVICES *PcieInitService;
Complex = (PCIe_COMPLEX_CONFIG *) PcieConfigGetParent (DESCRIPTOR_COMPLEX, &Wrapper->Header);
Pcie = (PCIe_PLATFORM_CONFIG *) PcieConfigGetParent (DESCRIPTOR_PLATFORM, &Wrapper->Header);
Status = GnbLibLocateService (GnbPcieFamInitService, Complex->SocketId, (VOID **)&PcieInitService, GnbLibGetHeader (Pcie));
ASSERT (Status == AGESA_SUCCESS);
if (Status == AGESA_SUCCESS) {
return PcieInitService->PcieFmGetCoreConfigurationValue (Wrapper, CoreId, ConfigurationSignature, ConfigurationValue);
}
return AGESA_ERROR;
}
