HAL_ISR_FUNCTION(port1Isr, P1INT_VECTOR)
#endif
{
HAL_ENTER_ISR();
#endif
PxIFG = 0;
PxIF = 0;
spiRdyIsr = 1;
#if !defined HAL_SPI_MASTER
if (spiTxLen == 0)
{
#if !defined HAL_SBL_BOOT_CODE
CLEAR_SLEEP_MODE();
UxDBUF = 0x00;
SPI_SET_RDY_OUT();
#endif
SPI_CLR_RDY_OUT(); /* SPI_RDYOut = 1 */
}
#endif
#if !defined HAL_SBL_BOOT_CODE
CLEAR_SLEEP_MODE();
HAL_EXIT_ISR();
#endif
HAL_ENABLE_INTERRUPTS();
}
/******************************************************************************
* @fn HalDMAInit
*
* @brief DMA Interrupt Service Routine
*
* @param None
*
* @return None
*****************************************************************************/
HAL_ISR_FUNCTION( halDmaIsr, DMA_VECTOR )
{
HAL_ENTER_ISR();
DMAIF = 0;
if (ZNP_CFG1_UART == znpCfg1)
{
if (HAL_DMA_CHECK_IRQ(HAL_DMA_CH_TX))
{
extern void HalUARTIsrDMA(void);
HalUARTIsrDMA();
}
}
else
{
if ( HAL_DMA_CHECK_IRQ( HAL_DMA_CH_RX ) )
{
HAL_DMA_CLEAR_IRQ( HAL_DMA_CH_RX );
HalSpiRxIsr();
}
if ( HAL_DMA_CHECK_IRQ( HAL_DMA_CH_TX ) )
{
HAL_DMA_CLEAR_IRQ( HAL_DMA_CH_TX );
HalSpiTxIsr();
}
}
HAL_EXIT_ISR();
}
/*
******************************************************************************
*
* INTERRUPT SERVICE ROUTINE
*
******************************************************************************
*/
HAL_ISR_FUNCTION(halKeyPort0Isr, P0INT_VECTOR)
{
HAL_ENTER_ISR();
if (HAL_KEY_SW_1_PXIFG & HAL_KEY_SW_1_BIT) {
halProcessKeyInterrupt();
}
// if (HAL_KEY_SW_2_PXIFG & HAL_KEY_SW_2_BIT) {
//
// }
// if (HAL_KEY_SW_3_PXIFG & HAL_KEY_SW_3_BIT) {
//
// }
if (GSINT_PXIFG & GSINT1_BV) {
adxl345_int1_isr();
}
if (GSINT_PXIFG & GSINT2_BV) {
adxl345_int2_isr();
}
#ifdef POWER_SAVING
CLEAR_SLEEP_MODE();
#endif
/*
* Clear the CPU interrupt flag for Port_0
* PxIFG has to be cleared before PxIF
*/
P0IFG = 0;
P0IF = 0;
HAL_EXIT_ISR();
}
HAL_ISR_FUNCTION(port2Isr, P2INT_VECTOR)
{
unsigned char status;
unsigned char i;
HAL_ENTER_ISR();
status = P2IFG;
status &= P2IEN;
if (status)
{
P2IFG = ~status;
P2IF = 0;
for (i = 0; i < OS_MAX_INTERRUPT; i++)
{
if (PIN_MAJOR(blueBasic_interrupts[i].pin) == 2 && (status & (1 << PIN_MINOR(blueBasic_interrupts[i].pin))))
{
osal_set_event(blueBasic_TaskID, BLUEBASIC_EVENT_INTERRUPT << i);
}
}
}
HAL_EXIT_ISR();
}
/******************************************************************************
* @fn HalDMAInit
*
* @brief DMA Interrupt Service Routine
*
* @param None
*
* @return None
*****************************************************************************/
HAL_ISR_FUNCTION( halDmaIsr, DMA_VECTOR )
{
HAL_ENTER_ISR();
DMAIF = 0;
if (ZNP_CFG1_UART == znpCfg1)
{
if (HAL_DMA_CHECK_IRQ(HAL_DMA_CH_TX))
{
extern void HalUARTIsrDMA(void);
HalUARTIsrDMA();
}
}
#if (defined HAL_SPI) && (HAL_SPI == TRUE)
else
{
if ( HAL_DMA_CHECK_IRQ( HAL_DMA_CH_RX ) )
{
HAL_DMA_CLEAR_IRQ( HAL_DMA_CH_RX );
HalSpiRxIsr();
}
if ( HAL_DMA_CHECK_IRQ( HAL_DMA_CH_TX ) )
{
HAL_DMA_CLEAR_IRQ( HAL_DMA_CH_TX );
HalSpiTxIsr();
}
}
#endif // #if (defined HAL_SPI) && (HAL_SPI == TRUE)
HAL_EXIT_ISR();
}
/**************************************************************************************************
* @fn halKeyPort0Isr
*
* @brief Port0 ISR
*
* @param
*
* @return
**************************************************************************************************/
HAL_ISR_FUNCTION( halKeyPort0Isr, P0INT_VECTOR )
{
HAL_ENTER_ISR();
#if defined ( CC2540_MINIDK )|| (JANSION_KEY)
if ((HAL_KEY_SW_1_PXIFG & HAL_KEY_SW_1_BIT) || (HAL_KEY_SW_2_PXIFG & HAL_KEY_SW_2_BIT))
#else
if (HAL_KEY_SW_6_PXIFG & HAL_KEY_SW_6_BIT)
#endif
{
halProcessKeyInterrupt();
}
/*
Clear the CPU interrupt flag for Port_0
PxIFG has to be cleared before PxIF
*/
#if defined ( CC2540_MINIDK )|| (JANSION_KEY)
HAL_KEY_SW_1_PXIFG = 0;
HAL_KEY_SW_2_PXIFG = 0;
#else
HAL_KEY_SW_6_PXIFG = 0;
#endif
HAL_KEY_CPU_PORT_0_IF = 0;
CLEAR_SLEEP_MODE();
HAL_EXIT_ISR();
return;
}
HAL_ISR_FUNCTION(port1Isr, URX1_VECTOR)
{
#if defined (_XBEE_APP_)
static uint8 index = 0;
uint8 add_sum,check;
uint8 flag;
HAL_ENTER_ISR();
URX1IF = 0; // ÇåÖжϱêÖ¾
if(index == 0 && U1DBUF == 0xAA)
{
temp_uart[0] = U1DBUF;
index = 1;
}
else if(index == 1 && U1DBUF == 0xBB)
{
temp_uart[index] = U1DBUF;
index = 2;
}
else if(index ==2 && U1DBUF == 0xCC)
{
temp_uart[index] = U1DBUF;
index = 3;
}
else if(index >= 3)
{
temp_uart[index] = U1DBUF;
index++;
}
if( index >= 10 )
{
index = 0;
add_sum = 0;
for(int i=0;i<9;i++)
add_sum += temp_uart[i];
check = 0xFF - add_sum;
if(temp_uart[0] == 0xAA && temp_uart[1] == 0xBB && temp_uart[2] == 0xCC \
&& temp_uart[9] == check)
{
hmc5983Data.x = (unsigned short)temp_uart[3] << 8 | temp_uart[4];
hmc5983Data.y = (unsigned short)temp_uart[5] << 8 | temp_uart[6];
hmc5983Data.z = (unsigned short)temp_uart[7] << 8 | temp_uart[8];
hmc5983Data.state = 0x88;
flag = SenFlag;
if(flag == 0x88)
{
SenFlag = 1;
hmc5983DataStandard.x = hmc5983Data.x;
hmc5983DataStandard.y = hmc5983Data.y;
hmc5983DataStandard.z = hmc5983Data.z;
}
}
}
HAL_EXIT_ISR();
#endif
}
/**************************************************************************************************
* @fn halSleepTimerIsr
*
* @brief Sleep timer ISR.
*
* input parameters
*
* None.
*
* output parameters
*
* None.
*
* @return None.
**************************************************************************************************
*/
HAL_ISR_FUNCTION(halSleepTimerIsr, ST_VECTOR)
{
HAL_ENTER_ISR();
HAL_SLEEP_TIMER_CLEAR_INT();
#ifdef HAL_SLEEP_DEBUG_POWER_MODE
halSleepInt = TRUE;
#endif
CLEAR_SLEEP_MODE();
HAL_EXIT_ISR();
}
/**************************************************************************************************
* @fn macMcuRfIsr
*
* @brief Interrupt service routine that handles all RF interrupts. There are a number
* of conditions "ganged" onto this one ISR so each condition must be tested for.
*
* @param none
*
* @return none
**************************************************************************************************
*/
HAL_ISR_FUNCTION( macMcuRfIsr, RF_VECTOR )
{
uint8 rfim;
HAL_ENTER_ISR();
rfim = RFIRQM1;
/* The CPU level RF interrupt flag must be cleared here (before clearing RFIRQFx).
* to allow the interrupts to be nested.
*/
S1CON = 0x00;
if ((RFIRQF1 & IRQ_CSP_MANINT) & rfim)
{
/*
* Important! Because of how the CSP programs are written, CSP_INT interrupts should
* be processed before CSP_STOP interrupts. This becomes an issue when there are
* long critical sections.
*/
/* clear flag */
RFIRQF1 = ~IRQ_CSP_MANINT;
macCspTxIntIsr();
}
else if ((RFIRQF1 & IRQ_CSP_STOP) & rfim)
{
/* clear flag */
RFIRQF1 = ~IRQ_CSP_STOP;
macCspTxStopIsr();
}
else if ((RFIRQF1 & IRQ_TXACKDONE) & rfim)
{
/* disable interrupt - set up is for "one shot" operation */
RFIRQM1 &= ~IM_TXACKDONE;
macRxAckTxDoneCallback();
}
rfim = RFIRQM0;
/* process RFIRQF0 next */
if ((RFIRQF0 & IRQ_FIFOP) & rfim)
{
/* continue to execute interrup t handler as long as FIFOP is active */
do
{
macRxThresholdIsr();
RFIRQF0 = ~IRQ_FIFOP;
} while (FSMSTAT1 & FIFOP);
}
CLEAR_SLEEP_MODE();
HAL_EXIT_ISR();
}
/**************************************************************************************************
* @fn macMcuTimer2Isr
*
* @brief Interrupt service routine for timer2, the MAC timer.
*
* @param none
*
* @return none
**************************************************************************************************
*/
HAL_ISR_FUNCTION( macMcuTimer2Isr, T2_VECTOR )
{
uint8 t2irqm;
uint8 t2irqf;
HAL_ENTER_ISR();
t2irqm = T2IRQM;
t2irqf = T2IRQF;
/*------------------------------------------------------------------------------------------------
* Overflow compare interrupt - triggers when then overflow counter is
* equal to the overflow compare register.
*/
if ((t2irqf & TIMER2_OVF_COMPARE1F) & t2irqm)
{
/* call function for dealing with the timer compare interrupt */
macBackoffTimerCompareIsr();
/* clear overflow compare interrupt flag */
T2IRQF = ~TIMER2_OVF_COMPARE1F;
}
/*------------------------------------------------------------------------------------------------
* Overflow compare interrupt - triggers when then overflow counter is
* equal to the overflow compare register.
*/
if ((t2irqf & TIMER2_OVF_PERF) & t2irqm)
{
/* call function for dealing with the timer compare interrupt */
macBackoffTimerPeriodIsr();
/* clear overflow compare interrupt flag */
T2IRQF = ~TIMER2_OVF_PERF;
}
/*------------------------------------------------------------------------------------------------
* Overflow interrupt - triggers when the hardware timer rolls over.
*/
else if ((t2irqf & TIMER2_PERF) & t2irqm)
{
/* call energy detect interrupt function, this interrupt not used for any other functionality */
mcuRecordMaxRssiIsr();
/* clear the interrupt flag */
T2IRQF = ~TIMER2_PERF;
}
CLEAR_SLEEP_MODE();
HAL_EXIT_ISR();
}
HAL_ISR_FUNCTION(port1Isr, P1INT_VECTOR)
#endif
{
HAL_ENTER_ISR();
PxIFG = 0;
PxIF = 0;
dmaRdyIsr = 1;
CLEAR_SLEEP_MODE();
HAL_EXIT_ISR();
}
/**************************************************************************************************
* @fn halKeyPort1Isr
*
* @brief Port1 ISR
*
* @param
*
* @return
**************************************************************************************************/
HAL_ISR_FUNCTION( halKeyPort1Isr, P1INT_VECTOR )
{
HAL_ENTER_ISR();
halProcessKeyInterrupt();
#if HAL_KEY
P1IFG = (uint8) (~HAL_KEY_P1_INTERRUPT_PINS);
P1IF = 0;
#endif
CLEAR_SLEEP_MODE();
HAL_EXIT_ISR();
}
HAL_ISR_FUNCTION(port0Isr, P0INT_VECTOR)
{
HAL_ENTER_ISR();
if (P0IFG & NP_RDYIn_BIT)
{
npSpiMrdyIsr();
}
P0IFG = 0; // since interrupt is enabled for all four bits together clear all.
P0IF = 0;
HAL_EXIT_ISR();
}
__interrupt void P1_ISR(void) {
//HM-10 - Disable pin interrupts and re-enable UART
HAL_ENTER_ISR();
P1IFG = 0;
P1IF = 0;
uint8 pV = P1_7;
if(pV) {
//active low
activeMode();
}
CLEAR_SLEEP_MODE();
HAL_EXIT_ISR();
}
__interrupt void P0_ISR(void) {
//HM-11 - Disable pin interrupts and re-enable UART
HAL_ENTER_ISR();
//clear interrupt
P0IFG = 0;
P0IF = 0;
uint8 pV = P0_2;
if(pV == 0) {
activeMode();
}
CLEAR_SLEEP_MODE();
HAL_EXIT_ISR();
}
HAL_ISR_FUNCTION(port1Isr, P1INT_VECTOR)
#endif
{
HAL_ENTER_ISR();
HalUARTResume();
if (dmaCfg.uartCB != NULL)
{
dmaCfg.uartCB(HAL_UART_DMA-1, HAL_UART_RX_WAKEUP);
}
PxIFG = 0;
PxIF = 0;
HAL_EXIT_ISR();
}
/**************************************************************************************************
* @fn halAccelPort1Isr
*
* @brief Port 1 ISR
*
* @param
*
* @return
**************************************************************************************************/
HAL_ISR_FUNCTION( halAccelPort1Isr, P1INT_VECTOR )
{
HAL_ENTER_ISR();
/* Make sure we're processing the desired interrupt */
if ((P1IFG & HAL_ACCEL_P1_INTERRUPT_PINS) && (P1IEN & HAL_ACCEL_P1_INTERRUPT_PINS))
{
halAccelProcessMotionDetectInterrupt();
}
P1IFG = 0;
P1IF = 0;
HAL_EXIT_ISR();
}
/*
******************************************************************************
* @fn halKeyPort2Isr
*
* @brief Port2 ISR
******************************************************************************
*/
HAL_ISR_FUNCTION(halI2CIsr, I2C_VECTOR)
{
HAL_ENTER_ISR();
#ifdef POWER_SAVING
CLEAR_SLEEP_MODE();
#endif
/*
* Clear the CPU interrupt flag for Port_2
* PxIFG has to be cleared before PxIF
* Notes: P2_1 and P2_2 are debug lines.
*/
P2IFG = 0;
P2IF = 0;
HAL_EXIT_ISR();
}
HAL_ISR_FUNCTION(port1Isr, P1INT_VECTOR)
#endif
{
HAL_ENTER_ISR();
#endif
PxIFG = 0;
PxIF = 0;
spiRdyIsr = 1;
#if !defined HAL_SBL_BOOT_CODE
CLEAR_SLEEP_MODE();
HAL_EXIT_ISR();
#endif
HAL_ENABLE_INTERRUPTS();
}
/**************************************************************************************************
* @fn macMcuRfErrIsr
*
* @brief Interrupt service routine that handles all RF Error interrupts. Only the RX FIFO
* overflow condition is handled.
*
* @param none
*
* @return none
**************************************************************************************************
*/
HAL_ISR_FUNCTION( macMcuRfErrIsr, RFERR_VECTOR )
{
uint8 rferrm;
HAL_ENTER_ISR();
rferrm = RFERRM;
if ((RFERRF & RFERR_RXOVERF) & rferrm)
{
RFERRF = ~RFERR_RXOVERF;
macRxFifoOverflowIsr();
}
CLEAR_SLEEP_MODE();
HAL_EXIT_ISR();
}
/**************************************************************************************************
* @fn halKeyPort1Isr
*
* @brief Port1 ISR
*
* @param
*
* @return
**************************************************************************************************/
HAL_ISR_FUNCTION( ButtonDownIsr, P1INT_VECTOR )
{
HAL_ENTER_ISR();
if(P1IFG & 0x04)
{
P1IFG &= 0xFB; //clear interrupt flag
IRCON2 &= 0xF7; //clear CPU interrupt flag
osal_start_timerEx (MiniBeacon_TaskID, SBP_BUTTON_DOWN_EVT, 25);
}
CLEAR_SLEEP_MODE();
HAL_EXIT_ISR();
return;
}
/**************************************************************************************************
* @fn halKeyPort0Isr
*
* @brief Port0 ISR
*
* @param
*
* @return
**************************************************************************************************/
HAL_ISR_FUNCTION( halKeyPort0Isr, P0INT_VECTOR )
{
HAL_ENTER_ISR();
if (HAL_KEY_SW_6_PXIFG & HAL_KEY_SW_6_BIT)
{
halProcessKeyInterrupt();
}
/*
Clear the CPU interrupt flag for Port_0
PxIFG has to be cleared before PxIF
*/
HAL_KEY_SW_6_PXIFG = 0;
HAL_KEY_CPU_PORT_0_IF = 0;
CLEAR_SLEEP_MODE();
HAL_EXIT_ISR();
}
/**************************************************************************************************
* @fn halKeyPort2Isr
*
* @brief Port2 ISR
*
* @param
*
* @return
**************************************************************************************************/
HAL_ISR_FUNCTION( halKeyPort2Isr, P2INT_VECTOR )
{
HAL_ENTER_ISR();
if (HAL_KEY_JOY_MOVE_PXIFG & HAL_KEY_JOY_MOVE_BIT)
{
halProcessKeyInterrupt();
}
/*
Clear the CPU interrupt flag for Port_2
PxIFG has to be cleared before PxIF
Notes: P2_1 and P2_2 are debug lines.
*/
HAL_KEY_JOY_MOVE_PXIFG = 0;
HAL_KEY_CPU_PORT_2_IF = 0;
CLEAR_SLEEP_MODE();
HAL_EXIT_ISR();
}
HAL_ISR_FUNCTION(halUart1TxIsr, UTX1_VECTOR)
#endif
{
HAL_ENTER_ISR();
if (dmaCfg.txHead == dmaCfg.txTail) {
IEN2 &= ~UTXxIE;
dmaCfg.txMT = 1;
} else {
UTXxIF = 0;
UxDBUF = dmaCfg.txBuf[dmaCfg.txHead++];
if ((HAL_UART_DMA_TX_MAX != 256) && (dmaCfg.txHead >= HAL_UART_DMA_TX_MAX))
{
dmaCfg.txHead = 0;
}
}
HAL_EXIT_ISR();
}
/******************************************************************************
* @fn HalDMAInit
*
* @brief DMA Interrupt Service Routine
*
* @param None
*
* @return None
*****************************************************************************/
HAL_ISR_FUNCTION( halDmaIsr, DMA_VECTOR )
{
extern void HalUARTIsrDMA(void);
HAL_ENTER_ISR();
DMAIF = 0;
#if HAL_UART_DMA
if (HAL_DMA_CHECK_IRQ(HAL_DMA_CH_TX))
{
HalUARTIsrDMA();
}
#endif // HAL_UART_DMA
#if (defined HAL_SPI) && (HAL_SPI == TRUE)
if ( HAL_DMA_CHECK_IRQ( HAL_DMA_CH_RX ) )
{
HAL_DMA_CLEAR_IRQ( HAL_DMA_CH_RX );
HalSpiRxIsr();
}
if ( HAL_DMA_CHECK_IRQ( HAL_DMA_CH_TX ) )
{
HAL_DMA_CLEAR_IRQ( HAL_DMA_CH_TX );
HalSpiTxIsr();
}
#endif // (defined HAL_SPI) && (HAL_SPI == TRUE)
#if (defined HAL_IRGEN) && (HAL_IRGEN == TRUE)
if ( HAL_IRGEN == TRUE && HAL_DMA_CHECK_IRQ( HAL_IRGEN_DMA_CH ) )
{
HAL_DMA_CLEAR_IRQ( HAL_IRGEN_DMA_CH );
HalIrGenDmaIsr();
}
#endif // (defined HAL_IRGEN) && (HAL_IRGEN == TRUE)
CLEAR_SLEEP_MODE();
HAL_EXIT_ISR();
}
HAL_ISR_FUNCTION(port1Isr, P1INT_VECTOR)
#endif
{
HAL_ENTER_ISR();
PxIFG = 0;
PxIF = 0;
dmaRdyIsr = 1;
#ifdef POWER_SAVING
CLEAR_SLEEP_MODE();
osal_pwrmgr_task_state(Hal_TaskID, PWRMGR_HOLD);
#if HAL_UART_TX_BY_ISR
if (dmaCfg.txHead == dmaCfg.txTail) {
HAL_UART_DMA_CLR_RDY_OUT();
}
#endif
#endif
HAL_EXIT_ISR();
}
/*
******************************************************************************
* @fn halKeyPort1Isr
*
* @brief Port1 ISR
******************************************************************************
*/
HAL_ISR_FUNCTION(halKeyPort1Isr, P1INT_VECTOR)
{
HAL_ENTER_ISR();
// if ((HAL_KEY_SW_2_PXIFG & HAL_KEY_SW_2_BIT) || (HAL_KEY_SW_3_PXIFG & HAL_KEY_SW_3_BIT)) {
// halProcessKeyInterrupt();
// }
if (BATCD_PXIFG & BATCD_BV) {
batt_isr();
}
#ifdef POWER_SAVING
CLEAR_SLEEP_MODE();
#endif
/*
* Clear the CPU interrupt flag for Port_1
* PxIFG has to be cleared before PxIF
*/
P1IFG = 0;
P1IF = 0;
HAL_EXIT_ISR();
}
HAL_ISR_FUNCTION(port0Isr, P0INT_VECTOR)
{
unsigned char status;
unsigned char i;
HAL_ENTER_ISR();
status = P0IFG;
status &= P0IEN;
if (status)
{
P0IFG = ~status;
P0IF = 0;
#if HAL_UART_DMA == 1
extern uint8 Hal_TaskID;
extern volatile uint8 dmaRdyIsr;
dmaRdyIsr = 1;
CLEAR_SLEEP_MODE();
osal_pwrmgr_task_state(Hal_TaskID, PWRMGR_HOLD);
#if HAL_UART_TX_BY_ISR
if (dmaCfg.txHead == dmaCfg.txTail)
{
HAL_UART_DMA_CLR_RDY_OUT();
}
#endif
#endif // HAL_UART_DMA
for (i = 0; i < OS_MAX_INTERRUPT; i++)
{
if (PIN_MAJOR(blueBasic_interrupts[i].pin) == 0 && (status & (1 << PIN_MINOR(blueBasic_interrupts[i].pin))))
{
osal_set_event(blueBasic_TaskID, BLUEBASIC_EVENT_INTERRUPT << i);
}
}
}
HAL_EXIT_ISR();
}
HAL_ISR_FUNCTION( halUart1TxIsr, UTX1_VECTOR )
#endif
{
HAL_ENTER_ISR();
if (isrCfg.txHead == isrCfg.txTail)
{
IEN2 &= ~UTXxIE;
isrCfg.txMT = 1;
}
else
{
UTXxIF = 0;
UxDBUF = isrCfg.txBuf[isrCfg.txHead++];
if (isrCfg.txHead >= HAL_UART_ISR_TX_MAX)
{
isrCfg.txHead = 0;
}
}
HAL_EXIT_ISR();
}
HAL_ISR_FUNCTION( halUart1RxIsr, URX1_VECTOR )
#endif
{
HAL_ENTER_ISR();
uint8 tmp = UxDBUF;
isrCfg.rxBuf[isrCfg.rxTail] = tmp;
// Re-sync the shadow on any 1st byte received.
if (isrCfg.rxHead == isrCfg.rxTail)
{
isrCfg.rxShdw = ST0;
}
if (++isrCfg.rxTail >= HAL_UART_ISR_RX_MAX)
{
isrCfg.rxTail = 0;
}
isrCfg.rxTick = HAL_UART_ISR_IDLE;
HAL_EXIT_ISR();
}
