void HAL_USBInit(uint8_t corenum)
{
/* Enable PLL1 for 48MHz output */
Chip_Clock_EnablePLL(SYSCTL_USB_PLL, SYSCTL_PLL_ENABLE);
#if defined(__LPC175X_6X__)
while ((Chip_Clock_GetPLLStatus(SYSCTL_USB_PLL) & SYSCTL_PLL1STS_LOCKED) == 0);
#else
while ((Chip_Clock_GetPLLStatus(SYSCTL_USB_PLL) & SYSCTL_PLLSTS_LOCKED) == 0);
#endif
Chip_IOCON_PinMux(LPC_IOCON, 0, 29, IOCON_MODE_INACT, IOCON_FUNC1); /* P0.29 D1+, P0.30 D1- */
Chip_IOCON_PinMux(LPC_IOCON, 0, 30, IOCON_MODE_INACT, IOCON_FUNC1);
#if defined(USB_CAN_BE_HOST)
Chip_IOCON_PinMux(LPC_IOCON, 1, 19, IOCON_MODE_INACT, IOCON_FUNC2); /* USB_Power switch */
#endif
#if defined(USB_CAN_BE_DEVICE)
Chip_IOCON_PinMux(LPC_IOCON, 2, 9, IOCON_MODE_INACT, IOCON_FUNC1); /* USB_SoftConnect */
#endif
LPC_SYSCTL->PCONP |= (1UL << 31); /* USB PCLK -> enable USB Per.*/
#if defined(USB_CAN_BE_DEVICE)
LPC_USB->USBClkCtrl = 0x12; /* Dev, PortSel, AHB clock enable */
while ((LPC_USB->USBClkSt & 0x12) != 0x12) ;
HAL_Reset(corenum);
#endif
}
/********************************************************************//**
* @brief
* @param
* @return
*********************************************************************/
void HAL_USBInit(uint8_t corenum)
{
// LPC_USB->USBClkCtrl = 0x0000001F; /* Enable USB host clock */
// while ((LPC_USB->USBClkSt & 0x0000001F) != 0x1F);
#if defined(__LPC17XX__)
LPC_PINCON->PINSEL1 &= ~((3<<26)|(3<<28)); /* P0.29 D+, P0.30 D- */
LPC_PINCON->PINSEL1 |= ((1<<26)|(1<<28)); /* PINSEL1 26.27, 28.29 = 01 */
LPC_PINCON->PINSEL3 &= ~(3<<4); /* USB_UP_LED */
LPC_PINCON->PINSEL3 |= (1<<4);
#if defined(USB_CAN_BE_HOST)
if(USB_CurrentMode == USB_MODE_Host)
{
LPC_PINCON->PINSEL3 &= ~(3<<6); /* USB_PPWR */
LPC_PINCON->PINSEL3 |= (2<<6);
LPC_PINCON->PINSEL3 &= ~(3<<22); /* USB_OVRCR */
LPC_PINCON->PINSEL3 |= (2<<22);
LPC_PINCON->PINSEL3 &= ~(3<<12); /* USB_PWRD */
LPC_PINCON->PINSEL3 |= (2<<12);
}
if(USB_CurrentMode == USB_MODE_Device)
{
LPC_PINCON->PINSEL4 &= ~(3<<18); /* USB_CONNECT */
LPC_PINCON->PINSEL4 &= ~(3<<18);
}
#endif
#elif defined(__LPC177X_8X__)
LPC_IOCON->P0_29 &= ~0x07; /* P0.29 D1+, P0.30 D1- */
LPC_IOCON->P0_29 |= 0x1;
LPC_IOCON->P0_30 &= ~0x07;
LPC_IOCON->P0_30 |= 0x1;
#if defined(USB_CAN_BE_DEVICE)
LPC_IOCON->P2_9 &= ~0x07; /* USB_SoftConnect */
LPC_IOCON->P2_9 |= 0x1;
#endif
#if defined(USB_CAN_BE_HOST)
LPC_IOCON->P1_19 &= ~0x07; /* USB_Power switch */
LPC_IOCON->P1_19 |= 0x2;
#endif
#endif
LPC_SC->PCONP |= (1UL<<31); /* USB PCLK -> enable USB Per.*/
#if defined(USB_CAN_BE_DEVICE)
if(USB_CurrentMode == USB_MODE_Device){
LPC_USB->USBClkCtrl = 0x12; /* Dev, PortSel, AHB clock enable */
while ((LPC_USB->USBClkSt & 0x12) != 0x12);
HAL_Reset();
}
#endif
}
/********************************************************************//**
* @brief
* @param
* @return
*********************************************************************/
void HAL_USBInit(void)
{
/* Enable AHB clock to the USB block and USB RAM. */
LPC_SYSCON->SYSAHBCLKCTRL |= ((0x1<<14)|(0x1<<27));
LPC_USB->EPBUFCFG = 0x3FC;
/* configure usb_soft connect */
LPC_IOCON->PIO0_6 = 0x01;
HAL_Reset();
return;
}
void HAL_USBInit(uint8_t corenum)
{
/* Enable PLL1 for 48MHz output */
Chip_Clock_EnablePLL(SYSCTL_USB_PLL, SYSCTL_PLL_ENABLE);
while ((Chip_Clock_GetPLLStatus(SYSCTL_USB_PLL) & SYSCTL_PLLSTS_LOCKED) == 0);
#if defined(__LPC175X_6X__)
//LPC_PINCON->PINSEL1 &= ~((3 << 26) | (3 << 28)); /* P0.29 D+, P0.30 D- */
//LPC_PINCON->PINSEL1 |= ((1 << 26) | (1 << 28)); /* PINSEL1 26.27, 28.29 = 01 */
Chip_IOCON_PinMux(LPC_IOCON, 0, 29, MD_PLN, FUNC1);
Chip_IOCON_PinMux(LPC_IOCON, 0, 30, MD_PLN, FUNC1);
#if defined(USB_CAN_BE_HOST)
LPC_PINCON->PINSEL3 &= ~(3 << 6);
LPC_PINCON->PINSEL3 |= (2 << 6);
#endif
#elif defined(__LPC177X_8X__) || defined(__LPC407X_8X__)
//LPC_IOCON->P0_29 &= ~0x07; /* P0.29 D1+, P0.30 D1- */
LPC_IOCON->p[0][29] &= ~0x07;
LPC_IOCON->p[0][30] &= ~0x07;
LPC_IOCON->p[0][29] |= 0x1;
LPC_IOCON->p[0][30] |= 0x1;
//Chip_IOCON_PinMux(LPC_IOCON, 0, 29, MD_PLN, FUNC1);
//Chip_IOCON_PinMux(LPC_IOCON, 0, 30, MD_PLN, FUNC1);
#if defined(USB_CAN_BE_DEVICE)
//LPC_IOCON->P2_9 &= ~0x07; /* USB_SoftConnect */
//LPC_IOCON->P2_9 |= 0x1;
//Chip_IOCON_PinMux(LPC_IOCON, 2, 9, MD_PLN, FUNC1);
LPC_IOCON->p[2][9] &= ~0x07; /* USB_SoftConnect */
LPC_IOCON->p[2][9] |= 0x1;
#endif
#if defined(USB_CAN_BE_HOST)
//LPC_IOCON->P1_19 &= ~0x07; /* USB_Power switch */
LPC_IOCON->p[1][19] &= ~0x07;
LPC_IOCON->p[1][19] |= 0x2;
#endif
#endif
LPC_SYSCTL->PCONP |= (1UL << 31); /* USB PCLK -> enable USB Per.*/
#if defined(USB_CAN_BE_DEVICE)
LPC_USB->USBClkCtrl = 0x12; /* Dev, PortSel, AHB clock enable */
while ((LPC_USB->USBClkSt & 0x12) != 0x12) ;
HAL_Reset(corenum);
#endif
}
/********************************************************************//**
* @brief
* @param
* @return
*********************************************************************/
void HAL_USBInit(void)
{
LPC_SC->PCONP |= (1UL<<31); /* USB PCLK -> enable USB Per.*/
LPC_USB->USBClkCtrl = 0x1E; /* Dev, PortSel, AHB clock enable */
while ((LPC_USB->USBClkSt & 0x1E) != 0x1E);
//Set PORT0 for USB
LPC_USB->StCtrl &= (uint32_t)~0x03;
LPC_USB->USBClkCtrl = 0x12;
while ((LPC_USB->USBClkSt & 0x12) != 0x12);
HAL_Reset();
}
/********************************************************************//**
* @brief
* @param
* @return
*********************************************************************/
void HAL_USBInit(uint8_t corenum)
{
/* Enable AHB clock to the USB block and USB RAM. */
LPC_SYSCON->SYSAHBCLKCTRL |= ((0x1<<14)|(0x1<<27));
LPC_USB->EPBUFCFG = 0x3FC;
/* configure usb_soft connect */
LPC_IOCON->PIO0_6 = 0x01;
#if !defined(USB_DEVICE_ROM_DRIVER)
HAL_Reset();
#endif
return;
}
/********************************************************************//**
* @brief
* @param
* @return
*********************************************************************/
void HAL_USBInit(void)
{
#if defined(__LPC17XX__)
LPC_PINCON->PINSEL1 &= ~((3<<26)|(3<<28)); /* P0.29 D+, P0.30 D- */
LPC_PINCON->PINSEL1 |= ((1<<26)|(1<<28)); /* PINSEL1 26.27, 28.29 = 01 */
#if defined(USB_CAN_BE_HOST)
//LPC_PINCON->PINSEL3 &= ~(3<<6);
//LPC_PINCON->PINSEL3 |= (2<<6);
LPC_PINCON->PINSEL3 &= ~((3<<4) | (3<<6) | (3<<12) | (3<<22));
LPC_PINCON->PINSEL3 |= ((1<<4)|(2<<6) | (2<<12) | (2<<22)); // 0x00802080
#endif
#elif defined(__LPC177X_8X__)
LPC_IOCON->P0_29 &= ~0x07; /* P0.29 D1+, P0.30 D1- */
LPC_IOCON->P0_29 |= 0x1;
LPC_IOCON->P0_30 &= ~0x07;
LPC_IOCON->P0_30 |= 0x1;
#if defined(USB_CAN_BE_DEVICE)
LPC_IOCON->P2_9 &= ~0x07; /* USB_SoftConnect */
LPC_IOCON->P2_9 |= 0x1;
#endif
#if defined(USB_CAN_BE_HOST)
LPC_IOCON->P1_19 &= ~0x07; /* USB_Power switch */
LPC_IOCON->P1_19 |= 0x2;
#endif
#endif
LPC_SC->PCONP |= (1UL<<31); /* USB PCLK -> enable USB Per.*/
#if defined(USB_CAN_BE_DEVICE)
LPC_USB->USBClkCtrl = 0x12; /* Dev, PortSel, AHB clock enable */
while ((LPC_USB->USBClkSt & 0x12) != 0x12);
HAL_Reset();
#endif
}
void USB_IRQHandler(void)
{
#if defined(USB_DEVICE_ROM_DRIVER)
UsbdRom_IrqHandler();
#else
uint32_t IntStat = LPC_USB->INTSTAT;
uint32_t IntEn = LPC_USB->INTEN;
IntStat &= IntEn; /* Get Interrupt Status and clear immediately. */
if (IntStat == 0) {
return;
}
LPC_USB->INTSTAT = IntStat;
/* SOF Interrupt */
if (IntStat & FRAME_INT) {}
/* Device Status Interrupt (Reset, Connect change, Suspend/Resume) */
if (IntStat & DEV_STAT_INT) {
uint32_t DevCmdStat = LPC_USB->DEVCMDSTAT; /* Device Status */
if (DevCmdStat & USB_DRESET_C) { /* Reset */
LPC_USB->DEVCMDSTAT |= USB_DRESET_C;
HAL_Reset();
USB_DeviceState[0] = DEVICE_STATE_Default;
Endpoint_ConfigureEndpointControl(USB_Device_ControlEndpointSize);
}
if (DevCmdStat & USB_DCON_C) { /* Connect change */
LPC_USB->DEVCMDSTAT |= USB_DCON_C;
}
if (DevCmdStat & USB_DSUS_C) { /* Suspend/Resume */
LPC_USB->DEVCMDSTAT |= USB_DSUS_C;
if (DevCmdStat & USB_DSUS) { /* Suspend */
}
else { /* Resume */
}
}
}
/* Endpoint's Interrupt */
if (IntStat & 0x3FF) { /* if any of the EP0 through EP9 is set, or bit 0 through 9 on disr */
uint32_t PhyEP;
for (PhyEP = 0; PhyEP < USED_PHYSICAL_ENDPOINTS; PhyEP++) /* Check All Endpoints */
if ( IntStat & (1 << PhyEP) ) {
if ( IsOutEndpoint(PhyEP) ) { /* OUT Endpoint */
if ( !Endpoint_IsSETUPReceived(0) ) {
if (EndPointCmdStsList[PhyEP][0].NBytes == 0x200) {
if (PhyEP == 0) {
DcdDataTransfer(PhyEP, usb_data_buffer[0], 512);
}
else if (stream_total_packets == 0) {
DcdDataTransfer(PhyEP, usb_data_buffer_OUT[0], 512);
}
if ((PhyEP == 0) || (stream_total_packets == 0)) {
epout_primed = true;
}
}
else {
if (epout_primed) {
epout_primed = false;
if (PhyEP == 0) {
usb_data_buffer_size[0] = (512 - EndPointCmdStsList[PhyEP][0].NBytes);
}
else {
usb_data_buffer_OUT_size[0] = (512 - EndPointCmdStsList[PhyEP][0].NBytes);
}
}
}
}
}
else { /* IN Endpoint */
if (Remain_length[PhyEP / 2] > 0) {
uint32_t i;
if (PhyEP == 1) { /* Control IN */
for (i = 0; i < Remain_length[PhyEP / 2]; i++)
usb_data_buffer[0][i] = usb_data_buffer[0][i + EndpointMaxPacketSize[PhyEP]];
DcdDataTransfer(PhyEP, usb_data_buffer[0], Remain_length[PhyEP / 2]);
}
else {
for (i = 0; i < Remain_length[PhyEP / 2]; i++)
usb_data_buffer_IN[0][i] = usb_data_buffer_IN[0][i + EndpointMaxPacketSize[PhyEP]];
DcdDataTransfer(PhyEP, usb_data_buffer_IN[0], Remain_length[PhyEP / 2]);
}
}
else {
if (PhyEP == 1) { /* Control IN */
if (shortpacket) {
shortpacket = false;
DcdDataTransfer(PhyEP, usb_data_buffer[0], 0);
}
}
}
}
}
}
#endif
}
void HAL_USBInit(uint8_t corenum)
{
/* Just exit if already enabled */
if (!coreEnabled[corenum]) {
/* if other code is not enabled, the enable USB PLL */
if (!coreEnabled[1 - corenum]) {
/* Neither core is enabled, so enable USB PLL first */
Chip_Clock_EnablePLL(CGU_USB_PLL);
/* Wait for PLL lock */
while (!(Chip_Clock_GetPLLStatus(CGU_USB_PLL) & CGU_PLL_LOCKED));
}
if (corenum == 0) {
/* For core 0, enable USB0 base clock */
Chip_Clock_EnableBaseClock(CLK_BASE_USB0);
Chip_Clock_EnableOpts(CLK_MX_USB0, true, true, 1);
/* Turn on the phy */
Chip_CREG_EnableUSB0Phy(true);
}
else {
/* For core 1, enable USB1 base clock */
Chip_Clock_EnableBaseClock(CLK_BASE_USB1);
Chip_Clock_EnableOpts(CLK_MX_USB1, true, true, 1);
/* Turn on the phy */
Chip_CREG_EnableUSB0Phy(true);
#if defined(USB_CAN_BE_HOST)
/* enable USB1_DP and USB1_DN on chip FS phy */
if (corenum && USB_CurrentMode[corenum] == USB_MODE_Host)LPC_SCU->SFSUSB = 0x16;
#endif
#if defined(USB_CAN_BE_DEVICE)
/* enable USB1_DP and USB1_DN on chip FS phy */
if (corenum && USB_CurrentMode[corenum] == USB_MODE_Device)LPC_SCU->SFSUSB = 0x12;
#endif
LPC_USB1->PORTSC1_D |= (1 << 24);
}
coreEnabled[corenum] = true;
}
#if defined(USB_CAN_BE_DEVICE) && (!defined(USB_DEVICE_ROM_DRIVER))
/* reset the controller */
USB_REG(corenum)->USBCMD_D = USBCMD_D_Reset;
/* wait for reset to complete */
while (USB_REG(corenum)->USBCMD_D & USBCMD_D_Reset) ;
/* Program the controller to be the USB device controller */
USB_REG(corenum)->USBMODE_D = (0x2 << 0) /*| (1<<4)*//*| (1<<3)*/;
if (corenum == 0) {
/* set OTG transcever in proper state, device is present
on the port(CCS=1), port enable/disable status change(PES=1). */
LPC_USB0->OTGSC = (1 << 3) | (1 << 0) /*| (1<<16)| (1<<24)| (1<<25)| (1<<26)| (1<<27)| (1<<28)| (1<<29)| (1<<30)*/;
#if (USB_FORCED_FULLSPEED)
LPC_USB0->PORTSC1_D |= (1 << 24);
#endif
}
HAL_Reset(corenum);
#endif
}
/********************************************************************//**
* @brief
* @param
* @return
*********************************************************************/
void DcdIrqHandler (uint8_t DeviceID)
{
uint32_t DevIntSt, DMAIntSt;
uint32_t tmp;
(void)DeviceID;
tmp = LPC_USB->DevIntEn;
DevIntSt = LPC_USB->DevIntSt & tmp; /* Device Interrupt Status */
LPC_USB->DevIntClr = DevIntSt;
/* Device Status Interrupt (Reset, Connect change, Suspend/Resume) */
if (DevIntSt & DEV_STAT_INT)
{
//debug_hard_string("DevIntSt & DEV_STAT_INT\r\n");
uint32_t SIEDeviceStatus;
SIE_WriteCommamd(CMD_GET_DEV_STAT);
SIEDeviceStatus = SIE_ReadCommandData(DAT_GET_DEV_STAT); /* Device Status */
if (SIEDeviceStatus & DEV_RST) /* Reset */
{
HAL_Reset();
USB_DeviceState = DEVICE_STATE_Default;
Endpoint_ConfigureEndpoint(ENDPOINT_CONTROLEP, 0, ENDPOINT_DIR_OUT, USB_Device_ControlEndpointSize,0);
Endpoint_ConfigureEndpoint(ENDPOINT_CONTROLEP, 0, ENDPOINT_DIR_IN, USB_Device_ControlEndpointSize,0);
//debug_hard_string("SIEDeviceStatus & DEV_RST\r\n");
}
if (SIEDeviceStatus & DEV_CON_CH) /* Connect change */
{
}
if (SIEDeviceStatus & DEV_SUS_CH) /* Suspend/Resume */
{
if (SIEDeviceStatus & DEV_SUS) /* Suspend */
{
}
else /* Resume */
{
}
}
}
if (DevIntSt & FRAME_INT)
{
}
if (DevIntSt & ERR_INT)
{
volatile uint32_t SIEErrorStatus;
SIE_WriteCommamd(CMD_RD_ERR_STAT);
SIEErrorStatus = SIE_ReadCommandData(DAT_RD_ERR_STAT);
}
/* SLAVE mode : Endpoint's Slow Interrupt */
if ( (DevIntSt & EP_SLOW_INT) || (DevIntSt & EP_FAST_INT) )
{
//debug_hard_string("DevIntSt & EP_SLOW_INT\r\n");
SlaveEndpointISR();
}
/* DMA mode */
uint32_t tmp2 = LPC_USB->DMAIntEn;
DMAIntSt = LPC_USB->DMAIntSt & tmp2;
if (DMAIntSt & EOT_INT) /* End of Transfer Interrupt */
{
//debug_hard_string("DMAIntSt & EOT_INT\r\n");
DMAEndTransferISR();
}
if (DMAIntSt & NDD_REQ_INT) /* New DD Request Interrupt */
{
//debug_hard_string("DMAIntSt & NDD_REQ_INT\r\n");
DMANewTransferRequestISR();
}
if (DMAIntSt & SYS_ERR_INT) /* System Error Interrupt */
{
// DMASysErrISR();
LPC_USB->SysErrIntClr = LPC_USB->SysErrIntSt;
}
}
void DcdIrqHandler(uint8_t DeviceID)
{
uint32_t DevIntSt, DMAIntSt;
DevIntSt = USB_REG(DeviceID)->DevIntEn; /* Device Interrupt Status */
DevIntSt &= USB_REG(DeviceID)->DevIntEn;
USB_REG(DeviceID)->DevIntClr = DevIntSt;
/* Device Status Interrupt (Reset, Connect change, Suspend/Resume) */
if (DevIntSt & DEV_STAT_INT) {
uint32_t SIEDeviceStatus;
SIE_WriteCommand(CMD_GET_DEV_STAT);
SIEDeviceStatus = SIE_ReadCommandData(DAT_GET_DEV_STAT); /* Device Status */
if (SIEDeviceStatus & DEV_RST) { /* Reset */
HAL_Reset(DeviceID);
USB_DeviceState[DeviceID] = DEVICE_STATE_Default;
Endpoint_ConfigureEndpoint(DeviceID, ENDPOINT_CONTROLEP, 0, ENDPOINT_DIR_OUT, USB_Device_ControlEndpointSize, 0);
Endpoint_ConfigureEndpoint(DeviceID, ENDPOINT_CONTROLEP, 0, ENDPOINT_DIR_IN, USB_Device_ControlEndpointSize, 0);
}
if (SIEDeviceStatus & DEV_CON_CH) { /* Connect change */
}
if (SIEDeviceStatus & DEV_SUS_CH) { /* Suspend/Resume */
if (SIEDeviceStatus & DEV_SUS) { /* Suspend */
}
else { /* Resume */
}
}
}
if (DevIntSt & FRAME_INT) {}
if (DevIntSt & ERR_INT) {
volatile uint32_t SIEErrorStatus;
SIE_WriteCommand(CMD_RD_ERR_STAT);
SIEErrorStatus = SIE_ReadCommandData(DAT_RD_ERR_STAT);
}
/* SLAVE mode : Endpoint's Slow Interrupt */
if ( (DevIntSt & EP_SLOW_INT) || (DevIntSt & EP_FAST_INT) ) {
SlaveEndpointISR();
}
/* DMA mode */
DMAIntSt = LPC_USB->DMAIntSt;
DMAIntSt &= USB_REG(DeviceID)->DMAIntEn;
if (DMAIntSt & EOT_INT) { /* End of Transfer Interrupt */
DMAEndTransferISR();
}
if (DMAIntSt & NDD_REQ_INT) { /* New DD Request Interrupt */
DMANewTransferRequestISR();
}
if (DMAIntSt & SYS_ERR_INT) { /* System Error Interrupt */
// DMASysErrISR();
USB_REG(DeviceID)->SysErrIntClr = USB_REG(DeviceID)->SysErrIntSt;
}
}
