void hdmi_msm_phy_status_poll(void)
{
unsigned int lock_det, phy_ready;
lock_det = 0x1 & HDMI_INP_ND(HDMI_PHY_PLL_STATUS0);
if (lock_det) {
pr_debug("HDMI Phy PLL Lock Detect Bit is set\n");
} else {
pr_debug("HDMI Phy Lock Detect Bit is not set,"
"waiting for lock detection\n");
do {
lock_det = 0x1 & \
HDMI_INP_ND(HDMI_PHY_PLL_STATUS0);
} while (!lock_det);
}
phy_ready = 0x1 & HDMI_INP_ND(HDMI_PHY_REG_15);
if (phy_ready) {
pr_debug("HDMI Phy Status bit is set and ready\n");
} else {
pr_debug("HDMI Phy Status bit is not set,"
"waiting for ready status\n");
do {
phy_ready = 0x1 & HDMI_INP_ND(HDMI_PHY_REG_15);
} while (!phy_ready);
}
}
void hdmi_msm_phy_status_poll(void)
{
unsigned int phy_ready;
phy_ready = 0x1 & HDMI_INP_ND(0x33c);
if (phy_ready) {
pr_debug("HDMI Phy Status bit is set and ready\n");
} else {
pr_debug("HDMI Phy Status bit is not set,"
"waiting for ready status\n");
do {
phy_ready = 0x1 & HDMI_INP_ND(0x33c);
} while (!phy_ready);
}
}
void hdmi_phy_reset(void)
{
unsigned int phy_reset_polarity = 0x0;
unsigned int pll_reset_polarity = 0x0;
unsigned int val = HDMI_INP_ND(HDMI_PHY_CTRL);
phy_reset_polarity = val >> 3 & 0x1;
pll_reset_polarity = val >> 1 & 0x1;
if (phy_reset_polarity == 0)
HDMI_OUTP(HDMI_PHY_CTRL, val | SW_RESET);
else
HDMI_OUTP(HDMI_PHY_CTRL, val & (~SW_RESET));
if (pll_reset_polarity == 0)
HDMI_OUTP(HDMI_PHY_CTRL, val | SW_RESET_PLL);
else
HDMI_OUTP(HDMI_PHY_CTRL, val & (~SW_RESET_PLL));
msleep(100);
if (phy_reset_polarity == 0)
HDMI_OUTP(HDMI_PHY_CTRL, val & (~SW_RESET));
else
HDMI_OUTP(HDMI_PHY_CTRL, val | SW_RESET);
if (pll_reset_polarity == 0)
HDMI_OUTP(HDMI_PHY_CTRL, val & (~SW_RESET_PLL));
else
HDMI_OUTP(HDMI_PHY_CTRL, val | SW_RESET_PLL);
}
void hdmi_phy_reset(void)
{
unsigned int phy_reset_polarity = 0x0;
unsigned int val = HDMI_INP_ND(0x2D4);
phy_reset_polarity = val >> 3 & 0x1;
if (phy_reset_polarity == 0)
HDMI_OUTP(0x2D4, val | SW_RESET);
else
HDMI_OUTP(0x2D4, val & (~SW_RESET));
msleep(100);
if (phy_reset_polarity == 0)
HDMI_OUTP(0x2D4, val & (~SW_RESET));
else
HDMI_OUTP(0x2D4, val | SW_RESET);
}
void mhl_cable_connect(struct work_struct *work)
{
if (HDMI_INP_ND(0x0000) & 0x00000001)
{
mhl_power_ctrl(1);
msleep(10);
MHL_On(1);
MHL_En_Control(1) ;// switch-MHL
MHL_Set_Cable_State(MHL_CABLE_CONNCET);
#ifdef MHL_DEBUG
printk(KERN_ERR "[SKY_MHL]%s MHL cable Connect \n",__func__);
#endif
return;
}
else
{
schedule_delayed_work(&sii9244_cable_connect_work.work, msecs_to_jiffies(100));
}
return;
}
void hdmi_phy_reset(void)
{
unsigned int phy_reset_polarity = 0x0;
unsigned int pll_reset_polarity = 0x0;
unsigned int val = HDMI_INP_ND(HDMI_PHY_CTRL);
phy_reset_polarity = val >> 3 & 0x1;
pll_reset_polarity = val >> 1 & 0x1;
if (phy_reset_polarity == 0)
HDMI_OUTP(HDMI_PHY_CTRL, val | SW_RESET);
else
HDMI_OUTP(HDMI_PHY_CTRL, val & (~SW_RESET));
if (pll_reset_polarity == 0)
HDMI_OUTP(HDMI_PHY_CTRL, val | SW_RESET_PLL);
else
HDMI_OUTP(HDMI_PHY_CTRL, val & (~SW_RESET_PLL));
#ifdef CONFIG_SHLCDC_BOARD /* CUST_ID_00048 */
mipi_sharp_delay_us(100000);
#else /* CONFIG_SHLCDC_BOARD */
msleep(100);
#endif /* CONFIG_SHLCDC_BOARD */
if (phy_reset_polarity == 0)
HDMI_OUTP(HDMI_PHY_CTRL, val & (~SW_RESET));
else
HDMI_OUTP(HDMI_PHY_CTRL, val | SW_RESET);
if (pll_reset_polarity == 0)
HDMI_OUTP(HDMI_PHY_CTRL, val & (~SW_RESET_PLL));
else
HDMI_OUTP(HDMI_PHY_CTRL, val | SW_RESET_PLL);
}
