Ejemplo n.º 1
0
/************ DEBUG ***********/
MV_VOID mvIdmaRegs(MV_U32 chan)
{
	mvOsPrintf("\t IDMA #%d Registers:\n", chan);

	mvOsPrintf("IDMA_BYTE_COUNT_REG             : 0x%X = 0x%08x\n",
		   IDMA_BYTE_COUNT_REG(chan), MV_REG_READ(IDMA_BYTE_COUNT_REG(chan)));

	mvOsPrintf("IDMA_SRC_ADDR_REG               : 0x%X = 0x%08x\n",
		   IDMA_SRC_ADDR_REG(chan), MV_REG_READ(IDMA_SRC_ADDR_REG(chan)));

	mvOsPrintf("IDMA_DST_ADDR_REG               : 0x%X = 0x%08x\n",
		   IDMA_DST_ADDR_REG(chan), MV_REG_READ(IDMA_DST_ADDR_REG(chan)));

	mvOsPrintf("IDMA_NEXT_DESC_PTR_REG          : 0x%X = 0x%08x\n",
		   IDMA_NEXT_DESC_PTR_REG(chan), MV_REG_READ(IDMA_NEXT_DESC_PTR_REG(chan)));

	mvOsPrintf("IDMA_CURR_DESC_PTR_REG          : 0x%X = 0x%08x\n",
		   IDMA_CURR_DESC_PTR_REG(chan), MV_REG_READ(IDMA_CURR_DESC_PTR_REG(chan)));

	mvOsPrintf("IDMA_CTRL_LOW_REG               : 0x%X = 0x%08x\n",
		   IDMA_CTRL_LOW_REG(chan), MV_REG_READ(IDMA_CTRL_LOW_REG(chan)));

	mvOsPrintf("IDMA_CTRL_HIGH_REG              : 0x%X = 0x%08x\n",
		   IDMA_CTRL_HIGH_REG(chan), MV_REG_READ(IDMA_CTRL_HIGH_REG(chan)));

	mvOsPrintf("IDMA_CAUSE_REG                  : 0x%X = 0x%08x\n", IDMA_CAUSE_REG, MV_REG_READ(IDMA_CAUSE_REG));

	mvOsPrintf("IDMA_MASK_REG                   : 0x%X = 0x%08x\n", IDMA_MASK_REG, MV_REG_READ(IDMA_MASK_REG));
}
Ejemplo n.º 2
0
int mv_dma_init(void)
{
#if defined(CONFIG_MV78200) || defined(CONFIG_MV632X)
	if (MV_FALSE == mvSocUnitIsMappedToThisCpu(IDMA))
	{
		printk(KERN_INFO"IDMA is not mapped to this CPU\n");
		return -ENODEV;
	}
#endif
	printk(KERN_INFO "Use IDMA channels %d and %d for enhancing the following function:\n",
                CPY_CHAN1, CPY_CHAN2);
#ifdef CONFIG_MV_IDMA_COPYUSER
        printk(KERN_INFO "  o Copy From/To user space operations.\n");
#endif
#ifdef CONFIG_MV_IDMA_MEMCOPY
	printk(KERN_INFO "  o memcpy() and memmove() operations.\n");
#endif
#ifdef CONFIG_MV_IDMA_MEMZERO
	printk(KERN_INFO "  o memzero() operations.\n");
#endif

#ifdef CONFIG_MV_IDMA_MEMZERO
	DPRINTK(KERN_ERR "ZERO buffer address 0x%08x\n", (u32)dmaMemInitBuff);
	
	asm_memzero(dmaMemInitBuff, sizeof(dmaMemInitBuff));
	dmac_flush_range(dmaMemInitBuff, dmaMemInitBuff + sizeof(dmaMemInitBuff));
#endif

        MV_REG_WRITE(IDMA_BYTE_COUNT_REG(CPY_CHAN1), 0);
        MV_REG_WRITE(IDMA_CURR_DESC_PTR_REG(CPY_CHAN1), 0);
        MV_REG_WRITE(IDMA_CTRL_HIGH_REG(CPY_CHAN1), ICCHR_ENDIAN_LITTLE 
#ifdef MV_CPU_LE
      		| ICCHR_DESC_BYTE_SWAP_EN
#endif
		 );
        MV_REG_WRITE(IDMA_CTRL_LOW_REG(CPY_CHAN1), CPY_IDMA_CTRL_LOW_VALUE);

        MV_REG_WRITE(IDMA_BYTE_COUNT_REG(CPY_CHAN2), 0);
        MV_REG_WRITE(IDMA_CURR_DESC_PTR_REG(CPY_CHAN2), 0);
        MV_REG_WRITE(IDMA_CTRL_HIGH_REG(CPY_CHAN2), ICCHR_ENDIAN_LITTLE 
#ifdef MV_CPU_LE
      		| ICCHR_DESC_BYTE_SWAP_EN
#endif
		 );
        MV_REG_WRITE(IDMA_CTRL_LOW_REG(CPY_CHAN2), CPY_IDMA_CTRL_LOW_VALUE);

        current_dma_channel = CPY_CHAN1;
	dma_proc_entry = create_proc_entry("dma_copy", S_IFREG | S_IRUGO, 0);
	dma_proc_entry->read_proc = dma_read_proc;
//	dma_proc_entry->write_proc = dma_write_proc;
	dma_proc_entry->nlink = 1;

	idma_init = 1;

	return 0;
}
Ejemplo n.º 3
0
/*******************************************************************************
* mvDmaCtrlHighSet - Set IDMA channel control high register
*
* DESCRIPTION:
*       Each IDMA Channel has its own unique control registers (high and low)
*       where certain IDMA modes are programmed.
*       This function writes 32bit word to IDMA control high register.
*
* INPUT:
*       chan     - DMA channel number. See MV_DMA_CHANNEL enumerator.
*       ctrlWord - Channel control word for high register.
*
* OUTPUT:
*       None.
*
* RETURN:
*       MV_OK.
*
*******************************************************************************/
MV_STATUS mvDmaCtrlHighSet(MV_U32 chan, MV_U32 ctrlWord)
{
    /* Parameter checking   */
    if (chan >= MV_IDMA_MAX_CHAN)
    {
		mvOsPrintf("mvDmaCtrlHighSet: ERR. Invalid chan num %d\n", chan);
        return MV_ERROR;
    }

    MV_REG_WRITE(IDMA_CTRL_HIGH_REG(chan), ctrlWord);
	return MV_OK;
}
Ejemplo n.º 4
0
/*******************************************************************************
* mvDmaCtrlHighSet - Set IDMA channel control high register
*
* DESCRIPTION:
*       Each IDMA Channel has its own unique control registers (high and low)
*       where certain IDMA modes are programmed.
*       This function writes 32bit word to IDMA control high register.
*
* INPUT:
*       chan     - DMA channel number. See MV_DMA_CHANNEL enumerator.
*       ctrlWord - Channel control word for high register.
*
* OUTPUT:
*       None.
*
* RETURN:
*       MV_OK.
*
*******************************************************************************/
MV_STATUS mvDmaCtrlHighSet(MV_U32 chan, MV_U32 ctrlWord)
{
	MV_REG_WRITE(IDMA_CTRL_HIGH_REG(chan), ctrlWord);
	return MV_OK;
}