irqreturn_t bt_host_wake_irq_handler(int irq, void *dev_id)
{
disable_irq(IRQ_EINT(22));
schedule_work(&bt_host_wake_work);
return IRQ_HANDLED;
}
static void bt_host_wake_work_func(struct work_struct *ignored)
{
int gpio_val;
gpio_val = gpio_get_value(GPIO_BT_HOST_WAKE);
printk(KERN_DEBUG "[BT] GPIO_BT_HOST_WAKE = %d\n", gpio_val);
/*
if(gpio_val == GPIO_LEVEL_LOW)
{
//wake_unlock^M
printk("[BT]:wake_unlock \n");
wake_unlock(&rfkill_wake_lock);
}
else
{
//wake_lock
printk("[BT]:wake_lock \n");
wake_lock(&rfkill_wake_lock);
}
*/
if(gpio_val == GPIO_LEVEL_HIGH)
{
printk(KERN_DEBUG "[BT] wake_lock timeout = 5 sec\n");
wake_lock_timeout(&rfkill_wake_lock, 5*HZ);
}
enable_irq(IRQ_EINT(22));
}
void universal_sdhci2_cfg_ext_cd(void)
{
printk(KERN_DEBUG "Universal :SD Detect configuration\n");
s3c_gpio_cfgpin(GPIO_T_FLASH_DETECT, S3C_GPIO_SFN(GPIO_T_FLASH_DETECT_AF));
s3c_gpio_setpull(S5PV210_GPH3(4), S3C_GPIO_PULL_NONE);
set_irq_type(IRQ_EINT(28), IRQ_TYPE_EDGE_BOTH);
}
static void s5pv310_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc)
{
struct irq_chip *chip = get_irq_chip(irq);
u32 a16_23, a24_31;
if (chip->ack)
chip->ack(irq);
a16_23 = s5pv310_irq_demux_eint(irq, IRQ_EINT(16));
a24_31 = s5pv310_irq_demux_eint(irq, IRQ_EINT(24));
if (!a16_23 && !a24_31)
do_bad_IRQ(irq, desc);
chip->unmask(irq);
}
void universal_sdhci2_cfg_ext_cd(void)
{
printk(" Universal :SD Detect configuration \n");
#if defined(CONFIG_MACH_S5PC110_P1)
s3c_gpio_cfgpin(GPIO_T_FLASH_DETECT, S3C_GPIO_SFN(GPIO_T_FLASH_DETECT_AF));
s3c_gpio_setpull(S5PV210_GPH3(4), S3C_GPIO_PULL_NONE);
set_irq_type(IRQ_EINT(28), IRQ_TYPE_EDGE_BOTH);
#else
if(((HWREV >= 7) || (HWREV == 0x3)) && (HWREV !=8))
s3c_gpio_setpull(S5PV210_GPH3(4), S3C_GPIO_PULL_NONE);
else
s3c_gpio_setpull(S5PV210_GPH3(4), S3C_GPIO_PULL_DOWN);
#endif
set_irq_type(IRQ_EINT(28), IRQ_TYPE_EDGE_BOTH);
}
int __init s5p_init_irq_eint(void)
{
int irq;
for (irq = IRQ_EINT(0); irq <= IRQ_EINT(15); irq++)
set_irq_chip(irq, &s5p_irq_vic_eint);
for (irq = IRQ_EINT(16); irq <= IRQ_EINT(31); irq++) {
set_irq_chip(irq, &s5p_irq_eint);
set_irq_handler(irq, handle_level_irq);
set_irq_flags(irq, IRQF_VALID);
}
set_irq_chained_handler(IRQ_EINT16_31, s5p_irq_demux_eint16_31);
return 0;
}
/*
* s5p64x0_irq_demux_eint
*
* This function demuxes the IRQ from the group0 external interrupts,
* from IRQ_EINT(0) to IRQ_EINT(15). It is designed to be inlined into
* the specific handlers s5p64x0_irq_demux_eintX_Y.
*/
static inline void s5p64x0_irq_demux_eint(unsigned int start, unsigned int end)
{
u32 status = __raw_readl(S5P64X0_EINT0PEND);
u32 mask = __raw_readl(S5P64X0_EINT0MASK);
unsigned int irq;
status &= ~mask;
status >>= start;
status &= (1 << (end - start + 1)) - 1;
for (irq = IRQ_EINT(start); irq <= IRQ_EINT(end); irq++) {
if (status & 1)
generic_handle_irq(irq);
status >>= 1;
}
}
static irqreturn_t tiny6410_keys_irq(int irq, void *dev_id)
{
unsigned int tmp;
irq_dev = (struct key_desc *)dev_id;
if ((irq_dev->irq == IRQ_EINT(19)) || (irq_dev->irq == IRQ_EINT(20))) {
tmp = readl(S3C64XX_GPLDAT);
irq_dev->pin_val = tmp & (1<<irq_dev->pin);
}else {
tmp = readl(S3C64XX_GPNDAT);
irq_dev->pin_val = tmp & (1<<irq_dev->pin);
}
/* Start the timer after 10ms */
mod_timer(&keys_timers, jiffies+HZ/100);
return IRQ_RETVAL(IRQ_HANDLED);
}
int __init s3c64xx_init_irq_eint(void)
{
int irq;
for (irq = IRQ_EINT(0); irq <= IRQ_EINT(27); irq++) {
set_irq_chip(irq, &s3c_irq_eint);
set_irq_handler(irq, handle_level_irq);
set_irq_flags(irq, IRQF_VALID);
}
set_irq_chained_handler(IRQ_EINT0_3, s3c_irq_demux_eint0_3);
set_irq_chained_handler(IRQ_EINT4_11, s3c_irq_demux_eint4_11);
set_irq_chained_handler(IRQ_EINT12_19, s3c_irq_demux_eint12_19);
set_irq_chained_handler(IRQ_EINT20_27, s3c_irq_demux_eint20_27);
return 0;
}
int __init s5pv310_init_irq_eint(void)
{
int irq;
for( irq = 0 ; irq <= 31 ; irq++) {
set_irq_chip(IRQ_EINT(irq), &s5pv310_irq_eint);
set_irq_handler(IRQ_EINT(irq), handle_level_irq);
set_irq_flags(IRQ_EINT(irq), IRQF_VALID);
}
set_irq_chained_handler(IRQ_EINT16_31, s5pv310_irq_demux_eint16_31);
for ( irq = 0 ; irq <= 15 ; irq++)
set_irq_chained_handler(s5pv310_get_irq_nr(irq), s5pv310_irq_eint0_15);
return 0;
}
static int __init s3c64xx_init_irq_eint(void)
{
int irq;
for (irq = IRQ_EINT(0); irq <= IRQ_EINT(27); irq++) {
irq_set_chip_and_handler(irq, &s3c_irq_eint, handle_level_irq);
irq_set_chip_data(irq, (void *)eint_irq_to_bit(irq));
set_irq_flags(irq, IRQF_VALID);
}
irq_set_chained_handler(IRQ_EINT0_3, s3c_irq_demux_eint0_3);
irq_set_chained_handler(IRQ_EINT4_11, s3c_irq_demux_eint4_11);
irq_set_chained_handler(IRQ_EINT12_19, s3c_irq_demux_eint12_19);
irq_set_chained_handler(IRQ_EINT20_27, s3c_irq_demux_eint20_27);
return 0;
}
static int s5pc210_extint_to_irq(struct gpio_chip *gpio, unsigned int offset)
{
struct s3c_gpio_chip *chip = to_s3c_gpio(gpio);
int irq;
irq = (chip->group * 8) + offset;
return IRQ_EINT(irq);
}
static int s5pc1xx_gpiolib_to_eint(struct gpio_chip *chip, unsigned int offset)
{
int base;
base = chip->base - S5PC100_GPH0(0);
if (base == 0)
return IRQ_EINT(offset);
base = chip->base - S5PC100_GPH1(0);
if (base == 0)
return IRQ_EINT(8 + offset);
base = chip->base - S5PC100_GPH2(0);
if (base == 0)
return IRQ_EINT(16 + offset);
base = chip->base - S5PC100_GPH3(0);
if (base == 0)
return IRQ_EINT(24 + offset);
return -EINVAL;
}
static void init_gpio(void)
{
int i;
for(i =0;i < KEYNUM;i++)
{
s3c_gpio_cfgpin(S3C64XX_GPN(i),2);
irq_set_irq_type(IRQ_EINT(i),dev_info[i].flags);
}
}
static int __init s5p_init_irq_eint(void)
{
int irq;
if (of_have_populated_dt())
return -ENODEV;
for (irq = IRQ_EINT(0); irq <= IRQ_EINT(15); irq++)
irq_set_chip(irq, &s5p_irq_vic_eint);
for (irq = IRQ_EINT(16); irq <= IRQ_EINT(31); irq++) {
irq_set_chip_and_handler(irq, &s5p_irq_eint, handle_level_irq);
set_irq_flags(irq, IRQF_VALID);
}
irq_set_chained_handler(IRQ_EINT16_31, s5p_irq_demux_eint16_31);
return 0;
}
static void s5p64xx_pm_configure_extint(void)
{
#if 0
s3c_gpio_cfgpin(S5P64XX_GPN(10), S5P64XX_GPN10_EINT10);
s3c_gpio_setpull(S5P64XX_GPN(10), S3C_GPIO_PULL_UP);
#else
__raw_writel((__raw_readl(S5P64XX_GPNCON) & ~(0x3 << 20)) |
(0x2 << 20), S5P64XX_GPNCON);
__raw_writel((__raw_readl(S5P64XX_GPNPUD) & ~(0x3 << 20)) |
(0x2 << 20), S5P64XX_GPNPUD);
#endif
udelay(50);
__raw_writel((__raw_readl(S5P64XX_EINT0CON0) & ~(0x7 << 20)) |
(0x2 << 20), S5P64XX_EINT0CON0);
__raw_writel(1UL << (IRQ_EINT(10) - IRQ_EINT(0)), S5P64XX_EINT0PEND);
__raw_writel(__raw_readl(S5P64XX_EINT0MASK)&~(1UL << (IRQ_EINT(10) - IRQ_EINT(0))), S5P64XX_EINT0MASK);
}
void universal_sdhci2_cfg_ext_cd(void)
{
printk(KERN_DEBUG "Universal :SD Detect configuration\n");
#if defined(CONFIG_SAMSUNG_CAPTIVATE) || defined(CONFIG_SAMSUNG_VIBRANT)
s3c_gpio_setpull(S5PV210_GPH3(4), S3C_GPIO_PULL_UP);
#else
s3c_gpio_setpull(S5PV210_GPH3(4), S3C_GPIO_PULL_NONE);
#endif
set_irq_type(IRQ_EINT(28), IRQ_TYPE_EDGE_BOTH);
}
int char_open(struct inode * inode, struct file * fp)
{
int rc, irq;
printk("device open \n");
//printk("dev is 0x%x\n", inode->i_rdev);
//printk("major is %d\n", MAJOR(inode->i_rdev));
//printk("minor is %d\n", MINOR(inode->i_rdev));
printk("S5PV210 IRQ:%d--%d--%d\n",S5PV210_GPH2(0),IRQ_EINT(16),gpio_to_irq(S5PV210_GPH2(0)));
rc = gpio_request (S5PV210_GPH2(0), "K1"); // kiem tra xem chan co free khong
if (rc) { // =1
printk (KERN_ALERT "Unable to request pin %d\n",S5PV210_GPH2(0));
return -1;
}
rc = gpio_request (S5PV210_GPH2(1), "K2");
if (rc) { // =0
printk (KERN_ALERT "Unable to request pin %d\n",S5PV210_GPH2(1));
return -1;
}
//led_no = MINOR(inode->i_rdev);
//printk("Reg:%x<----\n",*portj);
irq = gpio_to_irq(S5PV210_GPH2(0)); //IRQ_EINT(16) lay so ngat
printk (KERN_ALERT "IRQ K1= %d\n", irq); // in ra so ngat
rc = request_irq(irq, k1_handler, IRQF_TRIGGER_FALLING, "mybtnk1", NULL); // dang ky interrupt
if(rc)
{
printk("register irq %d error",irq);
return -1;
}
irq = gpio_to_irq(S5PV210_GPH2(1)); //IRQ_EINT(17)
// irq = IRG_EINT(17)
printk (KERN_ALERT "IRQ K2= %d\n", irq);
rc = request_irq(irq, k2_handler, IRQF_TRIGGER_FALLING, "mybtnk2", NULL);
if(rc)
{
printk("register irq %d error",irq);
return -1;
}
// my_timer.function, my_timer.data
//setup_timer( &my_timer, my_timer_callback, 0 ); // chong doi
//printk("start timer at %ld\n",jiffies);
//mod_timer( &my_timer, jiffies + msecs_to_jiffies(1000) );
init_waitqueue_head(&wq);
//printk("Reg:%x<----\n",*portj);
return 0;
}
static int __init smdk6410_rfkill_probe(struct platform_device *pdev)
#endif /* #ifdef CONFIG_MACH_JET */
#endif /* #ifdef CONFIG_MACH_SPICA */
#endif /* #ifdef CONFIG_MACH_INSTINCTQ */
{
int rc = 0;
int irq,ret;
//Initialize wake locks
wake_lock_init(&rfkill_wake_lock, WAKE_LOCK_SUSPEND, "board-rfkill");
wake_lock_init(&bt_wake_lock, WAKE_LOCK_SUSPEND, "bt-rfkill");
//BT Host Wake IRQ
irq = IRQ_BT_HOST_WAKE;
ret = request_irq(irq, bt_host_wake_irq_handler, 0, "bt_host_wake_irq_handler", NULL);
if(ret < 0)
#ifdef CONFIG_MACH_INSTINCTQ
printk("[BT] Request_irq failed \n");
#else
printk(KERN_DEBUG "[BT] Request_irq failed \n");
#endif /* #else #ifdef CONFIG_MACH_INSTINCTQ */
set_irq_type(irq, IRQ_TYPE_EDGE_BOTH);
enable_irq(IRQ_EINT(22));
//RFKILL init - default to bluetooth off
rfkill_switch_all(RFKILL_TYPE_BLUETOOTH, RFKILL_STATE_SOFT_BLOCKED);
bt_rfk = rfkill_allocate(&pdev->dev, RFKILL_TYPE_BLUETOOTH);
if (!bt_rfk)
return -ENOMEM;
bt_rfk->name = bt_name;
bt_rfk->state = RFKILL_STATE_SOFT_BLOCKED;
/* userspace cannot take exclusive control */
bt_rfk->user_claim_unsupported = 1;
bt_rfk->user_claim = 0;
bt_rfk->data = NULL; // user data
bt_rfk->toggle_radio = bluetooth_set_power;
#ifdef CONFIG_MACH_INSTINCTQ
printk("[BT] rfkill_register(bt_rfk) \n");
#else
printk(KERN_DEBUG "[BT] rfkill_register(bt_rfk) \n");
#endif /* #ifdef CONFIG_MACH_INSTINCTQ */
rc = rfkill_register(bt_rfk);
if (rc)
rfkill_free(bt_rfk);
bluetooth_set_power(NULL, RFKILL_STATE_SOFT_BLOCKED);
return rc;
}
void universal_sdhci2_cfg_ext_cd(void)
{
printk(" Universal :SD Detect configuration \n");
#if defined(CONFIG_MACH_S5PC110_P1)
s3c_gpio_setpull(S5PV210_GPH3(4), S3C_GPIO_PULL_NONE);
#else
s3c_gpio_setpull(S5PV210_GPH3(4), S3C_GPIO_PULL_NONE);
#endif
set_irq_type(IRQ_EINT(28), IRQ_TYPE_EDGE_BOTH);
}
static int __init s3c64xx_init_irq_eint(void)
{
int irq;
/* On DT-enabled systems EINTs are handled by pinctrl-s3c64xx driver. */
if (of_have_populated_dt())
return -ENODEV;
for (irq = IRQ_EINT(0); irq <= IRQ_EINT(27); irq++) {
irq_set_chip_and_handler(irq, &s3c_irq_eint, handle_level_irq);
irq_set_chip_data(irq, (void *)eint_irq_to_bit(irq));
set_irq_flags(irq, IRQF_VALID);
}
irq_set_chained_handler(IRQ_EINT0_3, s3c_irq_demux_eint0_3);
irq_set_chained_handler(IRQ_EINT4_11, s3c_irq_demux_eint4_11);
irq_set_chained_handler(IRQ_EINT12_19, s3c_irq_demux_eint12_19);
irq_set_chained_handler(IRQ_EINT20_27, s3c_irq_demux_eint20_27);
return 0;
}
static int s3c_irq_eint_wake(unsigned int irqno, unsigned int flag)
{
irqno -= IRQ_EINT(0);
if (flag) {
s3c_irqwake_eintmask &= ~(1 << irqno);
} else {
s3c_irqwake_eintmask |= (1 << irqno);
}
return 0;
}
static int forth_drv_open(struct inode *inode, struct file *file)
{
if (!atomic_dec_and_test(&canopen))
{
atomic_inc(&canopen);
return -EBUSY; /*已经打开*/
}
if (down_trylock(&button_lock)) //获得打开锁
return -EBUSY; //设备忙
/* 注册中断 */
request_irq(IRQ_EINT(19), buttons_irq, IRQF_TRIGGER_FALLING|IRQF_TRIGGER_RISING, "K4", &pins_desc[0]);
request_irq(IRQ_EINT(24), buttons_irq, IRQF_TRIGGER_FALLING|IRQF_TRIGGER_RISING, "K5", &pins_desc[1]);
request_irq(IRQ_EINT(25), buttons_irq, IRQF_TRIGGER_FALLING|IRQF_TRIGGER_RISING, "K6", &pins_desc[2]);
request_irq(IRQ_EINT(26), buttons_irq, IRQF_TRIGGER_FALLING|IRQF_TRIGGER_RISING, "K7", &pins_desc[3]);
request_irq(IRQ_EINT(27), buttons_irq, IRQF_TRIGGER_FALLING|IRQF_TRIGGER_RISING, "K8", &pins_desc[4]);
return 0;
}
/* 中断处理函数 */
static irqreturn_t irq_handler(int irqno, void *dev_id)
{
switch(irqno)
{
case IRQ_EINT(1):
key = 1;
break;
case IRQ_EINT(2):
key = 2;
break;
case IRQ_EINT(3):
key = 3;
break;
case IRQ_EINT(4):
key = 4;
break;
case IRQ_EINT(6):
key = 5;
break;
case IRQ_EINT(7):
key = 6;
break;
}
wake_up_interruptible(&mydevice->readq);
kill_fasync(&mydevice->fasync_queue,SIGIO,POLL_IN);
printk(KERN_INFO "irq_handler!\n");
return IRQ_HANDLED;
}
void key1_function(unsigned long data)
{
switch(my_timer.data)
{
case IRQ_EINT(1):
key = 1;
break;
case IRQ_EINT(2):
key = 2;
break;
case IRQ_EINT(3):
key = 3;
break;
case IRQ_EINT(4):
key = 4;
break;
case IRQ_EINT(6):
key = 6;
break;
case IRQ_EINT(7):
key = 7;
break;
}
flag = 1;
wake_up(&readq_queue);
kill_fasync(&async,SIGIO,POLLIN);
}
static int __init exynos_init_irq_eint(void)
{
int irq;
if (soc_is_exynos5250())
exynos_eint_base = ioremap(EXYNOS5_PA_GPIO1, SZ_4K);
else
exynos_eint_base = ioremap(EXYNOS4_PA_GPIO2, SZ_4K);
if (exynos_eint_base == NULL) {
pr_err("unable to ioremap for EINT base address\n");
return -ENOMEM;
}
for (irq = 0 ; irq <= 31 ; irq++) {
irq_set_chip_and_handler(IRQ_EINT(irq), &exynos_irq_eint,
handle_level_irq);
set_irq_flags(IRQ_EINT(irq), IRQF_VALID);
}
irq_set_chained_handler(EXYNOS_IRQ_EINT16_31, exynos_irq_demux_eint16_31);
for (irq = 0 ; irq <= 15 ; irq++) {
eint0_15_data[irq] = IRQ_EINT(irq);
if (soc_is_exynos5250()) {
irq_set_handler_data(exynos5_eint0_15_src_int[irq],
&eint0_15_data[irq]);
irq_set_chained_handler(exynos5_eint0_15_src_int[irq],
exynos_irq_eint0_15);
} else {
irq_set_handler_data(exynos4_eint0_15_src_int[irq],
&eint0_15_data[irq]);
irq_set_chained_handler(exynos4_eint0_15_src_int[irq],
exynos_irq_eint0_15);
}
}
return 0;
}
static void keys_timer_handler(unsigned long data)
{
unsigned int pinval;
unsigned int tmp;
if (!irq_dev)
return;
if ((irq_dev->irq == IRQ_EINT(19)) || (irq_dev->irq == IRQ_EINT(20))) {
tmp = readl(S3C64XX_GPLDAT);
pinval = tmp & (1<<irq_dev->pin);
if (pinval != irq_dev->pin_val)
return;
if (pinval) {
/* Key is not pressed down */
input_event(tiny6410_input_key, EV_KEY, irq_dev->key_val, 0); // 0 means not pressed down, 1 means pressed down
input_sync(tiny6410_input_key);
}else {
/* Key is pressed down */
input_event(tiny6410_input_key, EV_KEY, irq_dev->key_val, 1);
input_sync(tiny6410_input_key);
}
}else {
tmp = readl(S3C64XX_GPNDAT);
pinval = tmp & (1<<irq_dev->pin);
if (pinval != irq_dev->pin_val)
return;
if (pinval) {
/* Key is not pressed down */
input_event(tiny6410_input_key, EV_KEY, irq_dev->key_val, 0); // 0 means not pressed down, 1 means pressed down
input_sync(tiny6410_input_key);
}else {
/* Key is pressed down */
input_event(tiny6410_input_key, EV_KEY, irq_dev->key_val, 1);
input_sync(tiny6410_input_key);
}
}
}
static int __init test_init(void)
{
int ret;
INIT_WORK(&work, work_func);
ret = request_irq(IRQ_EINT(0), register_handler,
IRQF_TRIGGER_FALLING, "key1", NULL);
if(ret)
return -EBUSY;
return 0;
}
static int s5pv310_gpio2int(struct gpio_chip *chip, unsigned pin)
{
int ret = 0;
int base = chip->base;
switch (base) {
case S5PV310_GPX0(0):
ret = IRQ_EINT(0) + pin;
break;
case S5PV310_GPX1(0):
ret = IRQ_EINT(8) + pin;
break;
case S5PV310_GPX2(0):
ret = IRQ_EINT(16) + pin;
break;
case S5PV310_GPX3(0):
ret = IRQ_EINT(24) + pin;
break;
}
return ret;
}
static __init int irq_test_init(void)
{
int ret;
ret = request_irq(IRQ_EINT(0), do_eint0, IRQF_TRIGGER_FALLING, "eint0", NULL);
if(ret < 0)
return ret;
INIT_WORK(&work, do_work);
INIT_DELAYED_WORK(&dwork, do_dwork);
return 0;
}
