/* Converts an IRExpr into 1 or 2 "flat" expressions of type Long */
static void packToI64 ( IRSB* sb, IRExpr* e, IRExpr* res[2], IROp irop) {
res[1]=NULL; // won't be used at all
IRTemp tmp64;
switch (typeOfIRExpr(sb->tyenv,e)) {
case Ity_I1: res[0]= IRExpr_Unop(Iop_1Uto64,e); break;
case Ity_I8: res[0]= IRExpr_Unop(Iop_8Uto64,e); break;
case Ity_I16: res[0]= IRExpr_Unop(Iop_16Uto64,e); break;
case Ity_I32: res[0]= IRExpr_Unop(Iop_32Uto64,e); break;
case Ity_F32: e = IRExpr_Unop(Iop_ReinterpF32asI32,e);
res[0]= IRExpr_Unop(Iop_32Uto64,e); break;
case Ity_I64: res[0]= e; return;
case Ity_F64: res[0]= IRExpr_Unop(Iop_ReinterpF64asI64,e); break;
case Ity_V128: /* 128-bit SIMD */
//tmp64 = newIRTemp(sb->tyenv, Ity_I64);
//addStmtToIRSB(sb, IRStmt_WrTmp(tmp64, IRExpr_Unop(Iop_V128to64,e)));
//res[0]= IRExpr_Unop(Iop_64to32, IRExpr_RdTmp(tmp64) );
//res[1]= IRExpr_Unop(Iop_64HIto32, IRExpr_RdTmp(tmp64) );
res[0]= IRExpr_Unop(Iop_V128to64, e );
if (dropV128HiPart(irop)) break;
res[1]= IRExpr_Unop(Iop_V128HIto64, e );
break;
case Ity_I128: /* 128-bit scalar */
case Ity_INVALID:
default: VG_(tool_panic)("COJAC cannot packToI64..."); break;
}
IRTemp myArg = newIRTemp(sb->tyenv, Ity_I64);
addStmtToIRSB(sb, IRStmt_WrTmp(myArg, res[0]));
res[0]=IRExpr_RdTmp(myArg); // now that's a "flat" expression
if (res[1]==NULL) return; // ... else it was 128-bit SIMD
IRTemp myArg2 = newIRTemp(sb->tyenv, Ity_I64);
addStmtToIRSB(sb, IRStmt_WrTmp(myArg2, res[1]));
res[1]=IRExpr_RdTmp(myArg2); // now that's a "flat" expression
}
static IRExpr* assignNew_HWord(IRSB* sb_out, IRExpr* expr)
{
IRTemp tmp = newIRTemp(sb_out->tyenv, Ity_I32);
switch (typeOfIRExpr(sb_out->tyenv, expr))
{
case Ity_I1:
addStmtToIRSB(sb_out, IRStmt_WrTmp(tmp, IRExpr_Unop(Iop_1Uto32, expr)));
break;
case Ity_I8:
addStmtToIRSB(sb_out, IRStmt_WrTmp(tmp, IRExpr_Unop(Iop_8Uto32, expr)));
break;
case Ity_I16:
addStmtToIRSB(sb_out, IRStmt_WrTmp(tmp, IRExpr_Unop(Iop_16Uto32, expr)));
break;
case Ity_I32:
addStmtToIRSB(sb_out, IRStmt_WrTmp(tmp, expr));
break;
case Ity_I64:
addStmtToIRSB(sb_out, IRStmt_WrTmp(tmp, IRExpr_Unop(Iop_64to32, expr)));
break;
default:
VG_(tool_panic)("assignNew_HWord");
}
return IRExpr_RdTmp(tmp);
}
/* Converts an IRExpr into 1 or 2 "flat" expressions of type Int */
static void packToI32 ( IRSB* sb, IRExpr* e, IRExpr* res[2]) {
//IRType eType = Ity_I32;
IRTemp tmp64;
res[1]=NULL;
switch (typeOfIRExpr(sb->tyenv,e)) {
case Ity_I1: res[0]= IRExpr_Unop(Iop_1Uto32,e); break;
case Ity_I8: res[0]= IRExpr_Unop(Iop_8Uto32,e); break;
case Ity_I16: res[0]= IRExpr_Unop(Iop_16Uto32,e); break;
case Ity_I32: res[0]= e; return;
case Ity_F32: res[0]= IRExpr_Unop(Iop_ReinterpF32asI32,e); break;
case Ity_I64:
res[0]= IRExpr_Unop(Iop_64to32, e);
res[1]= IRExpr_Unop(Iop_64HIto32, e);
break;
case Ity_F64:
tmp64 = newIRTemp(sb->tyenv, Ity_I64);
addStmtToIRSB(sb, IRStmt_WrTmp(tmp64, IRExpr_Unop(Iop_ReinterpF64asI64,e)));
res[0]= IRExpr_Unop(Iop_64to32, IRExpr_RdTmp(tmp64) );
res[1]= IRExpr_Unop(Iop_64HIto32, IRExpr_RdTmp(tmp64) );
break;
case Ity_V128: /* 128-bit SIMD */
case Ity_I128: /* 128-bit scalar */
case Ity_INVALID:
default: VG_(tool_panic)("COJAC cannot packToI32..."); break;
}
IRTemp myArg = newIRTemp(sb->tyenv, Ity_I32);
addStmtToIRSB(sb, IRStmt_WrTmp(myArg, res[0]));
res[0]=IRExpr_RdTmp(myArg); // now that's a "flat" expression
if (res[1]==NULL) return;
IRTemp myArg2 = newIRTemp(sb->tyenv, Ity_I32);
addStmtToIRSB(sb, IRStmt_WrTmp(myArg2, res[1]));
res[1]=IRExpr_RdTmp(myArg2); // now that's a "flat" expression
}
/*
Bind the given expression to a new temporary, and return the temporary.
This effectively converts an arbitrary expression into an IRAtom.
*/
static IRExpr* assignNew(IRSB* sb_out, IRExpr* expr)
{
IRTemp tmp = newIRTemp(sb_out->tyenv, typeOfIRExpr(sb_out->tyenv, expr));
addStmtToIRSB(sb_out, IRStmt_WrTmp(tmp, expr));
return IRExpr_RdTmp(tmp);
}
IRStmt* pyvex_deepCopyIRStmt ( IRStmt* s )
{
switch (s->tag) {
case Ist_NoOp:
return IRStmt_NoOp();
case Ist_AbiHint:
return IRStmt_AbiHint(pyvex_deepCopyIRExpr(s->Ist.AbiHint.base),
s->Ist.AbiHint.len,
pyvex_deepCopyIRExpr(s->Ist.AbiHint.nia));
case Ist_IMark:
return IRStmt_IMark(s->Ist.IMark.addr,
s->Ist.IMark.len,
s->Ist.IMark.delta);
case Ist_Put:
return IRStmt_Put(s->Ist.Put.offset,
pyvex_deepCopyIRExpr(s->Ist.Put.data));
case Ist_PutI:
return IRStmt_PutI(pyvex_deepCopyIRPutI(s->Ist.PutI.details));
case Ist_WrTmp:
return IRStmt_WrTmp(s->Ist.WrTmp.tmp,
pyvex_deepCopyIRExpr(s->Ist.WrTmp.data));
case Ist_Store:
return IRStmt_Store(s->Ist.Store.end,
pyvex_deepCopyIRExpr(s->Ist.Store.addr),
pyvex_deepCopyIRExpr(s->Ist.Store.data));
case Ist_CAS:
return IRStmt_CAS(pyvex_deepCopyIRCAS(s->Ist.CAS.details));
case Ist_LLSC:
return IRStmt_LLSC(s->Ist.LLSC.end,
s->Ist.LLSC.result,
pyvex_deepCopyIRExpr(s->Ist.LLSC.addr),
s->Ist.LLSC.storedata
? pyvex_deepCopyIRExpr(s->Ist.LLSC.storedata)
: NULL);
case Ist_Dirty:
return IRStmt_Dirty(pyvex_deepCopyIRDirty(s->Ist.Dirty.details));
case Ist_MBE:
return IRStmt_MBE(s->Ist.MBE.event);
case Ist_Exit:
return IRStmt_Exit(pyvex_deepCopyIRExpr(s->Ist.Exit.guard),
s->Ist.Exit.jk,
pyvex_deepCopyIRConst(s->Ist.Exit.dst),
s->Ist.Exit.offsIP);
default:
vpanic("pyvex_deepCopyIRStmt");
}
}
static IRSB *
bcg_instrument(VgCallbackClosure* closure,
IRSB* bb,
VexGuestLayout* layout,
VexGuestExtents* vge,
IRType gWordTy,
IRType hWordTy)
{
unsigned long rip = 0;
int i;
if (bb->jumpkind != Ijk_Ret &&
bb->next->tag != Iex_Const) {
IRTemp tmp;
for (i = bb->stmts_used - 1; i >= 0; i--) {
if (bb->stmts[i]->tag == Ist_IMark) {
rip = bb->stmts[i]->Ist.IMark.addr;
break;
}
}
tl_assert(i >= 0);
if (bb->next->tag == Iex_RdTmp) {
tmp = bb->next->Iex.RdTmp.tmp;
} else {
tmp = newIRTemp(bb->tyenv, Ity_I64);
addStmtToIRSB(bb,
IRStmt_WrTmp(tmp, bb->next));
bb->next = IRExpr_RdTmp(tmp);
}
addStmtToIRSB(bb,
IRStmt_Dirty(
unsafeIRDirty_0_N(
0,
"log_call",
log_call,
mkIRExprVec_3(
IRExpr_Const(IRConst_U64(rip)),
IRExpr_Const(IRConst_U64(bb->jumpkind == Ijk_Call)),
bb->next))));
}
return bb;
}
/* assign value to tmp */
static inline
void assign ( IRSB* sb, IRTemp tmp, IRExpr* expr ) {
addStmtToIRSB( sb, IRStmt_WrTmp(tmp, expr) );
}
IRSB* bb_to_IR ( /*OUT*/VexGuestExtents* vge,
/*IN*/ void* callback_opaque,
/*IN*/ DisOneInstrFn dis_instr_fn,
/*IN*/ UChar* guest_code,
/*IN*/ Addr64 guest_IP_bbstart,
/*IN*/ Bool (*chase_into_ok)(void*,Addr64),
/*IN*/ Bool host_bigendian,
/*IN*/ VexArch arch_guest,
/*IN*/ VexArchInfo* archinfo_guest,
/*IN*/ VexAbiInfo* abiinfo_both,
/*IN*/ IRType guest_word_type,
/*IN*/ Bool do_self_check,
/*IN*/ Bool (*preamble_function)(void*,IRSB*),
/*IN*/ Int offB_TISTART,
/*IN*/ Int offB_TILEN )
{
Long delta;
Int i, n_instrs, first_stmt_idx;
Bool resteerOK, need_to_put_IP, debug_print;
DisResult dres;
IRStmt* imark;
static Int n_resteers = 0;
Int d_resteers = 0;
Int selfcheck_idx = 0;
IRSB* irsb;
Addr64 guest_IP_curr_instr;
IRConst* guest_IP_bbstart_IRConst = NULL;
Bool (*resteerOKfn)(void*,Addr64) = NULL;
debug_print = toBool(vex_traceflags & VEX_TRACE_FE);
/* Note: for adler32 to work without % operation for the self
check, need to limit length of stuff it scans to 5552 bytes.
Therefore limiting the max bb len to 100 insns seems generously
conservative. */
/* check sanity .. */
vassert(sizeof(HWord) == sizeof(void*));
vassert(vex_control.guest_max_insns >= 1);
vassert(vex_control.guest_max_insns < 100);
vassert(vex_control.guest_chase_thresh >= 0);
vassert(vex_control.guest_chase_thresh < vex_control.guest_max_insns);
vassert(guest_word_type == Ity_I32 || guest_word_type == Ity_I64);
/* Start a new, empty extent. */
vge->n_used = 1;
vge->base[0] = guest_IP_bbstart;
vge->len[0] = 0;
/* And a new IR superblock to dump the result into. */
irsb = emptyIRSB();
/* Delta keeps track of how far along the guest_code array we have
so far gone. */
delta = 0;
n_instrs = 0;
/* Guest addresses as IRConsts. Used in the two self-checks
generated. */
if (do_self_check) {
guest_IP_bbstart_IRConst
= guest_word_type==Ity_I32
? IRConst_U32(toUInt(guest_IP_bbstart))
: IRConst_U64(guest_IP_bbstart);
}
/* If asked to make a self-checking translation, leave 5 spaces
in which to put the check statements. We'll fill them in later
when we know the length and adler32 of the area to check. */
if (do_self_check) {
selfcheck_idx = irsb->stmts_used;
addStmtToIRSB( irsb, IRStmt_NoOp() );
addStmtToIRSB( irsb, IRStmt_NoOp() );
addStmtToIRSB( irsb, IRStmt_NoOp() );
addStmtToIRSB( irsb, IRStmt_NoOp() );
addStmtToIRSB( irsb, IRStmt_NoOp() );
}
/* If the caller supplied a function to add its own preamble, use
it now. */
if (preamble_function) {
Bool stopNow = preamble_function( callback_opaque, irsb );
if (stopNow) {
/* The callback has completed the IR block without any guest
insns being disassembled into it, so just return it at
this point, even if a self-check was requested - as there
is nothing to self-check. The five self-check no-ops will
still be in place, but they are harmless. */
return irsb;
}
}
/* Process instructions. */
while (True) {
vassert(n_instrs < vex_control.guest_max_insns);
/* Regardless of what chase_into_ok says, is chasing permissible
at all right now? Set resteerOKfn accordingly. */
resteerOK
= toBool(
n_instrs < vex_control.guest_chase_thresh
/* If making self-checking translations, don't chase
.. it makes the checks too complicated. We only want
to scan just one sequence of bytes in the check, not
a whole bunch. */
&& !do_self_check
/* we can't afford to have a resteer once we're on the
last extent slot. */
&& vge->n_used < 3
);
resteerOKfn
= resteerOK ? chase_into_ok : const_False;
/* This is the IP of the instruction we're just about to deal
with. */
guest_IP_curr_instr = guest_IP_bbstart + delta;
/* This is the irsb statement array index of the first stmt in
this insn. That will always be the instruction-mark
descriptor. */
first_stmt_idx = irsb->stmts_used;
/* Add an instruction-mark statement. We won't know until after
disassembling the instruction how long it instruction is, so
just put in a zero length and we'll fix it up later. */
addStmtToIRSB( irsb, IRStmt_IMark( guest_IP_curr_instr, 0 ));
/* for the first insn, the dispatch loop will have set
%IP, but for all the others we have to do it ourselves. */
need_to_put_IP = toBool(n_instrs > 0);
/* Finally, actually disassemble an instruction. */
dres = dis_instr_fn ( irsb,
need_to_put_IP,
resteerOKfn,
callback_opaque,
guest_code,
delta,
guest_IP_curr_instr,
arch_guest,
archinfo_guest,
abiinfo_both,
host_bigendian );
/* stay sane ... */
vassert(dres.whatNext == Dis_StopHere
|| dres.whatNext == Dis_Continue
|| dres.whatNext == Dis_Resteer);
vassert(dres.len >= 0 && dres.len <= 20);
if (dres.whatNext != Dis_Resteer)
vassert(dres.continueAt == 0);
/* Fill in the insn-mark length field. */
vassert(first_stmt_idx >= 0 && first_stmt_idx < irsb->stmts_used);
imark = irsb->stmts[first_stmt_idx];
vassert(imark);
vassert(imark->tag == Ist_IMark);
vassert(imark->Ist.IMark.len == 0);
imark->Ist.IMark.len = toUInt(dres.len);
/* Print the resulting IR, if needed. */
if (vex_traceflags & VEX_TRACE_FE) {
for (i = first_stmt_idx; i < irsb->stmts_used; i++) {
vex_printf(" ");
ppIRStmt(irsb->stmts[i]);
vex_printf("\n");
}
}
/* If dis_instr_fn terminated the BB at this point, check it
also filled in the irsb->next field. */
if (dres.whatNext == Dis_StopHere) {
vassert(irsb->next != NULL);
if (debug_print) {
vex_printf(" ");
vex_printf( "goto {");
ppIRJumpKind(irsb->jumpkind);
vex_printf( "} ");
ppIRExpr( irsb->next );
vex_printf( "\n");
}
}
/* Update the VexGuestExtents we are constructing. */
/* If vex_control.guest_max_insns is required to be < 100 and
each insn is at max 20 bytes long, this limit of 5000 then
seems reasonable since the max possible extent length will be
100 * 20 == 2000. */
vassert(vge->len[vge->n_used-1] < 5000);
vge->len[vge->n_used-1]
= toUShort(toUInt( vge->len[vge->n_used-1] + dres.len ));
n_instrs++;
if (debug_print)
vex_printf("\n");
/* Advance delta (inconspicuous but very important :-) */
delta += (Long)dres.len;
switch (dres.whatNext) {
case Dis_Continue:
vassert(irsb->next == NULL);
if (n_instrs < vex_control.guest_max_insns) {
/* keep going */
} else {
/* We have to stop. */
irsb->next
= IRExpr_Const(
guest_word_type == Ity_I32
? IRConst_U32(toUInt(guest_IP_bbstart+delta))
: IRConst_U64(guest_IP_bbstart+delta)
);
goto done;
}
break;
case Dis_StopHere:
vassert(irsb->next != NULL);
goto done;
case Dis_Resteer:
/* Check that we actually allowed a resteer .. */
vassert(resteerOK);
vassert(irsb->next == NULL);
/* figure out a new delta to continue at. */
vassert(resteerOKfn(callback_opaque,dres.continueAt));
delta = dres.continueAt - guest_IP_bbstart;
/* we now have to start a new extent slot. */
vge->n_used++;
vassert(vge->n_used <= 3);
vge->base[vge->n_used-1] = dres.continueAt;
vge->len[vge->n_used-1] = 0;
n_resteers++;
d_resteers++;
if (0 && (n_resteers & 0xFF) == 0)
vex_printf("resteer[%d,%d] to 0x%llx (delta = %lld)\n",
n_resteers, d_resteers,
dres.continueAt, delta);
break;
default:
vpanic("bb_to_IR");
}
}
/*NOTREACHED*/
vassert(0);
done:
/* We're done. The only thing that might need attending to is that
a self-checking preamble may need to be created. */
if (do_self_check) {
UInt len2check, adler32;
IRTemp tistart_tmp, tilen_tmp;
HWord p_adler_helper;
vassert(vge->n_used == 1);
len2check = vge->len[0];
if (len2check == 0)
len2check = 1;
adler32 = genericg_compute_adler32( (HWord)guest_code, len2check );
/* Set TISTART and TILEN. These will describe to the despatcher
the area of guest code to invalidate should we exit with a
self-check failure. */
tistart_tmp = newIRTemp(irsb->tyenv, guest_word_type);
tilen_tmp = newIRTemp(irsb->tyenv, guest_word_type);
irsb->stmts[selfcheck_idx+0]
= IRStmt_WrTmp(tistart_tmp, IRExpr_Const(guest_IP_bbstart_IRConst) );
irsb->stmts[selfcheck_idx+1]
= IRStmt_WrTmp(tilen_tmp,
guest_word_type==Ity_I32
? IRExpr_Const(IRConst_U32(len2check))
: IRExpr_Const(IRConst_U64(len2check))
);
irsb->stmts[selfcheck_idx+2]
= IRStmt_Put( offB_TISTART, IRExpr_RdTmp(tistart_tmp) );
irsb->stmts[selfcheck_idx+3]
= IRStmt_Put( offB_TILEN, IRExpr_RdTmp(tilen_tmp) );
p_adler_helper = abiinfo_both->host_ppc_calls_use_fndescrs
? ((HWord*)(&genericg_compute_adler32))[0]
: (HWord)&genericg_compute_adler32;
irsb->stmts[selfcheck_idx+4]
= IRStmt_Exit(
IRExpr_Binop(
Iop_CmpNE32,
mkIRExprCCall(
Ity_I32,
2/*regparms*/,
"genericg_compute_adler32",
(void*)p_adler_helper,
mkIRExprVec_2(
mkIRExpr_HWord( (HWord)guest_code ),
mkIRExpr_HWord( (HWord)len2check )
)
),
IRExpr_Const(IRConst_U32(adler32))
),
Ijk_TInval,
guest_IP_bbstart_IRConst
);
}
return irsb;
}
