//----------------------------------------------------------------------------------------------------------------------
void InitEPwm1(void){ // Function provided to set configuration for ePWM1
InitEPwm1Gpio();
// Setup TBCLK
EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Count up
EPwm1Regs.TBPRD = EPWM1_TIMER_TBPRD; // Set timer period
EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE; // Disable phase loading
EPwm1Regs.TBPHS.half.TBPHS = 0x0000; // Phase is 0
EPwm1Regs.TBCTR = 0x0000; // Clear counter
EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV2; // Clock ratio to SYSCLKOUT
EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV2;
// Setup shadow register load on ZERO
EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
// Set Compare values
EPwm1Regs.CMPA.half.CMPA = EPWM1_MIN_CMPA; // Set compare A value
EPwm1Regs.CMPB = EPWM1_MIN_CMPB; // Set Compare B value
// Set actions
EPwm1Regs.AQCTLA.bit.ZRO = AQ_SET; // Set PWM1A on Zero
EPwm1Regs.AQCTLA.bit.CAU = AQ_CLEAR; // Clear PWM1A on event A, up count
EPwm1Regs.AQCTLB.bit.ZRO = AQ_SET; // Set PWM1B on Zero
EPwm1Regs.AQCTLB.bit.CBU = AQ_CLEAR; // Clear PWM1B on event B, up count
// Interrupt where we will change the Compare Values
/*EPwm1Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO; // Select INT on Zero event
EPwm1Regs.ETSEL.bit.INTEN = 0; // Enable INT
EPwm1Regs.ETPS.bit.INTPRD = ET_3RD; // Generate INT on 3rd event*/
}
void InitEPwmGpio(void)
{
#if DSP28_EPWM1
InitEPwm1Gpio();
#endif // endif DSP28_EPWM1
#if DSP28_EPWM2
InitEPwm2Gpio();
#endif // endif DSP28_EPWM2
#if DSP28_EPWM3
InitEPwm3Gpio();
#endif // endif DSP28_EPWM3
#if DSP28_EPWM4
InitEPwm4Gpio();
#endif // endif DSP28_EPWM4
#if DSP28_EPWM5
InitEPwm5Gpio();
#endif // endif DSP28_EPWM5
#if DSP28_EPWM6
InitEPwm6Gpio();
#endif // endif DSP28_EPWM6
#if DSP28_EPWM7
InitEPwm7Gpio();
#endif // endif DSP28_EPWM7
#if DSP28_EPWM8
InitEPwm8Gpio();
#endif // endif DSP28_EPWM8
}
static void init_peripherals_drivers(void)
{
uint16_t i;
/// Initialization of HRADC boards
stop_DMA();
decimation_factor = HRADC_FREQ_SAMP / ISR_CONTROL_FREQ;
decimation_coeff = 1.0 / decimation_factor;
HRADCs_Info.enable_Sampling = 0;
HRADCs_Info.n_HRADC_boards = NUM_HRADC_BOARDS;
Init_DMA_McBSP_nBuffers(NUM_HRADC_BOARDS, decimation_factor, HRADC_SPI_CLK);
Init_SPIMaster_McBSP(HRADC_SPI_CLK);
Init_SPIMaster_Gpio();
InitMcbspa20bit();
DELAY_US(500000);
send_ipc_lowpriority_msg(0,Enable_HRADC_Boards);
DELAY_US(2000000);
for(i = 0; i < NUM_HRADC_BOARDS; i++)
{
Init_HRADC_Info(&HRADCs_Info.HRADC_boards[i], i, decimation_factor,
buffers_HRADC[i], TRANSDUCER_GAIN[i]);
Config_HRADC_board(&HRADCs_Info.HRADC_boards[i], TRANSDUCER_OUTPUT_TYPE[i],
HRADC_HEATER_ENABLE[i], HRADC_MONITOR_ENABLE[i]);
}
Config_HRADC_SoC(HRADC_FREQ_SAMP);
/// Initialization of PWM modules
g_pwm_modules.num_modules = 2;
PWM_MODULATOR_MOD_A = &EPwm1Regs;
PWM_MODULATOR_MOD_B = &EPwm2Regs;
disable_pwm_outputs();
disable_pwm_tbclk();
init_pwm_mep_sfo();
/// PWM initialization
init_pwm_module(PWM_MODULATOR_MOD_A, PWM_FREQ, 0, PWM_Sync_Master, 0,
PWM_ChB_Independent, PWM_DEAD_TIME);
init_pwm_module(PWM_MODULATOR_MOD_B, PWM_FREQ, 0, PWM_Sync_Slave, 0,
PWM_ChB_Independent, PWM_DEAD_TIME);
InitEPwm1Gpio();
InitEPwm2Gpio();
/// Initialization of timers
InitCpuTimers();
ConfigCpuTimer(&CpuTimer0, C28_FREQ_MHZ, 1000000);
CpuTimer0Regs.TCR.bit.TIE = 0;
}
void InitEPwmGpio(void)
{
InitEPwm1Gpio();
InitEPwm2Gpio();
InitEPwm3Gpio();
InitEPwm4Gpio();
InitEPwm5Gpio();
}
void InitEPwmGpio(void)
{
InitEPwm1Gpio();
InitEPwm2Gpio();
InitEPwm3Gpio();
#if DSP28_EPWM4
InitEPwm4Gpio();
#endif // endif DSP28_EPWM4
}
void InitEPwmGpio(void)
{
InitEPwm1Gpio();
InitEPwm2Gpio();
InitEPwm3Gpio();
InitEPwm4Gpio();
#if DSP28_EPWM5
InitEPwm5Gpio();
#endif // endif DSP28_EPWM5
#if DSP28_EPWM6
InitEPwm6Gpio();
#endif // endif DSP28_EPWM6
}
void InitEPwmTimer()
{
EALLOW;
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0; // Stop all the TB clocks
EDIS;
InitEPwm1Gpio();
InitEPwm2Gpio();
InitEPwm3Gpio();
// Setup Sync
EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN; // Pass through
EPwm2Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN; // Pass through
EPwm3Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN; // Pass through
// Allow each timer to be sync'ed
EPwm1Regs.TBCTL.bit.PHSEN = TB_ENABLE;
EPwm2Regs.TBCTL.bit.PHSEN = TB_ENABLE;
EPwm3Regs.TBCTL.bit.PHSEN = TB_ENABLE;
EPwm1Regs.TBPHS.half.TBPHS = 100;
EPwm2Regs.TBPHS.half.TBPHS = 200;
EPwm3Regs.TBPHS.half.TBPHS = 300;
EPwm1Regs.TBPRD = PWM1_TIMER_TBPRD;
EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Count up
EPwm1Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO; // Select INT on Zero event
EPwm1Regs.ETSEL.bit.INTEN = PWM1_INT_ENABLE; // Enable INT
EPwm1Regs.ETPS.bit.INTPRD = ET_1ST; // Generate INT on 1st event
EPwm2Regs.TBPRD = PWM2_TIMER_TBPRD;
EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Count up
EPwm2Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO; // Enable INT on Zero event
EPwm2Regs.ETSEL.bit.INTEN = PWM2_INT_ENABLE; // Enable INT
EPwm2Regs.ETPS.bit.INTPRD = ET_2ND; // Generate INT on 2nd event
EPwm3Regs.TBPRD = PWM3_TIMER_TBPRD;
EPwm3Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Count up
EPwm3Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO; // Enable INT on Zero event
EPwm3Regs.ETSEL.bit.INTEN = PWM3_INT_ENABLE; // Enable INT
EPwm3Regs.ETPS.bit.INTPRD = ET_3RD; // Generate INT on 3rd event
EALLOW;
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1; // Start all the timers synced
EDIS;
}
void pwm_config(void)
{
pwm_output_disable();
Periodo_ticks = pwm_period_calculation(F_SAMP);
pwm1_config(); //pulsos disparo
pwm2_config(); //pulsos disparo
pwm3_config();
pwm4_config(); //DAC pwm
pwm5_config(); //Gera sinal CNVST para iniciar conversao do AD7634
InitEPwm1Gpio();
InitEPwm2Gpio();
InitEPwm3Gpio();
InitEPwm4Gpio();
InitEPwm5Gpio();
pwm_mep_sfo_init();
}
void EPwmSetup()
{
// 使能前10个Epwm的I/O引脚
InitEPwm1Gpio();
InitEPwm2Gpio();
InitEPwm3Gpio();
InitEPwm4Gpio();
InitEPwm5Gpio();
//InitEPwm6Gpio();
EPwm1Config(0, 0);
EPwm2Config(0, 0);
EPwm3Config(0, 0);
EPwm4Config(0, 0);
EPwm5Config(0, 0);
}
void main(void)
{
// WARNING: Always ensure you call memcpy before running any functions from RAM
// InitSysCtrl includes a call to a RAM based function and without a call to
// memcpy first, the processor will go "into the weeds"
#ifdef _FLASH
memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (size_t)&RamfuncsLoadSize);
#endif
// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the f2802x_SysCtrl.c file.
InitSysCtrl();
// Step 2. Initialize GPIO:
// This example function is found in the f2802x_Gpio.c file and
// illustrates how to set the GPIO to it's default state.
// InitGpio(); // Skipped for this example
// For this case, just init GPIO for EPwm1-EPwm4
// For this case just init GPIO pins for EPwm1, EPwm2, EPwm3, EPwm4
// These functions are in the f2802x_EPwm.c file
InitEPwm1Gpio();
InitEPwm2Gpio();
InitEPwm3Gpio();
InitEPwm4Gpio();
// Step 3. Clear all interrupts and initialize PIE vector table:
// Disable CPU interrupts
DINT;
// Initialize the PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags
// are cleared.
// This function is found in the f2802x_PieCtrl.c file.
InitPieCtrl();
// Disable CPU interrupts and clear all CPU interrupt flags:
IER = 0x0000;
IFR = 0x0000;
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example. This is useful for debug purposes.
// The shell ISR routines are found in f2802x_DefaultIsr.c.
// This function is found in f2802x_PieVect.c.
InitPieVectTable();
// Step 4. Initialize all the Device Peripherals:
// Not required for this example
// For this example, only initialize the EPwm
// Step 5. User specific code, enable interrupts:
update =1;
DutyFine =0;
EALLOW;
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
EDIS;
// Some useful Period vs Frequency values
// SYSCLKOUT = 60 MHz 40 MHz
// --------------------------------------
// Period Frequency Frequency
// 1000 60 kHz 40 kHz
// 800 75 kHz 50 kHz
// 600 100 kHz 67 kHz
// 500 120 kHz 80 kHz
// 250 240 kHz 160 kHz
// 200 300 kHz 200 kHz
// 100 600 kHz 400 kHz
// 50 1.2 Mhz 800 kHz
// 25 2.4 Mhz 1.6 MHz
// 20 3.0 Mhz 2.0 MHz
// 12 5.0 MHz 3.3 MHz
// 10 6.0 MHz 4.0 MHz
// 9 6.7 MHz 4.4 MHz
// 8 7.5 MHz 5.0 MHz
// 7 8.6 MHz 5.7 MHz
// 6 10.0 MHz 6.6 MHz
// 5 12.0 MHz 8.0 MHz
//====================================================================
// ePWM and HRPWM register initialization
//====================================================================
HRPWM1_Config(10); // ePWM1 target, Period = 10
HRPWM2_Config(20); // ePWM2 target, Period = 20
HRPWM3_Config(10); // ePWM3 target, Period = 10
HRPWM4_Config(20); // ePWM4 target, Period = 20
EALLOW;
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;
EDIS;
while (update ==1)
{
for(DutyFine =1; DutyFine <256 ;DutyFine ++)
{
// Example, write to the HRPWM extension of CMPA
EPwm1Regs.CMPA.half.CMPAHR = DutyFine << 8; // Left shift by 8 to write into MSB bits
EPwm2Regs.CMPA.half.CMPAHR = DutyFine << 8; // Left shift by 8 to write into MSB bits
// Example, 32-bit write to CMPA:CMPAHR
EPwm3Regs.CMPA.all = ((Uint32)EPwm3Regs.CMPA.half.CMPA << 16) + (DutyFine << 8);
EPwm4Regs.CMPA.all = ((Uint32)EPwm4Regs.CMPA.half.CMPA << 16) + (DutyFine << 8);
for (i=0;i<10000;i++){} // Dummy delay between MEP changes
}
}
}
main() {
InitSysCtrl(); // 初始化system
DINT;
// 初始化PIE
InitPieCtrl();
// 初始化ADC
InitPieVectTable();
MemCopy(&RamfuncsLoadStart, &RamfuncsLoadEnd, &RamfuncsRunStart);
InitFlash();
//AdcOffsetSelfCal();
InitAdc();
IER = 0x0000;
IFR = 0x0000;
// 初始化中斷向量表
InitEPwm1Gpio();
GpioCtrlRegs.GPAMUX1.bit.GPIO0 = 1; // GPIO0 = PWM1A
GpioCtrlRegs.GPADIR.bit.GPIO0 = 1; //GPIO0 = output
EALLOW;
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
InitEPwm1Example();
InitCpuTimers();
ConfigCpuTimer(&CpuTimer0, 1, 3906); //必須先配置 再致能 !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
CpuTimer0Regs.TCR.all = 0x4000; // 致能CPUTIMER0
EDIS;
// 設定中斷向量表位置
EALLOW;
PieVectTable.XINT1 = &xint1_isr;
PieVectTable.XINT2 = &xint2_isr;
PieVectTable.ADCINT1 = &adc_isr;
PieVectTable.TINT0 = &cputimer_isr;
EDIS;
// 設置外部中斷腳位及燈號腳位
EALLOW;
GpioCtrlRegs.GPAMUX1.bit.GPIO1 = 0; // GPIO ADC開關
GpioCtrlRegs.GPADIR.bit.GPIO1 = 0; // input
GpioCtrlRegs.GPAQSEL1.bit.GPIO1 = 0; // XINT1 Synch to SYSCLKOUT only
GpioIntRegs.GPIOXINT1SEL.bit.GPIOSEL = 1; // XINT1 is GPIO1
GpioCtrlRegs.GPAPUD.bit.GPIO1 = 0;
GpioCtrlRegs.GPAMUX1.bit.GPIO2 = 0; // GPIO
GpioCtrlRegs.GPADIR.bit.GPIO2 = 1; // OUTput
GpioDataRegs.GPACLEAR.bit.GPIO2 = 1; // 當ADC ON/OFF 標示燈
GpioCtrlRegs.GPAMUX1.bit.GPIO3 = 0; // GPIO ePWM開關
GpioCtrlRegs.GPADIR.bit.GPIO3 = 0;
GpioCtrlRegs.GPAQSEL1.bit.GPIO3 = 0; // XINT2 Synch to SYSCLKOUT only
GpioIntRegs.GPIOXINT2SEL.bit.GPIOSEL = 3; // XINT2 is GPIO3
GpioCtrlRegs.GPAPUD.bit.GPIO3 = 0; //
GpioCtrlRegs.GPAMUX1.bit.GPIO4 = 0; // GPIO
GpioCtrlRegs.GPADIR.bit.GPIO4 = 1; // OUTput
GpioDataRegs.GPACLEAR.bit.GPIO4 = 1; // 當 ePWM ON/OFF 標示燈
GpioCtrlRegs.GPAMUX1.bit.GPIO6 = 0; // GPIO
GpioCtrlRegs.GPADIR.bit.GPIO6 = 1; // OUTput 閃爍用
GpioDataRegs.GPACLEAR.bit.GPIO6 = 1;
EDIS;
IER |= M_INT1; // 開啟GROUP1中斷
EINT;
ERTM;
EALLOW;
PieCtrlRegs.PIECTRL.bit.ENPIE = 1; // 致能PIE(非必要)
PieCtrlRegs.PIEIER1.bit.INTx1 = 0;
PieCtrlRegs.PIEIER1.bit.INTx4 = 1;
PieCtrlRegs.PIEIER1.bit.INTx5 = 1;
//PieCtrlRegs.PIEIER1.bit.INTx7 = 1; // !!!!!!!! 不能同時開啟 , 否則打架 !!!!!!!!!
XIntruptRegs.XINT1CR.bit.POLARITY = 3; // interrupt occur on both falling and rising edge
XIntruptRegs.XINT1CR.bit.ENABLE = 1; // Enable Xint1
XIntruptRegs.XINT2CR.bit.POLARITY = 3; // interrupt occur on both falling and rising edge
XIntruptRegs.XINT2CR.bit.ENABLE = 1; // Enable Xint2
EDIS;
LoopCount = 0;
ConversionCount = 0;
// Configure ADC
// Note: Channel ADCINA4 will be double sampled to workaround the ADC 1st sample issue for rev0 silicon errata
EALLOW;
AdcRegs.ADCCTL1.bit.ADCENABLE = 0; // 不致能ADC (在initadc中已經致能)
AdcRegs.ADCCTL1.bit.INTPULSEPOS = 1; //ADCINT1 trips after AdcResults latch
AdcRegs.INTSEL1N2.bit.INT1E = 0; //disabled ADCINT1
AdcRegs.INTSEL1N2.bit.INT1CONT = 0; //Disable ADCINT1 Continuous mode
AdcRegs.INTSEL1N2.bit.INT1SEL = 0; //setup EOC0 to trigger ADCINT1 to fire
AdcRegs.ADCSOC0CTL.bit.CHSEL = 1; //set SOC0 channel select to ADCINA1
AdcRegs.ADCSOC0CTL.bit.TRIGSEL = 1; //set SOC0 start trigger on CPUtimer
AdcRegs.ADCSOC0CTL.bit.ACQPS = 6;//set SOC0 S/H Window to 7 ADC Clock Cycles, (6 ACQPS plus 1)
//AdcRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;
EDIS;
//GpioCtrlRegs.AIOMUX1.bit. &= ~(0x08); // ADCINA1
//
EALLOW;
SysCtrlRegs.XCLK.bit.XCLKOUTDIV = 2;
EDIS;
for (;;) {
//volatile long double n;
//for (n = 0; n < 5000; n++)
// ;
//EALLOW;
//GpioDataRegs.GPATOGGLE.bit.GPIO6 = 1;
//EDIS;
if (GpioDataRegs.GPADAT.bit.GPIO1 == 1) {
Voltage1[array] = AdcResult.ADCRESULT0;
if (Voltage1[array] > 5000) {
EALLOW;
SysCtrlRegs.PCLKCR1.bit.EPWM1ENCLK = 0;
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
SysCtrlRegs.LPMCR0.bit.LPM = 3; // 全部休眠
EDIS;
EALLOW;
SysCtrlRegs.CLKCTL.bit.WDHALTI = 1; // 從休眠中開啟 , 全部重設!!
EDIS;
}
v1 = 3031;
v2 = (int)Voltage1[array];
k1 = 0.3; //0.0001;
k2 = 0.000055;
verr = v1 - v2;
vk2 = verr + z1;
z1 = verr;
vko2 =(int) vk2 * k2;
if (vko2 >= 1400)
{
vko2 = 1400;
}
else if (vko2 <= -1300) ///////////////////////
{
vko2 = -1300;
}
vou2 = vko2 + z2;
z2 = vou2;
vk1 = verr;
vko1 =(int) vk1 * k1;
vout =(int)( vou2 + vko1);
if (vout >= 1400) {
vout = 1400;
} else if (vout <= 0) {
vout = 0;
}
EALLOW;
EPwm1Regs.CMPA.half.CMPA = 1500 - vout; // Set compare A value
EDIS;
if (array < 255)
array++;
else
array = 0;
}
}
}
//
// Main
//
void main(void)
{
//
// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the F2837xS_SysCtrl.c file.
//
InitSysCtrl();
//
// Step 2. Initialize GPIO:
// This example function is found in the F2837xS_Gpio.c file and
// illustrates how to set the GPIO to its default state.
//
// InitGpio(); // Skipped for this example
//
// Only init the GPIO for EQep1 and EPwm1 in this case
// This function is found in F2837xS_EQep.c
//
InitEQep1Gpio();
InitEPwm1Gpio();
//
// Step 3. Clear all __interrupts and initialize PIE vector table:
// Disable CPU __interrupts
//
DINT;
//
// Initialize the PIE control registers to their default state.
// The default state is all PIE __interrupts disabled and flags
// are cleared.
// This function is found in the F2837xS_PieCtrl.c file.
//
InitPieCtrl();
//
// Disable CPU __interrupts and clear all CPU __interrupt flags:
//
IER = 0x0000;
IFR = 0x0000;
//
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the __interrupt
// is not used in this example. This is useful for debug purposes.
// The shell ISR routines are found in F2837xS_DefaultIsr.c.
// This function is found in F2837xS_PieVect.c.
//
InitPieVectTable();
//
// Interrupts that are used in this example are re-mapped to
// ISR functions found within this file.
//
EALLOW; // This is needed to write to EALLOW protected registers
PieVectTable.EPWM1_INT= &prdTick;
EDIS; // This is needed to disable write to EALLOW protected registers
//
// Step 4. Initialize all the Device Peripherals:
// Example specific ePWM setup. This function is found
// in Example_EPwmSetup.c
//
EPwmSetup();
//
// Step 5. User specific code, enable __interrupts:
// Enable CPU INT1 which is connected to CPU-Timer 0:
//
IER |= M_INT3;
//
// Enable TINT0 in the PIE: Group 3 __interrupt 1
//
PieCtrlRegs.PIEIER3.bit.INTx1 = 1;
//
// Enable global Interrupts and higher priority real-time debug events:
//
EINT; // Enable Global __interrupt INTM
ERTM; // Enable Global realtime __interrupt DBGM
//
// Initializes eQEP for frequency calculation in
// FREQCAL_Init(void)function in Example_EPwmSetup.c
//
freq.init(&freq);
for(;;)
{
}
}
void main(void)
{
// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the DSP2803x_SysCtrl.c file.
InitSysCtrl();
// Step 2. Initalize GPIO:
// This example function is found in the DSP2803x_Gpio.c file and
// illustrates how to set the GPIO to it's default state.
// InitGpio(); // Skipped for this example
// For this case just init GPIO pins for ePWM1, ePWM2, ePWM3
// These functions are in the DSP2803x_EPwm.c file
InitEPwm1Gpio();
InitEPwm2Gpio();
// Step 3. Clear all interrupts and initialize PIE vector table:
// Disable CPU interrupts
DINT;
// Initialize the PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags
// are cleared.
// This function is found in the DSP2803x_PieCtrl.c file.
InitPieCtrl();
// Disable CPU interrupts and clear all CPU interrupt flags:
IER = 0x0000;
IFR = 0x0000;
GpioCtrlRegs.GPAMUX1.bit.GPIO0 = 1; // GPIO0 = PWM1A
GpioCtrlRegs.GPAMUX1.bit.GPIO1 = 1; // GPIO1 = PWM1B
GpioCtrlRegs.GPAMUX1.bit.GPIO2 = 1; // GPIO2 = PWM2A
GpioCtrlRegs.GPAMUX1.bit.GPIO3 = 1; // GPIO3 = PWM2B
GpioCtrlRegs.GPADIR.bit.GPIO0 = 1; //GPIO0 = output
GpioCtrlRegs.GPADIR.bit.GPIO1 = 1; //GPIO0 = output
GpioCtrlRegs.GPADIR.bit.GPIO2 = 1; //GPIO0 = output
GpioCtrlRegs.GPADIR.bit.GPIO3 = 1; //GPIO0 = output
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example. This is useful for debug purposes.
// The shell ISR routines are found in DSP2803x_DefaultIsr.c.
// This function is found in DSP2803x_PieVect.c.
InitPieVectTable();
// Interrupts that are used in this example are re-mapped to
// ISR functions found within this file.
EALLOW; // This is needed to write to EALLOW protected registers
// PieVectTable.EPWM1_INT = &epwm1_isr;
// PieVectTable.EPWM2_INT = &epwm2_isr;
EDIS; // This is needed to disable write to EALLOW protected registers
// Step 4. Initialize all the Device Peripherals:
// This function is found in DSP2803x_InitPeripherals.c
// InitPeripherals(); // Not required for this example
// For this example, only initialize the ePWM
EALLOW;
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
EDIS;
InitEPwm1Example();
InitEPwm2Example();
EALLOW;
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;
EDIS;
// Step 5. User specific code, enable interrupts:
// Enable CPU INT3 which is connected to EPWM1-3 INT:
IER |= M_INT3;
// PieCtrlRegs.PIEIER3.bit.INTx1 = 1;
// PieCtrlRegs.PIEIER3.bit.INTx2 = 1;
EINT; // Enable Global interrupt INTM
ERTM; // Enable Global realtime interrupt DBGM
// Step 6. IDLE loop. Just sit and loop forever (optional):
for(;;)
{
asm(" NOP");
}
}
void main(void)
{
// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the DSP2803x_SysCtrl.c file.
InitSysCtrl();
// Step 2. Initialize GPIO:
// This example function is found in the DSP2803x_Gpio.c file and
// illustrates how to set the GPIO to it's default state.
// InitGpio(); // Skipped for this example
// For this case only init GPIO for eQEP1 and ePWM1
// This function is found in DSP2803x_EQep.c
InitEQep1Gpio();
InitEPwm1Gpio();
EALLOW;
GpioCtrlRegs.GPADIR.bit.GPIO4 = 1; // GPIO4 as output simulates Index signal
GpioDataRegs.GPACLEAR.bit.GPIO4 = 1; // Normally low
EDIS;
// Step 3. Clear all interrupts and initialize PIE vector table:
// Disable CPU interrupts
DINT;
// Initialize the PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags
// are cleared.
// This function is found in the DSP2803x_PieCtrl.c file.
InitPieCtrl();
// Disable CPU interrupts and clear all CPU interrupt flags:
IER = 0x0000;
IFR = 0x0000;
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example. This is useful for debug purposes.
// The shell ISR routines are found in DSP2803x_DefaultIsr.c.
// This function is found in DSP2803x_PieVect.c.
InitPieVectTable();
// Interrupts that are used in this example are re-mapped to
// ISR functions found within this file.
EALLOW; // This is needed to write to EALLOW protected registers
PieVectTable.EPWM1_INT= &prdTick;
EDIS; // This is needed to disable write to EALLOW protected registers
// Step 4. Initialize all the Device Peripherals:
initEpwm(); // This function exists in Example_EPwmSetup.c
// Step 5. User specific code, enable interrupts:
// Enable CPU INT1 which is connected to CPU-Timer 0:
IER |= M_INT3;
// Enable TINT0 in the PIE: Group 3 interrupt 1
PieCtrlRegs.PIEIER3.bit.INTx1 = 1;
// Enable global Interrupts and higher priority real-time debug events:
EINT; // Enable Global interrupt INTM
ERTM; // Enable Global realtime interrupt DBGM
qep_posspeed.init(&qep_posspeed);
for(;;)
{
}
}
void InitEPwmGpio(void)
{
InitEPwm1Gpio();
}
void main(void)
{
// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the DSP2803x_SysCtrl.c file.
InitSysCtrl();
// Step 2. Initialize GPIO:
// This example function is found in the DSP2803x_Gpio.c file and
// illustrates how to set the GPIO to it's default state.
// InitGpio(); // Skipped for this example
// For this case just init GPIO pins for ePWM1, ePWM2, and TZ pins
InitEPwm1Gpio();
InitEPwm2Gpio();
InitEPwm3Gpio();
InitTzGpio();
// Step 3. Clear all interrupts and initialize PIE vector table:
// Disable CPU interrupts
DINT;
// Initialize the PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags
// are cleared.
// This function is found in the DSP2803x_PieCtrl.c file.
InitPieCtrl();
// Disable CPU interrupts and clear all CPU interrupt flags:
IER = 0x0000;
IFR = 0x0000;
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example. This is useful for debug purposes.
// The shell ISR routines are found in DSP2803x_DefaultIsr.c.
// This function is found in DSP2803x_PieVect.c.
InitPieVectTable();
// Interrupts that are used in this example are re-mapped to
// ISR functions found within this file.
EALLOW; // This is needed to write to EALLOW protected registers
PieVectTable.EPWM1_TZINT = &epwm1_tzint_isr;
PieVectTable.EPWM2_TZINT = &epwm2_tzint_isr;
PieVectTable.EPWM3_TZINT = &epwm3_tzint_isr;
EDIS; // This is needed to disable write to EALLOW protected registers
// Step 4. Initialize all the Device Peripherals:
// Not required for this example
EALLOW;
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
EDIS;
InitEPwm1Example();
InitEPwm2Example();
InitEPwm3Example();
EALLOW;
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;
EDIS;
// Step 5. User specific code, enable interrupts
// Initialize counters:
EPwm1TZIntCount = 0;
EPwm2TZIntCount = 0;
EPwm3TZIntCount = 0;
// Enable CPU INT3 which is connected to EPWM1-3 INT:
IER |= M_INT2;
// Enable EPWM INTn in the PIE: Group 2 interrupt 1-3
PieCtrlRegs.PIEIER2.bit.INTx1 = 1;
PieCtrlRegs.PIEIER2.bit.INTx2 = 1;
PieCtrlRegs.PIEIER2.bit.INTx3 = 1;
// Enable global Interrupts and higher priority real-time debug events:
EINT; // Enable Global interrupt INTM
ERTM; // Enable Global realtime interrupt DBGM
// Step 6. IDLE loop. Just sit and loop forever (optional):
for(;;)
{
__asm(" NOP");
}
}
static void init_peripherals_drivers(void)
{
uint16_t i;
/// Initialization of HRADC boards
stop_DMA();
decimation_factor = (uint16_t) roundf(HRADC_FREQ_SAMP / ISR_CONTROL_FREQ);
decimation_coeff = 1.0 / (float) decimation_factor;
HRADCs_Info.enable_Sampling = 0;
HRADCs_Info.n_HRADC_boards = NUM_HRADC_BOARDS;
Init_DMA_McBSP_nBuffers(NUM_HRADC_BOARDS, decimation_factor, HRADC_SPI_CLK);
Init_SPIMaster_McBSP(HRADC_SPI_CLK);
Init_SPIMaster_Gpio();
InitMcbspa20bit();
DELAY_US(500000);
send_ipc_lowpriority_msg(0,Enable_HRADC_Boards);
DELAY_US(2000000);
for(i = 0; i < NUM_HRADC_BOARDS; i++)
{
Init_HRADC_Info(&HRADCs_Info.HRADC_boards[i], i, decimation_factor,
buffers_HRADC[i], TRANSDUCER_GAIN[i]);
Config_HRADC_board(&HRADCs_Info.HRADC_boards[i], TRANSDUCER_OUTPUT_TYPE[i],
HRADC_HEATER_ENABLE[i], HRADC_MONITOR_ENABLE[i]);
}
Config_HRADC_SoC(HRADC_FREQ_SAMP);
/**
*
* Initialization of PWM modules. PWM signals are mapped as the following:
*
* ePWM => Signal POF transmitter
* channel Name on BCB
*
* ePWM1A => Q1_MOD_1 PWM1
* ePWM1B => Q1_MOD_5 PWM2
* ePWM2A => Q2_MOD_1 PWM3
* ePWM2B => Q2_MOD_5 PWM4
* ePWM3A => Q1_MOD_2 PWM5
* ePWM3B => Q1_MOD_6 PWM6
* ePWM4A => Q2_MOD_2 PWM7
* ePWM4B => Q2_MOD_6 PWM8
* ePWM5A => Q1_MOD_3 PWM9
* ePWM5B => Q1_MOD_7 PWM10
* ePWM6A => Q2_MOD_3 PWM11
* ePWM6B => Q2_MOD_7 PWM12
* ePWM7A => Q1_MOD_4 PWM13
* ePWM7B => Q1_MOD_8 PWM14
* ePWM8A => Q2_MOD_4 PWM15
* ePWM8B => Q2_MOD_8 PWM16
*
*/
g_pwm_modules.num_modules = 8;
PWM_MODULATOR_Q1_MOD_1_5 = &EPwm1Regs;
PWM_MODULATOR_Q2_MOD_1_5 = &EPwm2Regs;
PWM_MODULATOR_Q1_MOD_2_6 = &EPwm3Regs;
PWM_MODULATOR_Q2_MOD_2_6 = &EPwm4Regs;
PWM_MODULATOR_Q1_MOD_3_7 = &EPwm5Regs;
PWM_MODULATOR_Q2_MOD_3_7 = &EPwm6Regs;
PWM_MODULATOR_Q1_MOD_4_8 = &EPwm7Regs;
PWM_MODULATOR_Q2_MOD_4_8 = &EPwm8Regs;
disable_pwm_outputs();
disable_pwm_tbclk();
init_pwm_mep_sfo();
init_pwm_module(PWM_MODULATOR_Q1_MOD_1_5, PWM_FREQ, 0, PWM_Sync_Master, 0,
PWM_ChB_Independent, PWM_DEAD_TIME);
init_pwm_module(PWM_MODULATOR_Q2_MOD_1_5, PWM_FREQ, 1, PWM_Sync_Slave, 180,
PWM_ChB_Independent, PWM_DEAD_TIME);
cfg_pwm_module_h_brigde_q2(PWM_MODULATOR_Q2_MOD_1_5);
init_pwm_module(PWM_MODULATOR_Q1_MOD_2_6, PWM_FREQ, 0, PWM_Sync_Slave, 45,
PWM_ChB_Independent, PWM_DEAD_TIME);
init_pwm_module(PWM_MODULATOR_Q2_MOD_2_6, PWM_FREQ, 3, PWM_Sync_Slave, 225,
PWM_ChB_Independent, PWM_DEAD_TIME);
cfg_pwm_module_h_brigde_q2(PWM_MODULATOR_Q2_MOD_2_6);
init_pwm_module(PWM_MODULATOR_Q1_MOD_3_7, PWM_FREQ, 0, PWM_Sync_Slave, 90,
PWM_ChB_Independent, PWM_DEAD_TIME);
init_pwm_module(PWM_MODULATOR_Q2_MOD_3_7, PWM_FREQ, 5, PWM_Sync_Slave, 270,
PWM_ChB_Independent, PWM_DEAD_TIME);
cfg_pwm_module_h_brigde_q2(PWM_MODULATOR_Q2_MOD_3_7);
init_pwm_module(PWM_MODULATOR_Q1_MOD_4_8, PWM_FREQ, 0, PWM_Sync_Slave, 135,
PWM_ChB_Independent, PWM_DEAD_TIME);
init_pwm_module(PWM_MODULATOR_Q2_MOD_4_8, PWM_FREQ, 7, PWM_Sync_Slave, 315,
PWM_ChB_Independent, PWM_DEAD_TIME);
cfg_pwm_module_h_brigde_q2(PWM_MODULATOR_Q2_MOD_4_8);
InitEPwm1Gpio();
InitEPwm2Gpio();
InitEPwm3Gpio();
InitEPwm4Gpio();
InitEPwm5Gpio();
InitEPwm6Gpio();
InitEPwm7Gpio();
InitEPwm8Gpio();
/// Initialization of timers
InitCpuTimers();
ConfigCpuTimer(&CpuTimer0, C28_FREQ_MHZ, 1000000);
CpuTimer0Regs.TCR.bit.TIE = 0;
}