/*
* Description: Function to overwrite the Branch instruction at the end of ARM code so that
* it points to FUNC_GEN_BRANCH_UNKNOWN
*
* Parameters: const code_seg_t* codeSegment The segment to invalidate the branch on
*
*/
void invalidateBranch(const code_seg_t* codeSegment)
{
if (NULL != codeSegment->ARMEntryPoint
&& codeSegment->MIPScode != NULL
&& codeSegment->MIPScodeLen > 0U)
{
uint32_t* const out = (uint32_t*)codeSegment->ARMcode + codeSegment->ARMcodeLen -1U;
const size_t targetAddress = *((size_t*)(MMAP_FP_BASE + FUNC_GEN_BRANCH_UNKNOWN));
Instruction_t* ins = newEmptyInstr();
#if SHOW_CALLER
printf("invalidateBranch(0x%08x) at 0x%08x\n", (uint32_t)codeSegment, (uint32_t)out);
#endif
#if SHOW_BRANCHUNKNOWN_STEPS
printf_arm((uint32_t)out, *out);
#endif
//Get MIPS condition code for branch
mips_decode(*(codeSegment->MIPScode + codeSegment->MIPScodeLen -1), ins);
#if SHOW_BRANCHUNKNOWN_STEPS
printf_Intermediate(ins, 1);
#endif
//Set instruction to ARM_BRANCH for new target
InstrB(ins, ins->cond, targetAddress, 1);
//emit the arm code
*out = arm_encode(ins, (size_t)out);
InstrFree(NULL, ins);
}
}
void ProcTranslate(Var * proc)
/*
Purpose:
Translate generic instructions to instructions directly translatable to processor instructions.
*/
{
Instr * i, * first_i, * next_i;
InstrBlock * blk;
UInt8 step = 0;
Bool in_assert;
UInt8 color;
Loc loc;
loc.proc = proc;
VERBOSE_NOW = false;
if (Verbose(proc)) {
VERBOSE_NOW = true;
PrintHeader(2, VarName(proc));
}
// As first step, we translate all variables stored on register addresses to actual registers
for(blk = proc->instr; blk != NULL; blk = blk->next) {
for(i = blk->first; i != NULL; i = i->next) {
if (i->op == INSTR_LINE) continue;
i->result = VarReg(i->result);
i->arg1 = VarReg(i->arg1);
i->arg2 = VarReg(i->arg2);
}
}
// We perform as many translation steps as necessary
// Some translation rules may use other translation rules, so more than one step may be necessary.
// Translation ends either when there has not been any modification in last step or after
// defined number of steps (to prevent infinite loop in case of invalid set of translation rules).
in_assert = false;
for(blk = proc->instr; blk != NULL; blk = blk->next) {
if (Verbose(proc)) {
PrintBlockHeader(blk);
}
loc.blk = blk;
loc.n = 1;
// The translation is done by using procedures for code generating.
// We detach the instruction list from block and set the block as destination for instruction generator.
// In this moment, the code generating stack must be empty anyways.
first_i = blk->first;
blk->first = blk->last = NULL;
GenSetDestination(blk, NULL);
i = first_i;
while(i != NULL) {
loc.i = i;
if (ASSERTS_OFF) {
if (i->op == INSTR_ASSERT_BEGIN) {
in_assert = true;
goto next;
} else if (i->op == INSTR_ASSERT_END) {
in_assert = false;
goto next;
} else {
if (in_assert) goto next;
}
}
if (VERBOSE_NOW) {
color = PrintColor(RED+BLUE);
PrintInstrLine(loc.n);
InstrPrint(i);
PrintColor(color);
}
if (!InstrTranslate3(i->op, i->result, i->arg1, i->arg2, GENERATE)) {
InternalErrorLoc("Unsupported instruction", &loc);
InstrPrint(i);
}
next:
next_i = i->next;
// InstrFree(i);
i = next_i;
loc.n++;
}
// Free the instructions
i = first_i;
while (i!=NULL) {
next_i = i->next;
InstrFree(i);
i = next_i;
}
} // block
}
