// AMD reports maxCpuidIdFunction > 4 but consider functions 2..4 to be // "reserved". cache characteristics are returned via ext. functions. static void DetectCacheAndTLB() { x86_x64::CpuidRegs regs = { 0 }; regs.eax = 0x80000005; if(x86_x64::cpuid(®s)) { AddCache(L1Cache(regs.ecx, x86_x64::Cache::kData)); AddCache(L1Cache(regs.edx, x86_x64::Cache::kInstruction)); AddTLB(TLB1(regs.eax, 0, 2*MiB, x86_x64::Cache::kInstruction)); AddTLB(TLB1(regs.eax, 16, 2*MiB, x86_x64::Cache::kData)); AddTLB(TLB1(regs.ebx, 0, 4*KiB, x86_x64::Cache::kInstruction)); AddTLB(TLB1(regs.ebx, 16, 4*KiB, x86_x64::Cache::kData)); } regs.eax = 0x80000006; if(x86_x64::cpuid(®s)) { AddCache(L2Cache(regs.ecx, x86_x64::Cache::kUnified)); AddCache(L3Cache(regs.edx, x86_x64::Cache::kUnified)); AddTLB2Pair(regs.eax, 2*MiB); AddTLB2Pair(regs.ebx, 4*KiB); } }
//brief: Intializes all globals if they have not already been initialized static void Initialize(){ if(!initialized){ initialized=true; updateDV(); L1P=L1D=L1Cache(); L2U =L2Cache(); } }