void dma_init(void)
{
if (enabled) return;
#if defined DMA_PRESENT
CMU_ClockEnable(cmuClock_DMA, true);
CMU_ClockEnable(cmuClock_HFPER, true); // FIXME: DMA is clocked via HFCORECLK, why HFPERCLK?
DMA_Init_TypeDef dmaInit;
dmaInit.hprot = 0;
dmaInit.controlBlock = dmaControlBlock;
DMA_Init(&dmaInit);
#elif defined LDMA_PRESENT
CMU_ClockEnable(cmuClock_LDMA, true);
LDMA_Init_t ldmaInit;
ldmaInit.ldmaInitCtrlNumFixed = 0; /* All channels round-robin */
ldmaInit.ldmaInitCtrlSyncPrsClrEn = 0; /* Do not allow PRS to clear SYNCTRIG */
ldmaInit.ldmaInitCtrlSyncPrsSetEn = 0; /* Do not allow PRS to set SYNCTRIG */
ldmaInit.ldmaInitIrqPriority = 2; /* IRQ Priority */
LDMA_Init(&ldmaInit);
#else
#error "Unrecognized DMA peripheral"
#endif
enabled = true;
}
/***************************************************************************//**
* @brief
* Initialize DMADRV.
*
* @details
* The DMA hw is initialized.
*
* @return
* @ref ECODE_EMDRV_DMADRV_OK on success. On failure an appropriate
* DMADRV @ref Ecode_t is returned.
******************************************************************************/
Ecode_t DMADRV_Init( void )
{
int i;
#if defined( EMDRV_DMADRV_UDMA )
DMA_Init_TypeDef dmaInit;
#elif defined( EMDRV_DMADRV_LDMA )
LDMA_Init_t dmaInit = LDMA_INIT_DEFAULT;
dmaInit.ldmaInitCtrlNumFixed = EMDRV_DMADRV_DMA_CH_PRIORITY;
#endif
INT_Disable();
if ( initialized )
{
INT_Enable();
return ECODE_EMDRV_DMADRV_ALREADY_INITIALIZED;
}
initialized = true;
INT_Enable();
if ( EMDRV_DMADRV_DMA_IRQ_PRIORITY > 7 )
{
return ECODE_EMDRV_DMADRV_PARAM_ERROR;
}
for ( i=0; i < EMDRV_DMADRV_DMA_CH_COUNT; i++ )
{
chTable[ i ].allocated = false;
}
#if defined( EMDRV_DMADRV_UDMA )
NVIC_SetPriority( DMA_IRQn, EMDRV_DMADRV_DMA_IRQ_PRIORITY );
dmaInit.hprot = 0;
dmaInit.controlBlock = dmaControlBlock;
DMA_Init( &dmaInit );
#elif defined( EMDRV_DMADRV_LDMA )
dmaInit.ldmaInitIrqPriority = EMDRV_DMADRV_DMA_IRQ_PRIORITY;
LDMA_Init( &dmaInit );
#endif
return ECODE_EMDRV_DMADRV_OK;
}
