/** * @brief Handles SPI for the motor set command. */ static void spis_cmd_motorset (void) { int16_t mota, motb; uint8_t c = SPDR; /* Still processing input. */ if (spis_pos < 4) { /* Fill buffer. */ spis_buf[ spis_pos++ ] = c; /* Echo recieved. */ SPDR = c; /* Update CRC. */ spis_crc = _crc_ibutton_update( spis_crc, c ); } /* Handle command. */ else { /* Check CRC. */ if (c != spis_crc) { SPIS_CMD_RESET(); LED0_ON(); return; } /* Prepare arguments. */ mota = (spis_buf[0]<<8) + spis_buf[1]; motb = (spis_buf[2]<<8) + spis_buf[3]; /* Set motor. */ motor_set( mota, motb ); /* Clear command. */ SPIS_CMD_RESET(); LED0_OFF(); } }
/** * @brief Handles SPI for the mode set command. */ static void spis_cmd_modeset (void) { uint8_t c = SPDR; if (spis_pos < 1) { /* Fill buffer. */ spis_buf[ spis_pos++ ] = c; /* Echo recieved. */ SPDR = c; /* Update CRC. */ spis_crc = _crc_ibutton_update( spis_crc, c ); } else { /* Check CRC. */ if (c != spis_crc) { SPIS_CMD_RESET(); LED0_ON(); return; } /* Set mode. */ motor_mode( spis_buf[0] ); /* Clear command. */ SPIS_CMD_RESET(); LED0_OFF(); } }
/** * @brief Handles SPI for the current command. */ static void spis_cmd_current (void) { if (spis_pos < 4) { SPDR = spis_buf[ spis_pos ]; spis_pos++; } else { SPDR = spis_crc; /* Clear command. */ SPIS_CMD_RESET(); LED0_OFF(); } }
int board_early_init_f(void) { unsigned long sdrreg; /* TBS: Setup the GPIO access for the user LEDs */ mfsdr(sdr_pfc0, sdrreg); mtsdr(sdr_pfc0, (sdrreg & ~0x00000100) | 0x00000E00); out32(CFG_GPIO_BASE + 0x018, (USR_LED0 | USR_LED1 | USR_LED2 | USR_LED3)); LED0_OFF(); LED1_OFF(); LED2_OFF(); LED3_OFF(); /*-------------------------------------------------------------------- * Setup the external bus controller/chip selects *-------------------------------------------------------------------*/ /* set the bus controller */ mtebc (pb0ap, 0x04055200); /* FLASH/SRAM */ mtebc (pb0cr, 0xfff18000); /* BAS=0xfff 1MB R/W 8-bit */ mtebc (pb1ap, 0x04055200); /* FLASH/SRAM */ mtebc (pb1cr, 0xfe098000); /* BAS=0xff8 16MB R/W 8-bit */ /*-------------------------------------------------------------------- * Setup the interrupt controller polarities, triggers, etc. *-------------------------------------------------------------------*/ mtdcr (uic0sr, 0xffffffff); /* clear all */ mtdcr (uic0er, 0x00000000); /* disable all */ mtdcr (uic0cr, 0x00000003); /* SMI & UIC1 crit are critical */ mtdcr (uic0pr, 0xfffffe00); /* per ref-board manual */ mtdcr (uic0tr, 0x01c00000); /* per ref-board manual */ mtdcr (uic0vr, 0x00000001); /* int31 highest, base=0x000 */ mtdcr (uic0sr, 0xffffffff); /* clear all */ mtdcr (uic1sr, 0xffffffff); /* clear all */ mtdcr (uic1er, 0x00000000); /* disable all */ mtdcr (uic1cr, 0x00000000); /* all non-critical */ mtdcr (uic1pr, 0xffffc0ff); /* per ref-board manual */ mtdcr (uic1tr, 0x00ff8000); /* per ref-board manual */ mtdcr (uic1vr, 0x00000001); /* int31 highest, base=0x000 */ mtdcr (uic1sr, 0xffffffff); /* clear all */ mtdcr (uic2sr, 0xffffffff); /* clear all */ mtdcr (uic2er, 0x00000000); /* disable all */ mtdcr (uic2cr, 0x00000000); /* all non-critical */ mtdcr (uic2pr, 0xffffffff); /* per ref-board manual */ mtdcr (uic2tr, 0x00ff8c0f); /* per ref-board manual */ mtdcr (uic2vr, 0x00000001); /* int31 highest, base=0x000 */ mtdcr (uic2sr, 0xffffffff); /* clear all */ mtdcr (uicb0sr, 0xfc000000); /* clear all */ mtdcr (uicb0er, 0x00000000); /* disable all */ mtdcr (uicb0cr, 0x00000000); /* all non-critical */ mtdcr (uicb0pr, 0xfc000000); /* */ mtdcr (uicb0tr, 0x00000000); /* */ mtdcr (uicb0vr, 0x00000001); /* */ LED0_ON(); return 0; }
void main(void) { uchar i; rxtxrx_state=0; SET_SDN(1); DDRD|=(1<<4)|(1<<5); PORTC=(1<<1)|(1<<2); DDRC=(1<<0)|(1<<1); usbDeviceDisconnect(); /* enforce re-enumeration, do this while interrupts are disabled! */ usbInit(); init_usart(); i = 0; SET_SDN(0); while(--i){ /* fake USB disconnect for > 250 ms */ _delay_ms(1); } init_spi(); si4432_swreset(); #if HW_VER == 0 si4432_setupgpio(si_gpio0txstate,si_gpio1rxstate,si_gpio2rxdat,0x58); #endif #if HW_VER == 1 si4432_setupgpio(si_gpio0txstate,si_gpio1txstate,si_gpio2rxstate,0x58); #endif set_modem_conf(5); si4432_tune_base(433000000); si4432_hop(1,180); REGW(si_headcon1,0); REGW(si_headcon2,si_fixpklen|si_syncword3210); // REGW(si_headcon2,0); REGW(si_prealenl,16); REGW(si_sync3,0x0f); REGW(si_sync2,0x34); REGW(si_sync1,0x21); REGW(si_sync0,0xff); REGW(si_data_access_contorl,si_enpacrx|si_enpactx|si_encrc|si_crc16); //start_responder(); set_sleep_mode(SLEEP_MODE_IDLE); usbDeviceConnect(); sei(); DDRD&=~(1<<4); for(;;){ /* main event loop */ if((rxtxrx_state&0x7f)<=0) { sleep_enable(); sleep_cpu(); sleep_disable(); } LED0_ON(); usbPoll(); if(iwp!=irp) if(UCSRA&(1<<UDRE)) { UDR=intbuf[irp++]; } /* if(usbInterruptIsReady()) { if(iwp!=irp) usbSetInterrupt(&intbuf[irp++],1); }*/ LED0_OFF(); radioPoll(); if(resp) { uint8_t tmp; rx1buf_p=0; do{ TIMSK&=~(1<<TICIE1); REGR(si_status,tmp); TIMSK|=(1<<TICIE1); if(tmp&si_rxffem) break; TIMSK&=~(1<<TICIE1); REGR(si_fifo,rx1buf[rx1buf_p++]); TIMSK|=(1<<TICIE1); }while(1); if(rx1buf[rx1buf_p-1]>0) { TIMSK&=~(1<<TICIE1); REGW(si_mode02,si_ffclrtx); REGW(si_mode02,0); REGW(si_fifo,rx1buf[rx1buf_p-1]); REGW(si_fifo,0); REGW(si_txpower,0x18|(rx1buf[rx1buf_p-1]&0x07)); TIMSK|=(1<<TICIE1); } } /* if(resp==2) { uint8_t tmp,int1,int2; REGR(si_ezmac_stat,tmp); if(tmp&si_pksent) { REGW(si_mode02,si_ffclrrx|si_ffclrtx); REGW(si_mode02,0); REGR(si_interrupt1,int1); REGR(si_interrupt2,int2); REGW(si_fifo,0); REGW(si_fifo,0); REGW(si_mode01,si_rxon|si_pllon|si_xton); resp=1; } }*/ }; }
int board_early_init_f(void) { unsigned long sdrreg; /* * Enable GPIO for pins 18 - 24 * 18 = SEEPROM_WP * 19 = #M_RST * 20 = #MONARCH * 21 = #LED_ALARM * 22 = #LED_ACT * 23 = #LED_STATUS1 * 24 = #LED_STATUS2 */ mfsdr(SDR0_PFC0, sdrreg); mtsdr(SDR0_PFC0, (sdrreg & ~SDR0_PFC0_TRE_ENABLE) | 0x00003e00); out32(CONFIG_SYS_GPIO_BASE + 0x018, (USR_LED0 | USR_LED1 | USR_LED2 | USR_LED3)); LED0_OFF(); LED1_OFF(); LED2_OFF(); LED3_OFF(); /* Setup the external bus controller/chip selects */ mtebc(PB0AP, 0x04055200); /* 16MB Strata FLASH */ mtebc(PB0CR, 0xff098000); /* BAS=0xff0 16MB R/W 8-bit */ mtebc(PB1AP, 0x04055200); /* 512KB Socketed AMD FLASH */ mtebc(PB1CR, 0xfe018000); /* BAS=0xfe0 1MB R/W 8-bit */ mtebc(PB6AP, 0x05006400); /* 32-64MB AMD MirrorBit FLASH */ mtebc(PB6CR, 0xf00da000); /* BAS=0xf00 64MB R/W i6-bit */ mtebc(PB7AP, 0x05006400); /* 32-64MB AMD MirrorBit FLASH */ mtebc(PB7CR, 0xf40da000); /* BAS=0xf40 64MB R/W 16-bit */ /* * Setup the interrupt controller polarities, triggers, etc. * * Because of the interrupt handling rework to handle 440GX interrupts * with the common code, we needed to change names of the UIC registers. * Here the new relationship: * * U-Boot name 440GX name * ----------------------- * UIC0 UICB0 * UIC1 UIC0 * UIC2 UIC1 * UIC3 UIC2 */ mtdcr(UIC1SR, 0xffffffff); /* clear all */ mtdcr(UIC1ER, 0x00000000); /* disable all */ mtdcr(UIC1CR, 0x00000003); /* SMI & UIC1 crit are critical */ mtdcr(UIC1PR, 0xfffffe00); /* per ref-board manual */ mtdcr(UIC1TR, 0x01c00000); /* per ref-board manual */ mtdcr(UIC1VR, 0x00000001); /* int31 highest, base=0x000 */ mtdcr(UIC1SR, 0xffffffff); /* clear all */ mtdcr(UIC2SR, 0xffffffff); /* clear all */ mtdcr(UIC2ER, 0x00000000); /* disable all */ mtdcr(UIC2CR, 0x00000000); /* all non-critical */ mtdcr(UIC2PR, 0xffffc0ff); /* per ref-board manual */ mtdcr(UIC2TR, 0x00ff8000); /* per ref-board manual */ mtdcr(UIC2VR, 0x00000001); /* int31 highest, base=0x000 */ mtdcr(UIC2SR, 0xffffffff); /* clear all */ mtdcr(UIC3SR, 0xffffffff); /* clear all */ mtdcr(UIC3ER, 0x00000000); /* disable all */ mtdcr(UIC3CR, 0x00000000); /* all non-critical */ mtdcr(UIC3PR, 0xffffffff); /* per ref-board manual */ mtdcr(UIC3TR, 0x00ff8c0f); /* per ref-board manual */ mtdcr(UIC3VR, 0x00000001); /* int31 highest, base=0x000 */ mtdcr(UIC3SR, 0xffffffff); /* clear all */ mtdcr(UIC0SR, 0xfc000000); /* clear all */ mtdcr(UIC0ER, 0x00000000); /* disable all */ mtdcr(UIC0CR, 0x00000000); /* all non-critical */ mtdcr(UIC0PR, 0xfc000000); /* */ mtdcr(UIC0TR, 0x00000000); /* */ mtdcr(UIC0VR, 0x00000001); /* */ LED0_ON(); return 0; }
/** * @brief Handles SPI for the version command. */ static void spis_cmd_version (void) { SPDR = DHB_VERSION; SPIS_CMD_RESET(); LED0_OFF(); }