/*FUNCTION**********************************************************************
*
* Function Name : LPSCI_DRV_Init
* Description : This function initializes a LPSCI instance for operation.
* This function will initialize the run-time state structure to keep track of
* the on-going transfers, ungate the clock to the LPSCI module, initialize the
* module to user defined settings and default settings, configure the IRQ state
* structure and enable the module-level interrupt to the core, and enable the
* LPSCI module transmitter and receiver.
* The following is an example of how to set up the lpsci_state_t and the
* lpsci_user_config_t parameters and how to call the LPSCI_DRV_Init function
* by passing in these parameters:
* lpsci_user_config_t lpsciConfig;
* lpsciConfig.clockSource = kClockLpsciSrcPllFllSel;
* lpsciConfig.baudRate = 9600;
* lpsciConfig.bitCountPerChar = kLpsci8BitsPerChar;
* lpsciConfig.parityMode = kLpsciParityDisabled;
* lpsciConfig.stopBitCount = kLpsciOneStopBit;
* lpsci_state_t lpsciState;
* LPSCI_DRV_Init(instance, &lpsciState, &lpsciConfig);
*
*END**************************************************************************/
lpsci_status_t LPSCI_DRV_Init(uint32_t instance,
lpsci_state_t * lpsciStatePtr,
const lpsci_user_config_t * lpsciUserConfig)
{
assert(lpsciStatePtr && lpsciUserConfig);
assert(instance < HW_UART0_INSTANCE_COUNT);
uint32_t baseAddr = g_lpsciBaseAddr[instance];
uint32_t lpsciSourceClock;
/* Exit if current instance is already initialized. */
if (g_lpsciStatePtr[instance])
{
return kStatus_LPSCI_Initialized;
}
/* Clear the state structure for this instance. */
memset(lpsciStatePtr, 0, sizeof(lpsci_state_t));
/* Save runtime structure pointer.*/
g_lpsciStatePtr[instance] = lpsciStatePtr;
/* Un-gate LPSCI module clock */
CLOCK_SYS_EnableLpsciClock(instance);
/* Set LPSCI clock source */
CLOCK_SYS_SetLpsciSrc(instance, lpsciUserConfig->clockSource);
/* Initialize LPSCI to a known state. */
LPSCI_HAL_Init(baseAddr);
/* Create Semaphore for txIrq and rxIrq. */
OSA_SemaCreate(&lpsciStatePtr->txIrqSync, 0);
OSA_SemaCreate(&lpsciStatePtr->rxIrqSync, 0);
lpsciSourceClock = CLOCK_SYS_GetLpsciFreq(instance);
/* Initialize LPSCI baud rate, bit count, parity and stop bit. */
LPSCI_HAL_SetBaudRate(baseAddr, lpsciSourceClock, lpsciUserConfig->baudRate);
LPSCI_HAL_SetBitCountPerChar(baseAddr, lpsciUserConfig->bitCountPerChar);
LPSCI_HAL_SetParityMode(baseAddr, lpsciUserConfig->parityMode);
#if FSL_FEATURE_LPSCI_HAS_STOP_BIT_CONFIG_SUPPORT
LPSCI_HAL_SetStopBitCount(baseAddr, lpsciUserConfig->stopBitCount);
#endif
/* Enable LPSCI interrupt on NVIC level. */
INT_SYS_EnableIRQ(g_lpsciRxTxIrqId[instance]);
/* Finally, enable the LPSCI transmitter and receiver*/
LPSCI_HAL_EnableTransmitter(baseAddr);
LPSCI_HAL_EnableReceiver(baseAddr);
return kStatus_LPSCI_Success;
}
/*FUNCTION**********************************************************************
*
* Function Name : LPSCI_DRV_DmaInit
* Description : This function initializes a LPSCI instance for operation.
* This function will initialize the run-time state structure to keep track of
* the on-going transfers, ungate the clock to the LPSCI module, initialize the
* module to user defined settings and default settings, configure LPSCI DMA
* and enable the LPSCI module transmitter and receiver.
* The following is an example of how to set up the lpsci_dma_state_t and the
* lpsci_user_config_t parameters and how to call the LPSCI_DRV_DmaInit function
* by passing in these parameters:
* lpsci_user_config_t lpsciConfig;
* lpsciConfig.baudRate = 9600;
* lpsciConfig.bitCountPerChar = kLpsci8BitsPerChar;
* lpsciConfig.parityMode = kLpsciParityDisabled;
* lpsciConfig.stopBitCount = kLpsciOneStopBit;
* lpsci_dma_state_t lpsciDmaState;
* LPSCI_DRV_DmaInit(instance, &lpsciDmaState, &lpsciConfig);
*
*END**************************************************************************/
lpsci_status_t LPSCI_DRV_DmaInit(uint32_t instance,
lpsci_dma_state_t * lpsciDmaStatePtr,
const lpsci_dma_user_config_t * lpsciUserConfig)
{
assert(lpsciDmaStatePtr && lpsciUserConfig);
assert(instance < UART0_INSTANCE_COUNT);
UART0_Type * base = g_lpsciBase[instance];
uint32_t lpsciSourceClock = 0;
dma_request_source_t lpsciTxDmaRequest = kDmaRequestMux0Disable;
dma_request_source_t lpsciRxDmaRequest = kDmaRequestMux0Disable;
dma_channel_t *chn;
DMA_Type * dmaBase;
dma_channel_link_config_t config;
config.channel1 = 0;
config.channel2 = 0;
config.linkType = kDmaChannelLinkDisable;
/* Exit if current instance is already initialized. */
if (g_lpsciStatePtr[instance])
{
return kStatus_LPSCI_Initialized;
}
/* Clear the state structure for this instance. */
memset(lpsciDmaStatePtr, 0, sizeof(lpsci_dma_state_t));
/* Save runtime structure pointer.*/
g_lpsciStatePtr[instance] = lpsciDmaStatePtr;
/* Un-gate LPSCI module clock */
CLOCK_SYS_EnableLpsciClock(instance);
/* Set LPSCI clock source */
CLOCK_SYS_SetLpsciSrc(instance, lpsciUserConfig->clockSource);
/* Initialize LPSCI to a known state. */
LPSCI_HAL_Init(base);
/* Create Semaphore for txIrq and rxIrq. */
OSA_SemaCreate(&lpsciDmaStatePtr->txIrqSync, 0);
OSA_SemaCreate(&lpsciDmaStatePtr->rxIrqSync, 0);
/* LPSCI clock source is either system or bus clock depending on instance */
lpsciSourceClock = CLOCK_SYS_GetLpsciFreq(instance);
/* Initialize LPSCI baud rate, bit count, parity and stop bit. */
LPSCI_HAL_SetBaudRate(base, lpsciSourceClock, lpsciUserConfig->baudRate);
LPSCI_HAL_SetBitCountPerChar(base, lpsciUserConfig->bitCountPerChar);
LPSCI_HAL_SetParityMode(base, lpsciUserConfig->parityMode);
#if FSL_FEATURE_LPSCI_HAS_STOP_BIT_CONFIG_SUPPORT
LPSCI_HAL_SetStopBitCount(base, lpsciUserConfig->stopBitCount);
#endif
/* Enable DMA trigger when transmit data register empty,
* and receive data register full. */
LPSCI_HAL_SetTxDmaCmd(base, true);
LPSCI_HAL_SetRxDmaCmd(base, true);
switch (instance)
{
case 0:
lpsciRxDmaRequest = kDmaRequestMux0LPSCI0Rx;
lpsciTxDmaRequest = kDmaRequestMux0LPSCI0Tx;
break;
default :
break;
}
/* Request DMA channels for RX FIFO. */
DMA_DRV_RequestChannel(kDmaAnyChannel, lpsciRxDmaRequest,
&lpsciDmaStatePtr->dmaLpsciRx);
DMA_DRV_RegisterCallback(&lpsciDmaStatePtr->dmaLpsciRx,
LPSCI_DRV_DmaRxCallback, (void *)instance);
chn = &lpsciDmaStatePtr->dmaLpsciRx;
dmaBase = g_dmaBase[chn->channel/FSL_FEATURE_DMA_DMAMUX_CHANNELS];
DMA_HAL_SetAutoAlignCmd(dmaBase, chn->channel, false);
DMA_HAL_SetCycleStealCmd(dmaBase, chn->channel, true);
DMA_HAL_SetAsyncDmaRequestCmd(dmaBase, chn->channel, false);
DMA_HAL_SetDisableRequestAfterDoneCmd(dmaBase, chn->channel, true);
DMA_HAL_SetChanLink(dmaBase, chn->channel, &config);
DMA_HAL_SetSourceAddr(dmaBase, chn->channel, LPSCI_HAL_GetDataRegAddr(base));
DMA_HAL_SetSourceModulo(dmaBase, chn->channel, kDmaModuloDisable);
DMA_HAL_SetSourceTransferSize(dmaBase, chn->channel, kDmaTransfersize8bits);
DMA_HAL_SetSourceIncrementCmd(dmaBase, chn->channel, false);
DMA_HAL_SetDestModulo(dmaBase, chn->channel, kDmaModuloDisable);
DMA_HAL_SetDestTransferSize(dmaBase, chn->channel, kDmaTransfersize8bits);
DMA_HAL_SetDestIncrementCmd(dmaBase, chn->channel, true);
DMA_HAL_SetIntCmd(dmaBase, chn->channel, true);
/* Request DMA channels for TX FIFO. */
DMA_DRV_RequestChannel(kDmaAnyChannel, lpsciTxDmaRequest,
&lpsciDmaStatePtr->dmaLpsciTx);
DMA_DRV_RegisterCallback(&lpsciDmaStatePtr->dmaLpsciTx,
LPSCI_DRV_DmaTxCallback, (void *)instance);
chn = &lpsciDmaStatePtr->dmaLpsciTx;
dmaBase = g_dmaBase[chn->channel/FSL_FEATURE_DMA_DMAMUX_CHANNELS];
DMA_HAL_SetAutoAlignCmd(dmaBase, chn->channel, false);
DMA_HAL_SetCycleStealCmd(dmaBase, chn->channel, true);
DMA_HAL_SetAsyncDmaRequestCmd(dmaBase, chn->channel, false);
DMA_HAL_SetDisableRequestAfterDoneCmd(dmaBase, chn->channel, true);
DMA_HAL_SetChanLink(dmaBase, chn->channel, &config);
DMA_HAL_SetSourceModulo(dmaBase, chn->channel, kDmaModuloDisable);
DMA_HAL_SetSourceTransferSize(dmaBase, chn->channel, kDmaTransfersize8bits);
DMA_HAL_SetSourceIncrementCmd(dmaBase, chn->channel, true);
DMA_HAL_SetDestAddr(dmaBase, chn->channel, LPSCI_HAL_GetDataRegAddr(base));
DMA_HAL_SetDestModulo(dmaBase, chn->channel, kDmaModuloDisable);
DMA_HAL_SetDestTransferSize(dmaBase, chn->channel, kDmaTransfersize8bits);
DMA_HAL_SetDestIncrementCmd(dmaBase, chn->channel, false);
DMA_HAL_SetIntCmd(dmaBase, chn->channel, true);
/* Finally, enable the LPSCI transmitter and receiver*/
LPSCI_HAL_EnableTransmitter(base);
LPSCI_HAL_EnableReceiver(base);
return kStatus_LPSCI_Success;
}
