void motorSetup()
{
/* Set pin mode for Hbridge output pins */
MAP_PinTypeGPIO(AIN1, PIN_MODE_0, false); /* Ain 1 */
MAP_PinTypeGPIO(AIN2, PIN_MODE_0, false); /* Bin 1 */
MAP_PinTypeGPIO(BIN1, PIN_MODE_0, false); /* Bin 2 */
MAP_PinTypeGPIO(BIN2, PIN_MODE_0, false); /* Ain 2 */
/* Get port name and bin number from GPIO number (TI lookup table) */
GPIO_IF_GetPortNPin(AIN1x, &port_ain1, &pin_ain1);
GPIO_IF_GetPortNPin(AIN2x, &port_ain2, &pin_ain2);
GPIO_IF_GetPortNPin(BIN1x, &port_bin1, &pin_bin1);
GPIO_IF_GetPortNPin(BIN2x, &port_bin2, &pin_bin2);
/* Set pin direction */
GPIODirModeSet(port_ain1, pin_ain1, 1);
GPIODirModeSet(port_ain2, pin_ain2, 1);
GPIODirModeSet(port_bin1, pin_bin1, 1);
GPIODirModeSet(port_bin2, pin_bin2, 1);
/* Set value to write to PIN */
bitA1 = 1 << (AIN1x % 8);
bitA2 = 1 << (AIN2x % 8);
bitB1 = 1 << (BIN1x % 8);
bitB2 = 1 << (BIN2x % 8);
// Enable timer A peripheral
MAP_PRCMPeripheralClkEnable(PRCM_TIMERA0, PRCM_RUN_MODE_CLK);
MAP_PRCMPeripheralReset(PRCM_TIMERA0);
// Split channels and configure for periodic interrupts
MAP_TimerConfigure(TIMERA0_BASE, TIMER_CFG_SPLIT_PAIR | TIMER_CFG_A_PERIODIC | TIMER_CFG_B_PERIODIC);
MAP_TimerPrescaleSet(TIMERA0_BASE, TIMER_A, 0);
MAP_TimerPrescaleSet(TIMERA0_BASE, TIMER_B, 0);
// Set compare interrupt
MAP_TimerIntEnable(TIMERA0_BASE, TIMER_TIMA_MATCH);
MAP_TimerIntEnable(TIMERA0_BASE, TIMER_TIMB_MATCH);
// Configure compare interrupt, start with 0 speed
MAP_TimerMatchSet(TIMERA0_BASE, TIMER_A, 0);
MAP_TimerMatchSet(TIMERA0_BASE, TIMER_B, 0);
// Set timeout interrupt
MAP_TimerIntRegister(TIMERA0_BASE, TIMER_A, TimerBaseIntHandlerA);
MAP_TimerIntRegister(TIMERA0_BASE, TIMER_B, TimerBaseIntHandlerB);
MAP_TimerIntEnable(TIMERA0_BASE, TIMER_TIMA_TIMEOUT);
MAP_TimerIntEnable(TIMERA0_BASE, TIMER_TIMB_TIMEOUT);
// Turn on timers
MAP_TimerLoadSet(TIMERA0_BASE, TIMER_A, MOTOR_PRESCALER);
MAP_TimerLoadSet(TIMERA0_BASE, TIMER_B, MOTOR_PRESCALER);
MAP_TimerEnable(TIMERA0_BASE, TIMER_A);
MAP_TimerEnable(TIMERA0_BASE, TIMER_B);
}
void motorSetup()
{
pinMode(AIN1x, OUTPUT);
pinMode(AIN2x, OUTPUT);
pinMode(BIN1x, OUTPUT);
pinMode(BIN2x, OUTPUT);
bitA1 = digitalPinToBitMask(AIN1x);
bitA2 = digitalPinToBitMask(AIN2x);
bitB1 = digitalPinToBitMask(BIN1x);
bitB2 = digitalPinToBitMask(BIN2x);
portA1 = digitalPinToPort(AIN1x);
portA2 = digitalPinToPort(AIN2x);
portB1 = digitalPinToPort(BIN1x);
portB2 = digitalPinToPort(BIN2x);
baseA1 = (uint32_t) portBASERegister(portA1);
baseA2 = (uint32_t) portBASERegister(portA2);
baseB1 = (uint32_t) portBASERegister(portB1);
baseB2 = (uint32_t) portBASERegister(portB2);
// Enable timer A peripheral
MAP_PRCMPeripheralClkEnable(PRCM_TIMERA0, PRCM_RUN_MODE_CLK);
MAP_PRCMPeripheralReset(PRCM_TIMERA0);
// Split channels and configure for periodic interrupts
MAP_TimerConfigure(TIMERA0_BASE, TIMER_CFG_SPLIT_PAIR | TIMER_CFG_A_PERIODIC | TIMER_CFG_B_PERIODIC);
MAP_TimerPrescaleSet(TIMERA0_BASE, TIMER_A, 0);
MAP_TimerPrescaleSet(TIMERA0_BASE, TIMER_B, 0);
// Set compare interrupt
MAP_TimerIntEnable(TIMERA0_BASE, TIMER_TIMA_MATCH);
MAP_TimerIntEnable(TIMERA0_BASE, TIMER_TIMB_MATCH);
// Configure compare interrupt, start with 0 speed
MAP_TimerMatchSet(TIMERA0_BASE, TIMER_A, 0);
MAP_TimerMatchSet(TIMERA0_BASE, TIMER_B, 0);
// Set timeout interrupt
MAP_TimerIntRegister(TIMERA0_BASE, TIMER_A, TimerBaseIntHandlerA);
MAP_TimerIntRegister(TIMERA0_BASE, TIMER_B, TimerBaseIntHandlerB);
MAP_TimerIntEnable(TIMERA0_BASE, TIMER_TIMA_TIMEOUT);
MAP_TimerIntEnable(TIMERA0_BASE, TIMER_TIMB_TIMEOUT);
// Turn on timers
MAP_TimerLoadSet(TIMERA0_BASE, TIMER_A, MOTOR_PRESCALER);
MAP_TimerLoadSet(TIMERA0_BASE, TIMER_B, MOTOR_PRESCALER);
MAP_TimerEnable(TIMERA0_BASE, TIMER_A);
MAP_TimerEnable(TIMERA0_BASE, TIMER_B);
}
/*
* @brief Initialize MSP430.
*
* use 400us interrupt for SPI comms. This lets us xmit our 24-byte message in 9.6
* ms. At the end, we use a 32us interrupt for SPI comms. This is about as fast
* as the MSP430 can read bytes from the buffer. This double byte signals the end of the
* message for synchronizing the two processors
* @returns void
*/
void msp430Init(void) {
// Set up the message index
MSP430MessageIdx = 0;
// Default expand0 to off
expand0Disable();
// timer 1a is used for the ir interrupt. timer 1b is used for the MSP430 message interrupt
//ir_init initializes the timer 1, so timer1 shouldn't be enabled and configured here
//MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER1);
//MAP_TimerConfigure(TIMER1_BASE, TIMER_CFG_16_BIT_PAIR | TIMER_CFG_A_PERIODIC | TIMER_CFG_B_ONE_SHOT);
// end shared timer init code
MAP_TimerIntEnable(TIMER1_BASE, TIMER_TIMB_TIMEOUT);
MAP_TimerLoadSet(TIMER1_BASE, TIMER_B, MSP430_SPI_BYTE_PERIOD);
MAP_TimerEnable(TIMER1_BASE, TIMER_B);
// Enable the interrupt in the NVIC with the right priority for FreeRTOS
IntPrioritySet(INT_TIMER1B, SYSTEM_INTERRUPT_PRIORITY);
MAP_IntEnable(INT_TIMER1B);
// Have a flag to show the first valid communication from the MSP430
systemMSP430CommsValid = FALSE;
// Set up normal operations between the MSP430 and the 8962
systemMSP430Command = MSP430_CMD_COMMAND_NORMAL;
checksumFailure = 0;
}
void tone(uint8_t pin, unsigned int frequency, unsigned long duration)
{
/* Use TIMERA0B since it is not on any pin */
tone_timer = digitalPinToTimer(pin);
if(tone_timer == NOT_ON_TIMER)
return;
if(tone_state != 0 && pin != current_pin)
return;
g_duration = duration;
current_pin = pin;
tone_state = 2;
MAP_PRCMPeripheralClkEnable(PRCM_TIMERA0, PRCM_RUN_MODE_CLK);
MAP_PRCMPeripheralReset(PRCM_TIMERA0);
MAP_TimerConfigure(TIMERA0_BASE, TIMER_CFG_SPLIT_PAIR | TIMER_CFG_B_PERIODIC);
MAP_TimerIntRegister(TIMERA0_BASE, TIMER_B, ToneIntHandler);
MAP_TimerIntEnable(TIMERA0_BASE, TIMER_TIMB_TIMEOUT);
MAP_TimerPrescaleSet(TIMERA0_BASE, TIMER_B, 7);
MAP_TimerLoadSet(TIMERA0_BASE, TIMER_B, (F_CPU / 8) / 1000);
MAP_TimerEnable(TIMERA0_BASE, TIMER_B);
PWMWrite(pin, 256, 128, frequency);
}
//****************************************************************************
//
//! The delay function uses timer to implement the delay time in milliseconds
//!
//! \param time in millisecond
//
//! \return void
//****************************************************************************
static void delay(int time_ms)
{
// Initialize Timer 0B as one-shot down counter.
MAP_PRCMPeripheralClkEnable(PRCM_TIMERA0, PRCM_RUN_MODE_CLK);
MAP_PRCMPeripheralReset(PRCM_TIMERA0);
MAP_TimerConfigure(TIMERA0_BASE, TIMER_CFG_SPLIT_PAIR | TIMER_CFG_B_ONE_SHOT);
MAP_TimerPrescaleSet(TIMERA0_BASE, TIMER_B, PRESCALE);
//Load the value in milisecond
MAP_TimerLoadSet(TIMERA0_BASE, TIMER_B, MILLISECONDS_TO_TICKS(time_ms));
// Enable the timer
MAP_TimerEnable(TIMERA0_BASE, TIMER_B);
//Stall during debug
MAP_TimerControlStall(TIMERA0_BASE, TIMER_B, 1);
// Enable interrupt upon Time-out
MAP_TimerIntEnable(TIMERA0_BASE, TIMER_TIMB_TIMEOUT);
// Clear Interrupt Flag
MAP_TimerIntClear(TIMERA0_BASE, MAP_TimerIntStatus(TIMERA0_BASE, true));
//Wait until timer time-out
while (MAP_TimerIntStatus(TIMERA0_BASE, true) != TIMER_TIMB_TIMEOUT){}
//Disable the timer
MAP_TimerDisable(TIMERA0_BASE, TIMER_B);
//Disable Interrupt
MAP_TimerIntDisable(TIMERA0_BASE, TIMER_TIMB_TIMEOUT);
MAP_TimerIntUnregister(TIMERA0_BASE, TIMER_B);
}
void hw_timer0a_init(TN_EVENT* evt, unsigned evt_pattern)
{
if (evt == NULL || evt_pattern == 0)
{
dbg_puts("evt == NULL || evt_pattern == 0");
dbg_trace();
tn_halt();
}
g_timer0a_evt = evt;
g_timer0a_evt_pattern = evt_pattern;
// TIMER_0_A32
MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER0);
MAP_SysCtlPeripheralReset(SYSCTL_PERIPH_TIMER0);
MAP_TimerDisable(TIMER0_BASE, TIMER_A);
MAP_TimerConfigure(TIMER0_BASE, TIMER_CFG_32_BIT_PER); // periodic mode
MAP_TimerIntEnable(TIMER0_BASE, TIMER_TIMA_TIMEOUT);
//MAP_IntPrioritySet(INT_TIMER0A, 0); // 0 - max pri 7 - min pri
MAP_IntEnable(INT_TIMER0A);
/*
MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER3);
MAP_TimerDisable(TIMER3_BASE, TIMER_A);
MAP_TimerConfigure(TIMER3_BASE, TIMER_CFG_32_BIT_OS);
MAP_TimerEnable(TIMER3_BASE, TIMER_A);
*/
}
void SysTimerConfig(void)
{
/// Enable TIMER0
MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER0);
/// Configure TIMER0
MAP_TimerConfigure(TIMER0_BASE, TIMER_CFG_A_PERIODIC);
MAP_TimerLoadSet(TIMER0_BASE,TIMER_A, MAP_SysCtlClockGet()/100);
MAP_TimerEnable(TIMER0_BASE, TIMER_A);
/// \todo Set it statically?
TimerIntRegister(TIMER0_BASE, TIMER_A, SysTimerHandler);
MAP_TimerIntEnable(TIMER0_BASE, TIMER_TIMA_TIMEOUT);
}
//*****************************************************************************
//
//! setting up the timer
//!
//! \param ulBase is the base address for the timer.
//! \param ulTimer selects between the TIMER_A or TIMER_B or TIMER_BOTH.
//! \param TimerBaseIntHandler is the pointer to the function that handles the
//! interrupt for the Timer
//!
//! This function
//! 1. Register the function handler for the timer interrupt.
//! 2. enables the timer interrupt.
//!
//! \return none
//
//*****************************************************************************
void Timer_IF_IntSetup(unsigned long ulBase, unsigned long ulTimer,
void (*TimerBaseIntHandler)(void))
{
//
// Setup the interrupts for the timer timeouts.
//
#if defined(USE_TIRTOS) || defined(USE_FREERTOS) || defined(SL_PLATFORM_MULTI_THREADED)
// USE_TIRTOS: if app uses TI-RTOS (either networking/non-networking)
// USE_FREERTOS: if app uses Free-RTOS (either networking/non-networking)
// SL_PLATFORM_MULTI_THREADED: if app uses any OS + networking(simplelink)
if(ulTimer == TIMER_BOTH)
{
osi_InterruptRegister(GetPeripheralIntNum(ulBase, TIMER_A),
TimerBaseIntHandler, INT_PRIORITY_LVL_1);
osi_InterruptRegister(GetPeripheralIntNum(ulBase, TIMER_B),
TimerBaseIntHandler, INT_PRIORITY_LVL_1);
}
else
{
osi_InterruptRegister(GetPeripheralIntNum(ulBase, ulTimer),
TimerBaseIntHandler, INT_PRIORITY_LVL_1);
}
#else
MAP_IntPrioritySet(GetPeripheralIntNum(ulBase, ulTimer), INT_PRIORITY_LVL_1);
MAP_TimerIntRegister(ulBase, ulTimer, TimerBaseIntHandler);
#endif
if(ulTimer == TIMER_BOTH)
{
MAP_TimerIntEnable(ulBase, TIMER_TIMA_TIMEOUT|TIMER_TIMB_TIMEOUT);
}
else
{
MAP_TimerIntEnable(ulBase, ((ulTimer == TIMER_A) ? TIMER_TIMA_TIMEOUT :
TIMER_TIMB_TIMEOUT));
}
}
static i32 hwt32_start(struct hw_timer32 *hwt, u32 expires,
enum cc_hw_timer_mode mode)
{
if(hwt32_configure(hwt, expires, mode))
return -1;
hwt32_set_op_mode(hwt, mode);
MAP_TimerIntEnable(hwt->base_addr, hwt->irq_mask);
MAP_TimerEnable(hwt->base_addr, TIMER_A);
return 0;
}
static void EmitCtrlInit(void)
{
s_ulTimerEmitCtrl = TIMERA1_BASE;
MAP_PRCMPeripheralClkEnable(PRCM_TIMERA1,PRCM_RUN_MODE_CLK);
MAP_PRCMPeripheralReset(PRCM_TIMERA1);
MAP_TimerConfigure(s_ulTimerEmitCtrl,TIMER_CFG_PERIODIC);
MAP_TimerPrescaleSet(s_ulTimerEmitCtrl,TIMER_A,0);
//MAP_TimerIntRegister(s_ulTimerEmitCtrl,TIMER_A,TimerEmitCtrlHandler);
osi_InterruptRegister(INT_TIMERA1A, TimerEmitCtrlHandler, 32);
MAP_TimerIntEnable(s_ulTimerEmitCtrl,TIMER_TIMA_TIMEOUT);
}
void controller_setup(){
// Enable timer A peripheral
MAP_PRCMPeripheralClkEnable(PRCM_TIMERA1, PRCM_RUN_MODE_CLK);
MAP_PRCMPeripheralReset(PRCM_TIMERA1);
// Configure one channel for periodic interrupts
MAP_TimerConfigure(TIMERA1_BASE, TIMER_CFG_SPLIT_PAIR | TIMER_CFG_A_PERIODIC);
MAP_TimerPrescaleSet(TIMERA1_BASE, TIMER_A, IMU_CONTROLLER_PRESCALER);
// Set timeout interrupt
MAP_TimerIntRegister(TIMERA1_BASE, TIMER_A, ControllerIntHandler);
MAP_TimerIntEnable(TIMERA1_BASE, TIMER_TIMA_TIMEOUT);
// Turn on timers
MAP_TimerLoadSet(TIMERA1_BASE, TIMER_A, IMU_CONTROLLER_STARTUP);
MAP_TimerEnable(TIMERA1_BASE, TIMER_A);
}
void OneMsTaskTimer::start(uint32_t timer_index) {
uint32_t load = (F_CPU / 1000);
//// !!!! count = 0;
overflowing = 0;
// Base address for first timer
g_ulBase = TIMERA0_BASE + (timer_index <<12);
// Configuring the timers
MAP_PRCMPeripheralClkEnable(PRCM_TIMERA0 + timer_index, PRCM_RUN_MODE_CLK);
MAP_PRCMPeripheralReset(PRCM_TIMERA0 + timer_index);
MAP_TimerConfigure(g_ulBase,TIMER_CFG_PERIODIC);
MAP_TimerPrescaleSet(g_ulBase,TIMER_A,0);
// Setup the interrupts for the timer timeouts.
MAP_TimerIntRegister(g_ulBase, TIMER_A, OneMsTaskTimer_int);
MAP_TimerIntEnable(g_ulBase, TIMER_TIMA_TIMEOUT);
// Turn on the timers
MAP_TimerLoadSet(g_ulBase,TIMER_A, load);
// Enable the GPT
MAP_TimerEnable(g_ulBase,TIMER_A);
}
void odometer_controller_setup(void){
//acc_value_startup = get_accelerometer_default_offset();
// Enable timer A peripheral
MAP_PRCMPeripheralClkEnable(PRCM_TIMERA3, PRCM_RUN_MODE_CLK);
MAP_PRCMPeripheralReset(PRCM_TIMERA3);
// Configure one channel for periodic interrupts
MAP_TimerConfigure(TIMERA3_BASE, TIMER_CFG_SPLIT_PAIR | TIMER_CFG_A_PERIODIC);
MAP_TimerPrescaleSet(TIMERA3_BASE, TIMER_A, ODOMETER_CONTROLLER_PRESCALER);
// Set timeout interrupt
MAP_TimerIntRegister(TIMERA3_BASE, TIMER_A, OdometerControllerIntHandler);
MAP_TimerIntEnable(TIMERA3_BASE, TIMER_TIMA_TIMEOUT);
// Turn on timers
MAP_TimerLoadSet(TIMERA3_BASE, TIMER_A, ODOMETER_CONTROLLER_STARTUP);
MAP_TimerEnable(TIMERA3_BASE, TIMER_A);
}
//*****************************************************************************
//
//! Main Function
//
//*****************************************************************************
int main()
{
//
// Initialize Board configurations
//
BoardInit();
//
// Pinmux for UART
//
PinMuxConfig();
//
// Configuring UART
//
InitTerm();
//
// Display Application Banner
//
DisplayBanner(APP_NAME);
//
// Enable pull down
//
MAP_PinConfigSet(PIN_05,PIN_TYPE_STD_PD,PIN_STRENGTH_6MA);
//
// Register timer interrupt hander
//
MAP_TimerIntRegister(TIMERA2_BASE,TIMER_A,TimerIntHandler);
//
// Configure the timer in edge count mode
//
MAP_TimerConfigure(TIMERA2_BASE, (TIMER_CFG_SPLIT_PAIR | TIMER_CFG_A_CAP_TIME));
//
// Set the detection edge
//
MAP_TimerControlEvent(TIMERA2_BASE,TIMER_A,TIMER_EVENT_POS_EDGE);
//
// Set the reload value
//
MAP_TimerLoadSet(TIMERA2_BASE,TIMER_A,0xffff);
//
// Enable capture event interrupt
//
MAP_TimerIntEnable(TIMERA2_BASE,TIMER_CAPA_EVENT);
//
// Enable Timer
//
MAP_TimerEnable(TIMERA2_BASE,TIMER_A);
while(1)
{
//
// Report the calculate frequency
//
Report("Frequency : %d Hz\n\n\r",g_ulFreq);
//
// Delay loop
//
MAP_UtilsDelay(80000000/5);
}
}
//*****************************************************************************
//
//! \PerformIntTest
//!
//! Performs the repeated steps in running each test scenario.
//!
//! \param ucPriorityA0 is the interrupt priority to be used for Timer A0
//! \param ucPriorityA1 is the interrupt priority to be used for Timer A1
//! \param ucPriorityA2 is the interrupt priority to be used for Timer A2
//!
//! This function performs all the steps which are common to each test scenario
//! inside function InterruptTest.
//!
//! \return None.
//
//*****************************************************************************
tBoolean
PerformIntTest(unsigned long ulPriBits, unsigned char ucPriorityA0,
unsigned char ucPriorityA1,unsigned char ucPriorityA2)
{
tBoolean bRetcode;
unsigned long ulStatus;
//
// Set the appropriate interrupt priorities.
//
MAP_IntPriorityGroupingSet(ulPriBits);
MAP_IntPrioritySet(INT_TIMERA0A, ucPriorityA0);
MAP_IntPrioritySet(INT_TIMERA1A, ucPriorityA1);
MAP_IntPrioritySet(INT_TIMERA2A, ucPriorityA2);
//
// Clear any pending timer interrupts
//
ulStatus = MAP_TimerIntStatus(TIMERA0_BASE, false);
MAP_TimerIntClear(TIMERA0_BASE, ulStatus);
ulStatus = MAP_TimerIntStatus(TIMERA1_BASE, false);
MAP_TimerIntClear(TIMERA1_BASE, ulStatus);
ulStatus = MAP_TimerIntStatus(TIMERA2_BASE, false);
MAP_TimerIntClear(TIMERA2_BASE, ulStatus);
//
// Clear all the counters and flags used by the interrupt handlers.
//
g_ulA0IntCount = 0;
g_ulA1IntCount = 0;
g_ulA2IntCount=0;
g_bA1CountChanged = false;
//
// Enable three timer interrupts
//
MAP_TimerIntEnable(TIMERA0_BASE, TIMER_TIMA_TIMEOUT);
MAP_TimerIntEnable(TIMERA1_BASE, TIMER_TIMA_TIMEOUT);
MAP_TimerIntEnable(TIMERA2_BASE, TIMER_TIMA_TIMEOUT);
//
// Enable Timer A0
//
MAP_TimerEnable(TIMERA0_BASE, TIMER_A);
//
// Wait for Timer 0/A to fire.
//
bRetcode = UTUtilsWaitForCount(&g_ulA0IntCount, 1,
((SLOW_TIMER_DELAY_uS*3)/1000));
//
// Stop All timers and disable their interrupts
//
MAP_TimerDisable(TIMERA2_BASE, TIMER_A);
MAP_TimerDisable(TIMERA1_BASE, TIMER_A);
MAP_TimerDisable(TIMERA0_BASE, TIMER_A);
MAP_TimerIntDisable(TIMERA2_BASE, TIMER_TIMA_TIMEOUT);
MAP_TimerIntDisable(TIMERA1_BASE, TIMER_TIMA_TIMEOUT);
MAP_TimerIntDisable(TIMERA0_BASE, TIMER_TIMA_TIMEOUT);
return(bRetcode);
}
void InitUartInterface(uint32_t sys_clock)
{
uart_rx_read_index = 0;
uart_rx_write_index = 0;
const uint32_t dma_rx_primary = UDMA_CHANNEL_UART1RX | UDMA_PRI_SELECT;
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB);
SysCtlPeripheralEnable(SYSCTL_PERIPH_UART1);
SysCtlPeripheralSleepEnable(SYSCTL_PERIPH_UART1);
//921600
//460800
uint32_t uart_config = UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE;
UARTConfigSetExpClk(UART1_BASE, sys_clock, 921600, uart_config);
GPIOPinConfigure(GPIO_PB0_U1RX);
GPIOPinConfigure(GPIO_PB1_U1TX);
GPIOPinTypeUART(GPIO_PORTB_BASE, GPIO_PIN_0 | GPIO_PIN_1);
UARTFIFOLevelSet(UART1_BASE, UART_FIFO_TX4_8, UART_FIFO_RX4_8);
UARTEnable(UART1_BASE);
//UARTDMAEnable(UART1_BASE, UART_DMA_RX | UART_DMA_TX);
UARTDMAEnable(UART1_BASE, UART_DMA_RX);
// Put the attributes in a known state for the uDMA UART1RX channel. These
// should already be disabled by default.
uint32_t dma_config = UDMA_ATTR_ALTSELECT | UDMA_ATTR_USEBURST | UDMA_ATTR_HIGH_PRIORITY | UDMA_ATTR_REQMASK;
uDMAChannelAttributeDisable(UDMA_CHANNEL_UART1RX, dma_config);
uint32_t dma_control = UDMA_SIZE_8 | UDMA_SRC_INC_NONE | UDMA_DST_INC_8 | UDMA_ARB_4;
uDMAChannelControlSet(dma_rx_primary, dma_control);
uDMAChannelTransferSet(dma_rx_primary, UDMA_MODE_BASIC, (void *)(UART1_BASE + UART_O_DR), &uart_rx_buf[uart_rx_write_index], UART_RX_BLOCK_SIZE);
// Put the attributes in a known state for the uDMA UART1TX channel. These
// should already be disabled by default.
// uDMAChannelAttributeDisable(UDMA_CHANNEL_UART1TX,
// UDMA_ATTR_ALTSELECT |
// UDMA_ATTR_HIGH_PRIORITY |
// UDMA_ATTR_REQMASK);
// Set the USEBURST attribute for the uDMA UART TX channel. This will
// force the controller to always use a burst when transferring data from
// the TX buffer to the UART. This is somewhat more effecient bus usage
// than the default which allows single or burst transfers.
//uDMAChannelAttributeEnable(UDMA_CHANNEL_UART1TX, UDMA_ATTR_USEBURST);
// Configure the control parameters for the UART TX. The uDMA UART TX
// channel is used to transfer a block of data from a buffer to the UART.
// The data size is 8 bits. The source address increment is 8-bit bytes
// since the data is coming from a buffer. The destination increment is
// none since the data is to be written to the UART data register. The
// arbitration size is set to 4, which matches the UART TX FIFO trigger
// threshold.
// uDMAChannelControlSet(UDMA_CHANNEL_UART1TX | UDMA_PRI_SELECT,
// UDMA_SIZE_8 | UDMA_SRC_INC_8 |
// UDMA_DST_INC_NONE |
// UDMA_ARB_4);
// Set up the transfer parameters for the uDMA UART TX channel. This will
// configure the transfer source and destination and the transfer size.
// Basic mode is used because the peripheral is making the uDMA transfer
// request. The source is the TX buffer and the destination is the UART
// data register.
// uDMAChannelTransferSet(UDMA_CHANNEL_UART1TX | UDMA_PRI_SELECT,
// UDMA_MODE_BASIC, g_ui8TxBuf,
// (void *)(UART1_BASE + UART_O_DR),
// sizeof(g_ui8TxBuf));
// Now both the uDMA UART TX and RX channels are primed to start a
// transfer. As soon as the channels are enabled, the peripheral will
// issue a transfer request and the data transfers will begin.
uDMAChannelEnable(UDMA_CHANNEL_UART1RX);
//uDMAChannelEnable(UDMA_CHANNEL_UART1TX);
// Enable the UART DMA TX/RX interrupts.
//UARTIntEnable(UART1_BASE, UART_INT_DMATX | UART_INT_DMATX);
UARTIntEnable(UART1_BASE, UART_INT_DMARX);
IntEnable(INT_UART1);
MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER0);
MAP_TimerConfigure(TIMER0_BASE, TIMER_CFG_PERIODIC);
MAP_TimerLoadSet(TIMER0_BASE, TIMER_A, sys_clock / 2000);
MAP_IntEnable(INT_TIMER0A);
MAP_TimerIntEnable(TIMER0_BASE, TIMER_TIMA_TIMEOUT);
MAP_TimerEnable(TIMER0_BASE, TIMER_A);
MAP_IntPrioritySet(INT_TIMER0A, 0xC0);
}
/*
* @brief Enable MSP430 interrupt.
*
* @returns void
*/
void msp430InterruptEnable(void) {
MAP_TimerIntEnable(TIMER1_BASE, TIMER_TIMB_TIMEOUT);
}
