// assumes init parameters have been set up correctly
bool uart_init2(pyb_uart_obj_t *self) {
uint uartPerh;
switch (self->uart_id) {
case PYB_UART_0:
self->reg = UARTA0_BASE;
uartPerh = PRCM_UARTA0;
MAP_UARTIntRegister(UARTA0_BASE, UART0IntHandler);
MAP_IntPrioritySet(INT_UARTA0, INT_PRIORITY_LVL_3);
break;
case PYB_UART_1:
self->reg = UARTA1_BASE;
uartPerh = PRCM_UARTA1;
MAP_UARTIntRegister(UARTA1_BASE, UART1IntHandler);
MAP_IntPrioritySet(INT_UARTA1, INT_PRIORITY_LVL_3);
break;
default:
return false;
}
// Enable the peripheral clock
MAP_PRCMPeripheralClkEnable(uartPerh, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK);
// Reset the uart
MAP_PRCMPeripheralReset(uartPerh);
// Initialize the UART
MAP_UARTConfigSetExpClk(self->reg, MAP_PRCMPeripheralClockGet(uartPerh),
self->baudrate, self->config);
// Enbale the FIFO
MAP_UARTFIFOEnable(self->reg);
// Configure the FIFO interrupt levels
MAP_UARTFIFOLevelSet(self->reg, UART_FIFO_TX4_8, UART_FIFO_RX4_8);
// Configure the flow control mode
UARTFlowControlSet(self->reg, self->flowcontrol);
// Enable the RX and RX timeout interrupts
MAP_UARTIntEnable(self->reg, UART_INT_RX | UART_INT_RT);
self->enabled = true;
return true;
}
void UART1IntInit(){
//configure Uart
MAP_UARTConfigSetExpClk(UARTA1_BASE, MAP_PRCMPeripheralClockGet(PRCM_UARTA1),
UART_BAUD_RATE, (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE |
UART_CONFIG_PAR_NONE));
UARTEnable(UARTA1_BASE);
// Disable FIFO so RX interrupt triggers on any character
MAP_UARTFIFODisable(UARTA1_BASE);
// Set interrupt handlers
MAP_UARTIntRegister(UARTA1_BASE,receiveMessage);
// Clear any interrupts that may have been present
MAP_UARTIntClear(UARTA1_BASE, UART_INT_RX);
// Enable interrupt
MAP_UARTIntEnable(UARTA1_BASE, UART_INT_RX|UART_INT_RT);
UARTFIFOEnable(UARTA1_BASE);
}
//*****************************************************************************
//
//! Main function handling the UART and DMA configuration. It takes 8
//! characters from terminal without displaying them. The string of 8
//! caracters will be printed on the terminal as soon as 8th character is
//! typed in.
//!
//! \param None
//!
//! \return None
//!
//*****************************************************************************
void main()
{
//
// Initailizing the board
//
BoardInit();
//
// Initialize the RX done flash
//
bRxDone = false;
//
// Initialize uDMA
//
UDMAInit();
//
// Muxing for Enabling UART_TX and UART_RX.
//
PinMuxConfig();
//
// Register interrupt handler for UART
//
MAP_UARTIntRegister(UARTA0_BASE,UARTIntHandler);
//
// Enable DMA done interrupts for uart
//
MAP_UARTIntEnable(UARTA0_BASE,UART_INT_DMARX);
//
// Initialising the Terminal.
//
MAP_UARTConfigSetExpClk(CONSOLE,MAP_PRCMPeripheralClockGet(CONSOLE_PERIPH),
UART_BAUD_RATE,
(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE |
UART_CONFIG_PAR_NONE));
//
// Clear terminal
//
ClearTerm();
//
// Display Banner
//
DisplayBanner(APP_NAME);
Message("\t\t****************************************************\n\r");
Message("\t\t Type in a string of 8 characters, the characters \n\r");
Message("\t\t will not be displayed on the terminal until \n\r");
Message("\t\t 8th character is entered.\n\r") ;
Message("\t\t****************************************************\n\r");
Message("\n\n\n\r");
//
// Set the message
//
Message("Type in 8 characters:");
//
// Configure the UART Tx and Rx FIFO level to 1/8 i.e 2 characters
//
UARTFIFOLevelSet(UARTA0_BASE,UART_FIFO_TX1_8,UART_FIFO_RX1_8);
//
// Setup DMA transfer for UART A0
//
UDMASetupTransfer(UDMA_CH8_UARTA0_RX,
UDMA_MODE_BASIC,
8,
UDMA_SIZE_8,
UDMA_ARB_2,
(void *)(UARTA0_BASE+UART_O_DR),
UDMA_SRC_INC_NONE,
(void *)ucTextBuff,
UDMA_DST_INC_8);
//
// Enable Rx DMA request from UART
//
MAP_UARTDMAEnable(UARTA0_BASE,UART_DMA_RX);
//
// Wait for RX to complete
//
while(!bRxDone)
{
}
//
// Setup DMA transfer for UART A0
//
UDMASetupTransfer(UDMA_CH9_UARTA0_TX,
UDMA_MODE_BASIC,
8,
UDMA_SIZE_8,
UDMA_ARB_2,
(void *)ucTextBuff,
UDMA_SRC_INC_8,
(void *)(UARTA0_BASE+UART_O_DR),
UDMA_DST_INC_NONE);
//
// Enable TX DMA request
//
MAP_UARTDMAEnable(UARTA0_BASE,UART_DMA_TX);
while(1)
{
//
// Inifite loop
//
}
}
//*****************************************************************************
//
//! Main function for uDMA Application
//!
//! \param none
//!
//! \return none
//!
//*****************************************************************************
void
main()
{
static unsigned long ulPrevSeconds;
static unsigned long ulPrevUARTCount = 0;
unsigned long ulXfersCompleted;
unsigned long ulBytesAvg=0;
int iCount=0;
//
// Initailizing the board
//
BoardInit();
//
// Muxing for Enabling UART_TX and UART_RX.
//
PinMuxConfig();
//
// Initialising the Terminal.
//
InitTerm();
//
// Display Welcome Message
//
DisplayBanner();
//
// SysTick Enabling
//
SysTickIntRegister(SysTickHandler);
SysTickPeriodSet(SYSTICK_RELOAD_VALUE);
SysTickEnable();
//
// uDMA Initialization
//
UDMAInit();
//
// Register interrupt handler for UART
//
MAP_UARTIntRegister(UARTA0_BASE,UART0IntHandler);
UART_PRINT("Completed DMA Initialization \n\r\n\r");
//
// Auto DMA Transfer
//
UART_PRINT("Starting Auto DMA Transfer \n\r");
InitSWTransfer();
//
// Scatter Gather DMA Transfer
//
UART_PRINT("Starting Scatter Gather DMA Operation\n\r");
InitSGTransfer();
while(!Done){}
MAP_UtilsDelay(80000000);
//
// Ping Pong UART Transfer
//
InitUART0Transfer();
//
// Remember the current SysTick seconds count.
//
ulPrevSeconds = g_ulSeconds;
while(1)
{
//
// Check to see if one second has elapsed. If so, the make some
// updates.
//
if(g_ulSeconds != ulPrevSeconds)
{
uiCount++;
//
// Remember the new seconds count.
//
ulPrevSeconds = g_ulSeconds;
//
// Calculate how many UART transfers have occurred since the last
// second.
//
ulXfersCompleted = (g_ulRxBufACount + g_ulRxBufBCount -
ulPrevUARTCount);
//
// Remember the new UART transfer count.
//
ulPrevUARTCount = g_ulRxBufACount + g_ulRxBufBCount;
//
// Compute how many bytes were transferred by the UART.
//
ulBytesTransferred[iCount] = (ulXfersCompleted * UART_RXBUF_SIZE );
iCount++;
//
// Print a message to the display showing the memory transfer rate.
//
if(UARTDone)
{
MAP_PRCMPeripheralReset(PRCM_UARTA0);
MAP_PRCMPeripheralClkEnable(PRCM_UARTA0,PRCM_RUN_MODE_CLK);
UARTConfigSetExpClk(CONSOLE,SYSCLK, UART_BAUD_RATE,
(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE |
UART_CONFIG_PAR_NONE));
}
}
//
// See if we have run long enough and exit the loop if so.
//
if(g_ulSeconds >= 6 && UARTDone)
{
break;
}
}
//
// Compute average Bytes Transfer Rate for the past 5 seconds
//
for(iCount=1;iCount<=5;iCount++)
{
ulBytesAvg += ulBytesTransferred[iCount];
}
ulBytesAvg=ulBytesAvg/5;
UART_PRINT("\n\r");
UART_PRINT("\n\r");
UART_PRINT("\n\rCompleted Ping Pong Transfer from Memory to UART "
"Peripheral \n\r");
UART_PRINT(" \n\rTransfer Rate is %lu Bytes/Sec \n\r", ulBytesAvg);
UART_PRINT("\n\rTest Ended\n\r");
return ;
}
//*****************************************************************************
//
//! Initializes the UART0 peripheral and sets up the TX and RX uDMA channels.
//! The UART is configured for loopback mode so that any data sent on TX will be
//! received on RX. The uDMA channels are configured so that the TX channel
//! will copy data from a buffer to the UART TX output. And the uDMA RX channel
//! will receive any incoming data into a pair of buffers in ping-pong mode.
//!
//! \param None
//!
//! \return None
//!
//*****************************************************************************
void
InitUART0Transfer(void)
{
unsigned int uIdx;
//
// Fill the TX buffer with a simple data pattern.
//
for(uIdx = 0; uIdx < UART_TXBUF_SIZE; uIdx++)
{
g_ucTxBuf[uIdx] = 65;
}
MAP_PRCMPeripheralReset(PRCM_UARTA0);
MAP_PRCMPeripheralClkEnable(PRCM_UARTA0,PRCM_RUN_MODE_CLK);
MAP_UARTConfigSetExpClk(CONSOLE,SYSCLK, UART_BAUD_RATE,
(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE |
UART_CONFIG_PAR_NONE));
MAP_uDMAChannelAssign(UDMA_CH8_UARTA0_RX);
MAP_uDMAChannelAssign(UDMA_CH9_UARTA0_TX);
MAP_UARTIntRegister(UARTA0_BASE,UART0IntHandler);
//
// Set both the TX and RX trigger thresholds to 4. This will be used by
// the uDMA controller to signal when more data should be transferred. The
// uDMA TX and RX channels will be configured so that it can transfer 4
// bytes in a burst when the UART is ready to transfer more data.
//
MAP_UARTFIFOLevelSet(UARTA0_BASE, UART_FIFO_TX4_8, UART_FIFO_RX4_8);
//
// Enable the UART for operation, and enable the uDMA interface for both TX
// and RX channels.
//
MAP_UARTEnable(UARTA0_BASE);
//
// This register write will set the UART to operate in loopback mode. Any
// data sent on the TX output will be received on the RX input.
//
HWREG(UARTA0_BASE + UART_O_CTL) |= UART_CTL_LBE;
//
// Enable the UART peripheral interrupts. uDMA controller will cause an
// interrupt on the UART interrupt signal when a uDMA transfer is complete.
//
MAP_UARTIntEnable(UARTA0_BASE,UART_INT_DMATX);
MAP_UARTIntEnable(UARTA0_BASE,UART_INT_DMARX);
//
// Configure the control parameters for the UART TX. The uDMA UART TX
// channel is used to transfer a block of data from a buffer to the UART.
// The data size is 8 bits. The source address increment is 8-bit bytes
// since the data is coming from a buffer. The destination increment is
// none since the data is to be written to the UART data register. The
// arbitration size is set to 4, which matches the UART TX FIFO trigger
// threshold.
//
UDMASetupTransfer(UDMA_CH8_UARTA0_RX | UDMA_PRI_SELECT, UDMA_MODE_PINGPONG,
sizeof(g_ucRxBufA),UDMA_SIZE_8, UDMA_ARB_4,
(void *)(UARTA0_BASE + UART_O_DR), UDMA_SRC_INC_NONE,
g_ucRxBufA, UDMA_DST_INC_8);
UDMASetupTransfer(UDMA_CH8_UARTA0_RX | UDMA_ALT_SELECT, UDMA_MODE_PINGPONG,
sizeof(g_ucRxBufB),UDMA_SIZE_8, UDMA_ARB_4,
(void *)(UARTA0_BASE + UART_O_DR), UDMA_SRC_INC_NONE,
g_ucRxBufB, UDMA_DST_INC_8);
UDMASetupTransfer(UDMA_CH9_UARTA0_TX| UDMA_PRI_SELECT,
UDMA_MODE_BASIC,sizeof(g_ucTxBuf),UDMA_SIZE_8, UDMA_ARB_4,
g_ucTxBuf, UDMA_SRC_INC_8,(void *)(UARTA0_BASE + UART_O_DR),
UDMA_DST_INC_NONE);
MAP_UARTDMAEnable(UARTA0_BASE, UART_DMA_RX | UART_DMA_TX);
}
Uart0::Error Uart0::config_uart() {
if (is_open())
return kPortAlreadyOpen;
uint32_t data_bits_cc3200;
switch (data_bits) {
case 5:
data_bits_cc3200 = UART_CONFIG_WLEN_5;
break;
case 6:
data_bits_cc3200 = UART_CONFIG_WLEN_6;
break;
case 7:
data_bits_cc3200 = UART_CONFIG_WLEN_7;
break;
case 8:
data_bits_cc3200 = UART_CONFIG_WLEN_8;
break;
default:
return kUnsuportedFeature;
}
uint32_t stop_bits_cc3200;
switch (stop_bits) {
case 1:
stop_bits_cc3200 = UART_CONFIG_STOP_ONE;
break;
case 2:
stop_bits_cc3200 = UART_CONFIG_STOP_TWO;
break;
default:
return kUnsuportedFeature;
}
uint32_t parity_cc3200;
switch (parity) {
case kParityEven:
parity_cc3200 = UART_CONFIG_PAR_EVEN;
break;
case kParityMark:
parity_cc3200 = UART_CONFIG_PAR_ONE;
break;
case kParityNone:
parity_cc3200 = UART_CONFIG_PAR_NONE;
break;
case kParityOdd:
parity_cc3200 = UART_CONFIG_PAR_ODD;
break;
case kParitySpace:
parity_cc3200 = UART_CONFIG_PAR_ZERO;
break;
default:
return kUnsuportedFeature;
}
MAP_UARTConfigSetExpClk(UARTA0_BASE, 80000000, baud,
(data_bits_cc3200 | stop_bits_cc3200 | parity_cc3200));
/*
* Disable UART to modify the configuration.
* This is needed because the SetExpClk function enables the UART
*/
MAP_UARTDisable(UARTA0_BASE);
switch (flow_control) {
case kFlowControlNone:
MAP_UARTFlowControlSet(UARTA0_BASE, UART_FLOWCONTROL_NONE);
break;
case kFlowControlHardware:
/* Enable RTS/CTS Flow Control */
if (mode == kModeDuplex)
MAP_UARTFlowControlSet(UARTA0_BASE,
UART_FLOWCONTROL_TX | UART_FLOWCONTROL_RX);
if (mode == kModeRxOnly)
MAP_UARTFlowControlSet(UARTA0_BASE,
UART_FLOWCONTROL_RX);
if (mode == kModeTxOnly)
MAP_UARTFlowControlSet(UARTA0_BASE,
UART_FLOWCONTROL_TX);
break;
default:
return kUnsuportedFeature;
break;
}
/* Register Interrupt */
MAP_UARTIntRegister(UARTA0_BASE, isr);
/* Enable Interrupt */
MAP_UARTTxIntModeSet(UARTA0_BASE, UART_TXINT_MODE_EOT);
MAP_UARTIntClear(UARTA0_BASE, UART_INT_TX | UART_INT_RX);
uint32_t interrupts = 0;
if ((mode == kModeDuplex) || (mode == kModeTxOnly))
interrupts |= UART_INT_TX;
if ((mode == kModeDuplex) || (mode == kModeRxOnly))
interrupts |= UART_INT_RX;
MAP_UARTIntEnable(UARTA0_BASE, interrupts);
/* Enable UART */
MAP_UARTEnable(UARTA0_BASE);
/* Disable Fifo */
MAP_UARTFIFODisable(UARTA0_BASE);
return kOK;
}
