wwd_result_t host_platform_bus_deinit( void )
{
if ( sdio_bus_initted == WICED_TRUE )
{
uint8_t a = 0;
platform_mcu_powersave_disable();
// host_rtos_deinit_semaphore( &sdio_transfer_done_semaphore );
// disable_sdio_block_transfer_done_irq();
MCI_Disable( HSMCI );
NVIC_DisableIRQ( HSMCI_IRQn );
#ifdef WICED_WIFI_USE_GPIO_FOR_BOOTSTRAP
platform_gpio_deinit( &wifi_control_pins[WWD_PIN_BOOTSTRAP_0] );
platform_gpio_deinit( &wifi_control_pins[WWD_PIN_BOOTSTRAP_1] );
#endif /* WICED_WIFI_USE_GPIO_FOR_BOOTSTRAP */
/* Reset all SDIO pins to input pull-up to save power */
for ( a = WWD_PIN_SDIO_CLK; a < WWD_PIN_SDIO_MAX; a++ )
{
platform_gpio_deinit( &wifi_sdio_pins[a] );
}
platform_mcu_powersave_enable();
sdio_bus_initted = WICED_FALSE;
}
return WICED_SUCCESS;
}
wwd_result_t host_platform_bus_init( void )
{
if ( sdio_bus_initted == WICED_FALSE )
{
uint8_t a = 0;
platform_mcu_powersave_disable();
/* SDIO bootstrapping: GPIO0 = 0 and GPIO1 = 0 */
#ifdef WICED_WIFI_USE_GPIO_FOR_BOOTSTRAP
platform_gpio_init( &wifi_control_pins[WWD_PIN_BOOTSTRAP_0], OUTPUT_PUSH_PULL );
platform_gpio_output_low( &wifi_control_pins[WWD_PIN_BOOTSTRAP_0] );
platform_gpio_init( &wifi_control_pins[WWD_PIN_BOOTSTRAP_1], OUTPUT_PUSH_PULL );
platform_gpio_output_low( &wifi_control_pins[WWD_PIN_BOOTSTRAP_1] );
#endif /* WICED_WIFI_USE_GPIO_FOR_BOOTSTRAP */
/* Setup SDIO pins */
for ( a = WWD_PIN_SDIO_CLK; a < WWD_PIN_SDIO_MAX; a++ )
{
if( a == WWD_PIN_SDIO_OOB_IRQ )
{
platform_gpio_peripheral_pin_init( &wifi_sdio_pins[a], 0 );
}
else
{
platform_gpio_peripheral_pin_init( &wifi_sdio_pins[a], ( IOPORT_MODE_MUX_C | IOPORT_MODE_PULLUP ));
}
}
/* Enable the MCI peripheral */
sysclk_enable_peripheral_clock( ID_HSMCI );
HSMCI->HSMCI_CR = HSMCI_CR_SWRST;
MCI_Disable( HSMCI );
MCI_Init( &sdio_driver, HSMCI, ID_HSMCI, CPU_CLOCK_HZ );
/* Enable SDIO interrupt */
/* Priority must be set in platform.c file function platform_init_peripheral_irq_priorities */
/* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! */
/* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! */
// NVIC_SetPriority( HSMCI_IRQn, SAM4S_SDIO_IRQ_PRIO );
NVIC_EnableIRQ( HSMCI_IRQn );
// host_rtos_init_semaphore( &sdio_transfer_done_semaphore );
// enable_sdio_block_transfer_done_irq();
platform_mcu_powersave_enable();
sdio_bus_initted = WICED_TRUE;
}
return WICED_SUCCESS;
}
/**
* Reset MCI HW interface and disable it.
* \param keepSettings Keep old register settings, including
* _MR, _SDCR, _DTOR, _CSTOR, _DMA and _CFG.
*/
void MCI_Reset(Mcid *pMci, uint8_t keepSettings)
{
Hsmci *pMciHw = pMci->pMciHw;
uint8_t mciDis;
assert(pMci);
assert(pMci->pMciHw);
PMC_EnablePeripheral(pMci->mciId);
mciDis = PMC_IsPeriphEnabled(pMci->mciId);
if (keepSettings)
{
uint32_t mr, sdcr, dtor, cstor;
uint32_t cfg;
mr = pMciHw->HSMCI_MR;
sdcr = pMciHw->HSMCI_SDCR;
dtor = pMciHw->HSMCI_DTOR;
cstor = pMciHw->HSMCI_CSTOR;
cfg = pMciHw->HSMCI_CFG;
MCI_RESET(pMciHw);
MCI_Disable(pMciHw);
pMciHw->HSMCI_MR = mr;
pMciHw->HSMCI_SDCR = sdcr;
pMciHw->HSMCI_DTOR = dtor;
pMciHw->HSMCI_CSTOR = cstor;
pMciHw->HSMCI_CFG = cfg;
}
else
{
MCI_RESET(pMciHw);
MCI_Disable(pMciHw);
}
if ( mciDis )
{
PMC_DisablePeripheral( pMci->mciId ) ;
}
}
/**
* Reset MCI HW interface and disable it.
* \param keepSettings Keep old register settings, including
* _MR, _SDCR, _DTOR, _CSTOR, _DMA and _CFG.
*/
void MCI_Reset(Mcid *pMci, uint8_t keepSettings)
{
Hsmci *pMciHw = pMci->pMciHw;
uint32_t mciDis;
assert(pMci);
assert(pMci->pMciHw);
pmc_enable_periph_clk(pMci->mciId);
mciDis = pmc_is_periph_clk_enabled( pMci->mciId );
if (keepSettings)
{
uint32_t mr, sdcr, dtor, cstor;
uint32_t cfg;
mr = pMciHw->HSMCI_MR;
sdcr = pMciHw->HSMCI_SDCR;
dtor = pMciHw->HSMCI_DTOR;
cstor = pMciHw->HSMCI_CSTOR;
cfg = pMciHw->HSMCI_CFG;
MCI_RESET(pMciHw);
MCI_Disable(pMciHw);
pMciHw->HSMCI_MR = mr;
pMciHw->HSMCI_SDCR = sdcr;
pMciHw->HSMCI_DTOR = dtor;
pMciHw->HSMCI_CSTOR = cstor;
pMciHw->HSMCI_CFG = cfg;
}
else
{
MCI_RESET(pMciHw);
MCI_Disable(pMciHw);
}
if ( mciDis )
{
// pmc_disable_periph_clk( pMci->mciId ) ;
}
}
