/*
* mfi_tbolt_adp_reset - For controller reset
* @regs: MFI register set
*/
int
mfi_tbolt_adp_reset(struct mfi_softc *sc)
{
int retry = 0, i = 0;
int HostDiag;
MFI_WRITE4(sc, MFI_WSR, 0xF);
MFI_WRITE4(sc, MFI_WSR, 4);
MFI_WRITE4(sc, MFI_WSR, 0xB);
MFI_WRITE4(sc, MFI_WSR, 2);
MFI_WRITE4(sc, MFI_WSR, 7);
MFI_WRITE4(sc, MFI_WSR, 0xD);
for (i = 0; i < 10000; i++) ;
HostDiag = (uint32_t)MFI_READ4(sc, MFI_HDR);
while (!( HostDiag & DIAG_WRITE_ENABLE)) {
for (i = 0; i < 1000; i++);
HostDiag = (uint32_t)MFI_READ4(sc, MFI_HDR);
device_printf(sc->mfi_dev, "ADP_RESET_TBOLT: retry time=%d, "
"hostdiag=%#x\n", retry, HostDiag);
if (retry++ >= 100)
return 1;
}
device_printf(sc->mfi_dev, "ADP_RESET_TBOLT: HostDiag=%#x\n", HostDiag);
MFI_WRITE4(sc, MFI_HDR, (HostDiag | DIAG_RESET_ADAPTER));
for (i=0; i < 10; i++) {
for (i = 0; i < 10000; i++);
}
HostDiag = (uint32_t)MFI_READ4(sc, MFI_RSR);
while (HostDiag & DIAG_RESET_ADAPTER) {
for (i = 0; i < 1000; i++) ;
HostDiag = (uint32_t)MFI_READ4(sc, MFI_RSR);
device_printf(sc->mfi_dev, "ADP_RESET_TBOLT: retry time=%d, "
"hostdiag=%#x\n", retry, HostDiag);
if (retry++ >= 1000)
return 1;
}
return 0;
}
int32_t
mfi_tbolt_check_clear_intr_ppc(struct mfi_softc *sc)
{
int32_t status, mfi_status = 0;
status = MFI_READ4(sc, MFI_OSTS);
if (status & 1) {
MFI_WRITE4(sc, MFI_OSTS, status);
MFI_READ4(sc, MFI_OSTS);
if (status & MFI_STATE_CHANGE_INTERRUPT) {
mfi_status |= MFI_FIRMWARE_STATE_CHANGE;
}
return mfi_status;
}
if (!(status & MFI_FUSION_ENABLE_INTERRUPT_MASK))
return 1;
MFI_READ4(sc, MFI_OSTS);
return 0;
}
void
mfi_tbolt_disable_intr_ppc(struct mfi_softc *sc)
{
MFI_WRITE4(sc, MFI_OMSK, 0xFFFFFFFF);
MFI_READ4(sc, MFI_OMSK);
}
void
mfi_tbolt_enable_intr_ppc(struct mfi_softc *sc)
{
MFI_WRITE4(sc, MFI_OMSK, ~MFI_FUSION_ENABLE_INTERRUPT_MASK);
MFI_READ4(sc, MFI_OMSK);
}
int32_t
mfi_tbolt_read_fw_status_ppc(struct mfi_softc *sc)
{
return MFI_READ4(sc, MFI_OSP0);
}
