void PPCXEmitter::Prologue() { // Save regs u32 regSize = 8; // 4 in 32bit system u32 stackFrameSize = 32*32;//(35 - 12) * regSize; // Write Prologue (setup stack frame etc ...) // Save Lr MFLR(R12); for(int i = 14; i < 32; i ++) { STD((PPCReg)i, R1, -((33 - i) * regSize)); } // Save r12 STW(R12, R1, -0x8); // allocate stack STWU(R1, R1, -stackFrameSize); }
void PPCXEmitter::Prologue() { // Save regs u32 regSize = 8; // 4 in 32bit system u32 stackFrameSize = 0x1F0; // Write Prologue (setup stack frame etc ...) // Save Lr MFLR(R12); // Save gpr for(int i = 14; i < 32; i ++) { STD((PPCReg)i, R1, -((33 - i) * regSize)); } // Save r12 STW(R12, R1, -0x8); #if 0 // add fpr frame ADDI(R12, R1, -0x98); // Load fpr for(int i = 14; i < 32; i ++) { SFD((PPCReg)i, R1, -((32 - i) * regSize)); } #endif // allocate stack STWU(R1, R1, -stackFrameSize); #if 1 // load fpr buff MOVI2R(R10, (u32)&_fprTmp); // Save fpr for(int i = 14; i < 32; i ++) { SFD((PPCReg)i, R10, i * regSize); } #endif }
{ ps_video_error_offset+4, BLR, &condition_game_ext_psx },*/ // experimental, disabled due to its issue with remote play { 0 } }; SprxPatch psp_emulator_patches[] = { // Sets psp mode as opossed to minis mode. Increases compatibility, removes text protection and makes most savedata work { psp_set_psp_mode_offset, LI(R4, 0), &condition_psp_iso }, { 0 } }; SprxPatch emulator_api_patches[] = { // Read umd patches { psp_read, STDU(SP, 0xFF90, SP), &condition_psp_iso }, { psp_read+4, MFLR(R0), &condition_psp_iso }, { psp_read+8, STD(R0, 0x80, SP), &condition_psp_iso }, { psp_read+0x0C, MR(R8, R7), &condition_psp_iso }, { psp_read+0x10, MR(R7, R6), &condition_psp_iso }, { psp_read+0x14, MR(R6, R5), &condition_psp_iso }, { psp_read+0x18, MR(R5, R4), &condition_psp_iso }, { psp_read+0x1C, MR(R4, R3), &condition_psp_iso }, { psp_read+0x20, LI(R3, SYSCALL8_OPCODE_READ_PSP_UMD), &condition_psp_iso }, { psp_read+0x24, LI(R11, 8), &condition_psp_iso }, { psp_read+0x28, SC, &condition_psp_iso }, { psp_read+0x2C, LD(R0, 0x80, SP), &condition_psp_iso }, { psp_read+0x30, MTLR(R0), &condition_psp_iso }, { psp_read+0x34, ADDI(SP, SP, 0x70), &condition_psp_iso }, { psp_read+0x38, BLR, &condition_psp_iso }, // Read header patches { psp_read+0x3C, STDU(SP, 0xFF90, SP), &condition_psp_iso },