MPP_FUNCTION(0x2, "spi0", "cs2")),
};

static struct mvebu_pinctrl_soc_info armada_370_pinctrl_info;

static struct of_device_id armada_370_pinctrl_of_match[] = {
	{ .compatible = "marvell,mv88f6710-pinctrl" },
	{ },
};

static struct mvebu_mpp_ctrl mv88f6710_mpp_controls[] = {
	MPP_FUNC_CTRL(0, 65, NULL, armada_370_mpp_ctrl),
};

static struct pinctrl_gpio_range mv88f6710_mpp_gpio_ranges[] = {
	MPP_GPIO_RANGE(0,   0,  0, 32),
	MPP_GPIO_RANGE(1,  32, 32, 32),
	MPP_GPIO_RANGE(2,  64, 64,  2),
};

static int armada_370_pinctrl_probe(struct platform_device *pdev)
{
	struct mvebu_pinctrl_soc_info *soc = &armada_370_pinctrl_info;
	struct resource *res;

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	mpp_base = devm_ioremap_resource(&pdev->dev, res);
	if (IS_ERR(mpp_base))
		return PTR_ERR(mpp_base);

	soc->variant = 0; /* no variants for Armada 370 */
Ejemplo n.º 2
0
		.compatible = "marvell,98dx3236-pinctrl",
		.data       = (void *) V_98DX3236,
	},
	{
		.compatible = "marvell,98dx4251-pinctrl",
		.data       = (void *) V_98DX4251,
	},
	{ },
};

static const struct mvebu_mpp_ctrl mv78230_mpp_controls[] = {
	MPP_FUNC_CTRL(0, 48, NULL, mvebu_mmio_mpp_ctrl),
};

static struct pinctrl_gpio_range mv78230_mpp_gpio_ranges[] = {
	MPP_GPIO_RANGE(0,   0,  0, 32),
	MPP_GPIO_RANGE(1,  32, 32, 17),
};

static const struct mvebu_mpp_ctrl mv78260_mpp_controls[] = {
	MPP_FUNC_CTRL(0, 66, NULL, mvebu_mmio_mpp_ctrl),
};

static struct pinctrl_gpio_range mv78260_mpp_gpio_ranges[] = {
	MPP_GPIO_RANGE(0,   0,  0, 32),
	MPP_GPIO_RANGE(1,  32, 32, 32),
	MPP_GPIO_RANGE(2,  64, 64,  3),
};

static const struct mvebu_mpp_ctrl mv78460_mpp_controls[] = {
	MPP_FUNC_CTRL(0, 66, NULL, mvebu_mmio_mpp_ctrl),
Ejemplo n.º 3
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		.compatible = "marvell,mv88f6925-pinctrl",
		.data       = (void *) V_88F6925,
	},
	{
		.compatible = "marvell,mv88f6928-pinctrl",
		.data       = (void *) V_88F6928,
	},
	{ },
};

static const struct mvebu_mpp_ctrl armada_39x_mpp_controls[] = {
	MPP_FUNC_CTRL(0, 59, NULL, mvebu_mmio_mpp_ctrl),
};

static struct pinctrl_gpio_range armada_39x_mpp_gpio_ranges[] = {
	MPP_GPIO_RANGE(0,   0,  0, 32),
	MPP_GPIO_RANGE(1,  32, 32, 28),
};

static int armada_39x_pinctrl_probe(struct platform_device *pdev)
{
	struct mvebu_pinctrl_soc_info *soc = &armada_39x_pinctrl_info;
	const struct of_device_id *match =
		of_match_device(armada_39x_pinctrl_of_match, &pdev->dev);

	if (!match)
		return -ENODEV;

	soc->variant = (unsigned) match->data & 0xff;
	soc->controls = armada_39x_mpp_controls;
	soc->ncontrols = ARRAY_SIZE(armada_39x_mpp_controls);