void PPCXEmitter::Epilogue() {
u32 regSize = 8; // 4 in 32bit system
u32 stackFrameSize = 32*32;//(35 - 12) * regSize;
// Write Epilogue (restore stack frame, return)
// free stack
ADDI(R1, R1, stackFrameSize);
// Restore regs
for(int i = 14; i < 32; i ++) {
LD((PPCReg)i, R1, -((33 - i) * regSize));
}
// recover r12 (LR saved register)
LWZ (R12, R1, -0x8);
// Restore Lr
MTLR(R12);
}
void PPCXEmitter::Epilogue() {
u32 regSize = 8; // 4 in 32bit system
u32 stackFrameSize = 0x1F0;
//Break();
// Write Epilogue (restore stack frame, return)
// free stack
ADDI(R1, R1, stackFrameSize);
#if 0
ADDI(R12, R1, -0x98);
// Restore fpr
for(int i = 14; i < 32; i ++) {
LFD((PPCReg)i, R1, -((32 - i) * regSize));
}
#endif
// Restore gpr
for(int i = 14; i < 32; i ++) {
LD((PPCReg)i, R1, -((33 - i) * regSize));
}
// recover r12 (LR saved register)
LWZ (R12, R1, -0x8);
// Restore Lr
MTLR(R12);
#if 1
// load fpr buff
MOVI2R(R5, (u32)&_fprTmp);
// Load fpr
for(int i = 14; i < 32; i ++) {
LFD((PPCReg)i, R5, i * regSize);
}
#endif
}
SprxPatch emulator_api_patches[] =
{
// Read umd patches
{ psp_read, STDU(SP, 0xFF90, SP), &condition_psp_iso },
{ psp_read+4, MFLR(R0), &condition_psp_iso },
{ psp_read+8, STD(R0, 0x80, SP), &condition_psp_iso },
{ psp_read+0x0C, MR(R8, R7), &condition_psp_iso },
{ psp_read+0x10, MR(R7, R6), &condition_psp_iso },
{ psp_read+0x14, MR(R6, R5), &condition_psp_iso },
{ psp_read+0x18, MR(R5, R4), &condition_psp_iso },
{ psp_read+0x1C, MR(R4, R3), &condition_psp_iso },
{ psp_read+0x20, LI(R3, SYSCALL8_OPCODE_READ_PSP_UMD), &condition_psp_iso },
{ psp_read+0x24, LI(R11, 8), &condition_psp_iso },
{ psp_read+0x28, SC, &condition_psp_iso },
{ psp_read+0x2C, LD(R0, 0x80, SP), &condition_psp_iso },
{ psp_read+0x30, MTLR(R0), &condition_psp_iso },
{ psp_read+0x34, ADDI(SP, SP, 0x70), &condition_psp_iso },
{ psp_read+0x38, BLR, &condition_psp_iso },
// Read header patches
{ psp_read+0x3C, STDU(SP, 0xFF90, SP), &condition_psp_iso },
{ psp_read+0x40, MFLR(R0), &condition_psp_iso },
{ psp_read+0x44, STD(R0, 0x80, SP), &condition_psp_iso },
{ psp_read+0x48, MR(R7, R6), &condition_psp_iso },
{ psp_read+0x4C, MR(R6, R5), &condition_psp_iso },
{ psp_read+0x50, MR(R5, R4), &condition_psp_iso },
{ psp_read+0x54, MR(R4, R3), &condition_psp_iso },
{ psp_read+0x58, LI(R3, SYSCALL8_OPCODE_READ_PSP_HEADER), &condition_psp_iso },
{ psp_read+0x5C, LI(R11, 8), &condition_psp_iso },
{ psp_read+0x60, SC, &condition_psp_iso },
{ psp_read+0x64, LD(R0, 0x80, SP), &condition_psp_iso },
{ psp_read+0x68, MTLR(R0), &condition_psp_iso },
