int main(void)
{
// Enable the constant latency sub power mode to minimize the time it takes
// for the SPIS peripheral to become active after the CSN line is asserted
// (when the CPU is in sleep mode).
NRF_POWER->TASKS_CONSTLAT = 1;
LEDS_CONFIGURE(BSP_LED_0_MASK);
LEDS_OFF(BSP_LED_0_MASK);
APP_ERROR_CHECK(NRF_LOG_INIT());
NRF_LOG_PRINTF("SPIS example\n");
nrf_drv_spis_config_t spis_config = NRF_DRV_SPIS_DEFAULT_CONFIG(SPIS_INSTANCE);
spis_config.csn_pin = SPIS_CS_PIN;
APP_ERROR_CHECK(nrf_drv_spis_init(&spis, &spis_config, spis_event_handler));
while(1)
{
memset(m_rx_buf, 0, m_length);
spis_xfer_done = false;
APP_ERROR_CHECK(nrf_drv_spis_buffers_set(&spis, m_tx_buf, m_length, m_rx_buf, m_length));
while (!spis_xfer_done)
{
__WFE();
}
LEDS_INVERT(BSP_LED_0_MASK);
}
}
uint32_t spi_slave_example_init(void)
{
uint32_t err_code;
nrf_drv_spis_config_t spis_config = NRF_DRV_SPIS_DEFAULT_CONFIG(SPIS_INSTANCE_NUMBER);
spis_config.miso_pin = SPIS_MISO_PIN;
spis_config.mosi_pin = SPIS_MOSI_PIN;
spis_config.sck_pin = SPIS_SCK_PIN;
spis_config.csn_pin = SPIS_CSN_PIN;
spis_config.mode = NRF_DRV_SPIS_MODE_0;
spis_config.bit_order = NRF_DRV_SPIS_BIT_ORDER_LSB_FIRST;
spis_config.def = DEF_CHARACTER;
spis_config.orc = ORC_CHARACTER;
err_code = nrf_drv_spis_init(&m_spis, &spis_config, spi_slave_event_handle);
APP_ERROR_CHECK(err_code);
//Initialize buffers.
spi_slave_buffers_init(m_tx_buf, m_rx_buf, (uint16_t)TX_BUF_SIZE);
//Set buffers.
err_code = nrf_drv_spis_buffers_set(&m_spis, m_tx_buf, sizeof(m_tx_buf), m_rx_buf, sizeof(m_rx_buf));
APP_ERROR_CHECK(err_code);
return NRF_SUCCESS;
}
typedef struct
{
volatile uint32_t tx_buffer_size; //!< SPI slave TX buffer size in bytes.
volatile uint32_t rx_buffer_size; //!< SPI slave RX buffer size in bytes.
nrf_drv_spis_event_handler_t handler; //!< SPI event handler.
volatile const uint8_t * tx_buffer; //!< SPI slave TX buffer.
volatile uint8_t * rx_buffer; //!< SPI slave RX buffer.
nrf_drv_state_t state; //!< driver initialization state.
volatile nrf_drv_spis_state_t spi_state; //!< SPI slave state.
} spis_cb_t;
static spis_cb_t m_cb[SPIS_COUNT];
static nrf_drv_spis_config_t const m_default_config[SPIS_COUNT] = {
#if SPIS0_ENABLED
NRF_DRV_SPIS_DEFAULT_CONFIG(0),
#endif
#if SPIS1_ENABLED
NRF_DRV_SPIS_DEFAULT_CONFIG(1),
#endif
#if SPIS2_ENABLED
NRF_DRV_SPIS_DEFAULT_CONFIG(2),
#endif
};
ret_code_t nrf_drv_spis_init(nrf_drv_spis_t const * const p_instance,
nrf_drv_spis_config_t const * p_config,
nrf_drv_spis_event_handler_t event_handler)
{
spis_cb_t * p_cb = &m_cb[p_instance->instance_id];
