Ejemplo n.º 1
0
/* timing set */
static int nxp_nand_timing_set(struct mtd_info *mtd)
{
	struct nand_chip *chip = mtd->priv;
	uint32_t ret, mode;

	ret = onfi_get_async_timing_mode(chip);
	if (ret == ONFI_TIMING_MODE_UNKNOWN)
	{
		NX_MCUS_SetNANDBUSConfig
		(
			 0, /* NF */
			 CFG_SYS_NAND_TACS,              // tACS  ( 0 ~ 3 )
			 CFG_SYS_NAND_TCAH,              // tCAH  ( 0 ~ 3 )
			 CFG_SYS_NAND_TCOS,              // tCOS  ( 0 ~ 3 )
			 CFG_SYS_NAND_TCOH,              // tCOH  ( 0 ~ 3 )
			 CFG_SYS_NAND_TACC               // tACC  ( 1 ~ 16)
		);

		return 0;
	}

	mode = fls(ret) - 1;
	TM_DBGOUT("ONFI TIMING MODE (%d) \n", mode);

	nand_onfi_timing_set (mtd, mode);

	return 0;
}
Ejemplo n.º 2
0
static int nand_onfi_timing_set(struct mtd_info *mtd, uint32_t mode)
{
	struct clk *clk;
	uint32_t clkhz;
	struct nand_timings tmgs;
	int ret;


	clk = clk_get (NULL, CORECLK_NAME_BCLK), clkhz = clk_get_rate(clk), clk_put(clk);
	TM_DBGOUT(" BCLK: %u HZ\n", clkhz);

	// setting - nand flash

	// setting - nand controller timming
	NX_MCUS_GetNANDBUSConfig
	(
		0,
		&tmgs.tACS,
		&tmgs.tCAH,
		&tmgs.tCOS,
		&tmgs.tOCH,
		&tmgs.tACC
	);
	TM_DBGOUT("[BEFORE]  tACS: %u, tCAH: %u, tCOS: %u, tOCH: %u, tACC: %u\n", 
		tmgs.tACS, tmgs.tCAH, tmgs.tCOS, tmgs.tOCH, tmgs.tACC);

	ret = nand_calc_timing_mode (mode, clkhz, &tmgs);
	if (ret < 0)
		return -1;

	NX_MCUS_SetNANDBUSConfig
	(
		0,
		tmgs.tACS,
		tmgs.tCAH,
		tmgs.tCOS,
		tmgs.tOCH,
		tmgs.tACC
	);

	NX_MCUS_GetNANDBUSConfig
	(
		0,
		&tmgs.tACS,
		&tmgs.tCAH,
		&tmgs.tCOS,
		&tmgs.tOCH,
		&tmgs.tACC
	);
	TM_DBGOUT("[AFTER]  tACS: %u, tCAH: %u, tCOS: %u, tOCH: %u, tACC: %u\n", 
		tmgs.tACS, tmgs.tCAH, tmgs.tCOS, tmgs.tOCH, tmgs.tACC);


	return 0;
}
Ejemplo n.º 3
0
static void cpu_bus_init(void)
{
	/* MCUS for Static Memory. */
	NX_MCUS_Initialize();
	NX_MCUS_SetBaseAddress((void*)IO_ADDRESS(NX_MCUS_GetPhysicalAddress()));
	NX_MCUS_OpenModule();

	/*
	 * NAND Bus config
	 */
#if 0
	NX_MCUS_SetNANDBUSConfig
	(
		0, /* NF */
		CFG_SYS_NAND_TACS,		// tACS  ( 0 ~ 3 )
		CFG_SYS_NAND_TCAH,		// tCAH  ( 0 ~ 3 )
		CFG_SYS_NAND_TCOS,		// tCOS  ( 0 ~ 3 )
		CFG_SYS_NAND_TCOH,		// tCOH  ( 0 ~ 3 )
		CFG_SYS_NAND_TACC		// tACC  ( 1 ~ 16)
	);
#endif

	/*
	 * MCU-Static config: Static Bus #0 ~ #1
	 */
	#define STATIC_BUS_CONFIGUTATION( _n_ )								\
	NX_MCUS_SetStaticBUSConfig											\
	( 																	\
		NX_MCUS_SBUSID_STATIC ## _n_, 									\
		CFG_SYS_STATIC ## _n_ ## _BW, 									\
		CFG_SYS_STATIC ## _n_ ## _TACS, 								\
		CFG_SYS_STATIC ## _n_ ## _TCAH, 								\
		CFG_SYS_STATIC ## _n_ ## _TCOS, 								\
		CFG_SYS_STATIC ## _n_ ## _TCOH, 								\
		CFG_SYS_STATIC ## _n_ ## _TACC, 								\
		CFG_SYS_STATIC ## _n_ ## _TSACC,								\
		(NX_MCUS_WAITMODE ) CFG_SYS_STATIC ## _n_ ## _WAITMODE, 		\
		(NX_MCUS_BURSTMODE) CFG_SYS_STATIC ## _n_ ## _RBURST, 			\
		(NX_MCUS_BURSTMODE) CFG_SYS_STATIC ## _n_ ## _WBURST			\
	);

	STATIC_BUS_CONFIGUTATION( 0);
	STATIC_BUS_CONFIGUTATION( 1);
}