extern hw_reg_set Op1Reg( instruction *ins ) /************************************************/ { hw_reg_set *list; list = RegSets[Op1Possible( ins )]; return( *list ); }
instruction *rOP2REG( instruction *ins ) /*******************************************/ { instruction *new_ins; name *name1; type_class_def type_class; type_class = _OpClass( ins ); name1 = AllocTemp( type_class ); new_ins = MakeMove( ins->operands[1], name1, type_class ); ins->operands[1] = name1; MoveSegOp( ins, new_ins, 0 ); PrefixIns( ins, new_ins ); MarkPossible( ins, name1, Op1Possible( ins ) ); ins->u.gen_table = NULL; GiveRegister( NameConflict( ins, name1 ), true ); return( new_ins ); }